dts: nios2: intel: Move SoC devicetree includes under a vendor directory
Cleans up SoC devicetree include file locations to follow the convention of dts/<arch>/<vendor>/ Signed-off-by: Maureen Helm <maureen.helm@intel.com>
This commit is contained in:
parent
267bba62d3
commit
f987095a51
4 changed files with 2 additions and 2 deletions
54
dts/nios2/intel/nios2-qemu.dtsi
Normal file
54
dts/nios2/intel/nios2-qemu.dtsi
Normal file
|
@ -0,0 +1,54 @@
|
|||
/* SPDX-License-Identifier: Apache-2.0 */
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "qemu,nios2-zephyr";
|
||||
reg = <0>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
flash0: flash@420000 {
|
||||
compatible = "soc-nv-flash";
|
||||
reg = <0x420000 0x20000>;
|
||||
};
|
||||
|
||||
sram0: memory@400000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x400000 0x20000>;
|
||||
};
|
||||
|
||||
soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
interrupt-parent = <&cpu>;
|
||||
ranges;
|
||||
|
||||
jtag_uart: uart@201000 {
|
||||
compatible = "altr,jtag-uart";
|
||||
reg = <0x201000 0x400>;
|
||||
label = "jtag_uart0";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ns16550_uart: uart@440000 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x440000 0x400>;
|
||||
interrupts = <1>;
|
||||
clock-frequency = <50000000>;
|
||||
label = "UART_0";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
73
dts/nios2/intel/nios2f.dtsi
Normal file
73
dts/nios2/intel/nios2f.dtsi
Normal file
|
@ -0,0 +1,73 @@
|
|||
/* SPDX-License-Identifier: Apache-2.0 */
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <zephyr/dt-bindings/i2c/i2c.h>
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "altr,nios2f";
|
||||
reg = <0>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
flash0: flash@0 {
|
||||
compatible = "soc-nv-flash";
|
||||
reg = <0x00 0xb8000>;
|
||||
};
|
||||
|
||||
sram0: memory@400000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x400000 0x20000>;
|
||||
};
|
||||
|
||||
soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
interrupt-parent = <&cpu>;
|
||||
ranges;
|
||||
|
||||
uart0: uart@100000 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x100000 0x400>;
|
||||
clock-frequency = <50000000>;
|
||||
interrupts = <1 0>;
|
||||
label = "UART_0";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
jtag_uart: uart@201000 {
|
||||
compatible = "altr,jtag-uart";
|
||||
reg = <0x201000 0x8>;
|
||||
label = "JTAG_UART";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@100200 {
|
||||
compatible = "altr,nios2-i2c";
|
||||
clock-frequency = <I2C_BITRATE_ULTRA>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x100200 0x400>;
|
||||
interrupts = <4 10>;
|
||||
label = "I2C_0";
|
||||
};
|
||||
|
||||
dma: dma@100200 {
|
||||
compatible = "altr,msgdma";
|
||||
reg = <0x1002c0 0x30>;
|
||||
label = "DMA_0";
|
||||
interrupts = <3 3>;
|
||||
#dma-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
Loading…
Add table
Add a link
Reference in a new issue