diff --git a/boards/riscv/adp_xc7k_ae350/Kconfig.board b/boards/riscv/adp_xc7k_ae350/Kconfig.board
new file mode 100644
index 00000000000..085eb9696a8
--- /dev/null
+++ b/boards/riscv/adp_xc7k_ae350/Kconfig.board
@@ -0,0 +1,6 @@
+# Copyright (c) 2021 Andes Technology Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_ADP_XC7K_AE350
+	bool "Andes ADP-XC7K AE350 Platform"
+	depends on SOC_RISCV_ANDES_AE350
diff --git a/boards/riscv/adp_xc7k_ae350/Kconfig.defconfig b/boards/riscv/adp_xc7k_ae350/Kconfig.defconfig
new file mode 100644
index 00000000000..7438c2eae72
--- /dev/null
+++ b/boards/riscv/adp_xc7k_ae350/Kconfig.defconfig
@@ -0,0 +1,5 @@
+# Copyright (c) 2021 Andes Technology Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD
+	default "adp_xc7k_ae350" if BOARD_ADP_XC7K_AE350
diff --git a/boards/riscv/adp_xc7k_ae350/adp_xc7k_ae350.dts b/boards/riscv/adp_xc7k_ae350/adp_xc7k_ae350.dts
new file mode 100644
index 00000000000..4fee6978d92
--- /dev/null
+++ b/boards/riscv/adp_xc7k_ae350/adp_xc7k_ae350.dts
@@ -0,0 +1,154 @@
+/*
+ * Copyright (c) 2021 Andes Technology Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <andes_v5_ae350.dtsi>
+
+/ {
+	model = "Andes ADP-XC7K AE350";
+	compatible = "andestech,adp_xc7k_ae350";
+
+	aliases {
+		gpio-0 = &gpio0;
+		led0 = &seg7_led1_g;
+		led1 = &seg7_led2_g;
+		sw0 = &user_button1;
+	};
+
+	chosen {
+		zephyr,console = &uart1;
+		zephyr,shell-uart = &uart1;
+		zephyr,sram = &dram;
+		zephyr,flash = &flash0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		seg7_led1_a: led_1 {
+			label = "7SEG LED1 A";
+			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led1_b: led_2 {
+			label = "7SEG LED1 B";
+			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led1_c: led_3 {
+			label = "7SEG LED1 C";
+			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led1_d: led_4 {
+			label = "7SEG LED1 D";
+			gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led1_e: led_5 {
+			label = "7SEG LED1 E";
+			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led1_f: led_6 {
+			label = "7SEG LED1 F";
+			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led1_g: led_7 {
+			label = "7SEG LED1 G";
+			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led1_dp: led_8 {
+			label = "7SEG LED1 DP";
+			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+		};
+
+		seg7_led2_a: led_9 {
+			label = "7SEG LED2 A";
+			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led2_b: led_10 {
+			label = "7SEG LED2 B";
+			gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led2_c: led_11 {
+			label = "7SEG LED2 C";
+			gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led2_d: led_12 {
+			label = "7SEG LED2 D";
+			gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led2_e: led_13 {
+			label = "7SEG LED2 E";
+			gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led2_f: led_14 {
+			label = "7SEG LED2 F";
+			gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led2_g: led_15 {
+			label = "7SEG LED2 G";
+			gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
+		};
+		seg7_led2_dp: led_16 {
+			label = "7SEG LED2 DP";
+			gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+
+		user_button1: button_1 {
+			label = "User SW1";
+			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+		};
+		user_button2: button_2 {
+			label = "User SW2";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+		};
+		user_button3: button_3 {
+			label = "User SW3";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+		};
+		user_button4: button_4 {
+			label = "User SW4";
+			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+		};
+		user_button5: button_5 {
+			label = "User SW5";
+			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
+		};
+		user_button6: button_6 {
+			label = "User SW6";
+			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+		};
+		user_button7: button_7 {
+			label = "User SW7";
+			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&uart1 {
+	status = "okay";
+	clock-frequency = <19660800>;
+	current-speed = <115200>;
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+	flash0: flash@0 {
+		compatible = "jedec,spi-nor";
+		label = "JEDEC SPI-NOR";
+		reg = <0>;
+		size = <16777216>;
+		spi-max-frequency = <1000000>;
+		jedec-id = [c2 25 35];
+		status = "okay";
+	};
+};
diff --git a/boards/riscv/adp_xc7k_ae350/adp_xc7k_ae350.yaml b/boards/riscv/adp_xc7k_ae350/adp_xc7k_ae350.yaml
new file mode 100644
index 00000000000..93be22abf7c
--- /dev/null
+++ b/boards/riscv/adp_xc7k_ae350/adp_xc7k_ae350.yaml
@@ -0,0 +1,13 @@
+identifier: adp_xc7k_ae350
+name: Andes ADP-XC7K AE350
+type: mcu
+arch: riscv32
+toolchain:
+  - zephyr
+  - cross-compile
+ram: 512
+supported:
+  - gpio
+testing:
+  ignore_tags:
+    - bluetooth
diff --git a/boards/riscv/adp_xc7k_ae350/adp_xc7k_ae350_defconfig b/boards/riscv/adp_xc7k_ae350/adp_xc7k_ae350_defconfig
new file mode 100644
index 00000000000..f7010d29e14
--- /dev/null
+++ b/boards/riscv/adp_xc7k_ae350/adp_xc7k_ae350_defconfig
@@ -0,0 +1,43 @@
+CONFIG_SOC_SERIES_RISCV_ANDES_V5=y
+CONFIG_SOC_RISCV_ANDES_AE350=y
+CONFIG_BOARD_ADP_XC7K_AE350=y
+CONFIG_XIP=n
+CONFIG_PLIC=y
+CONFIG_RISCV_MACHINE_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_PRINTK=y
+CONFIG_BOOT_BANNER=y
+
+# Serial driver options
+CONFIG_SERIAL=y
+CONFIG_UART_NS16550=y
+
+# GPIO driver options
+CONFIG_GPIO=y
+CONFIG_GPIO_ANDES_ATCGPIO100=y
+
+# RV64 options
+#CONFIG_RV64I_CPU=y
+
+# FPU (single precision) options
+#CONFIG_FPU=y
+#CONFIG_FPU_SHARING=y
+#CONFIG_FLOAT_HARD=y
+#CONFIG_SINGLE_PRECISION_FPU=y
+
+# FPU (double precision) options
+#CONFIG_FPU=y
+#CONFIG_FPU_SHARING=y
+#CONFIG_FLOAT_HARD=y
+#CONFIG_DOUBLE_PRECISION_FPU=y
+
+# HW DSP options
+#CONFIG_SOC_ANDES_V5_HWDSP=y
+
+# Cache options
+CONFIG_CACHE_ENABLE=y
+
+# Nocache memory options
+#CONFIG_SOC_ANDES_V5_PMA=y
+#CONFIG_NOCACHE_MEMORY=y
diff --git a/boards/riscv/adp_xc7k_ae350/doc/img/adp_xc7k160.png b/boards/riscv/adp_xc7k_ae350/doc/img/adp_xc7k160.png
new file mode 100644
index 00000000000..38ca5294f09
Binary files /dev/null and b/boards/riscv/adp_xc7k_ae350/doc/img/adp_xc7k160.png differ
diff --git a/boards/riscv/adp_xc7k_ae350/doc/img/adp_xc7k410.png b/boards/riscv/adp_xc7k_ae350/doc/img/adp_xc7k410.png
new file mode 100644
index 00000000000..592bce49953
Binary files /dev/null and b/boards/riscv/adp_xc7k_ae350/doc/img/adp_xc7k410.png differ
diff --git a/boards/riscv/adp_xc7k_ae350/doc/img/connect_aice.png b/boards/riscv/adp_xc7k_ae350/doc/img/connect_aice.png
new file mode 100644
index 00000000000..353b6aaa673
Binary files /dev/null and b/boards/riscv/adp_xc7k_ae350/doc/img/connect_aice.png differ
diff --git a/boards/riscv/adp_xc7k_ae350/doc/index.rst b/boards/riscv/adp_xc7k_ae350/doc/index.rst
new file mode 100644
index 00000000000..e8a202cd5fd
--- /dev/null
+++ b/boards/riscv/adp_xc7k_ae350/doc/index.rst
@@ -0,0 +1,318 @@
+.. _adp_xc7k_ae350:
+
+Andes ADP-XC7K AE350
+####################
+
+Overview
+********
+
+ADP-XC7K AE350 board is for AndeShape AE350 platform on ADP-XC7K series
+FPGA-based development boards.
+
+ADP-XC7K series are FPGA-based development and prototyping boards for evaluation of
+variety of AndesCore processors and AndeShape SoC platform IPs.
+AE350 is a RISC-V platform which can integrate AndesCore CPUs with a collection
+of fundamental peripheral IPs.
+
+1st figure shows the green PCB is ADP-XC7K160 and 2nd figure shows the red PCB is ADP-XC7K410.
+
+.. image:: img/adp_xc7k160.png
+     :width: 600px
+     :align: center
+     :alt: ADP-XC7K160
+
+.. image:: img/adp_xc7k410.png
+     :width: 600px
+     :align: center
+     :alt: ADP-XC7K410
+
+More information can be found on `ADP-XC7K160/410`_ and `AndeShape AE350`_ websites.
+
+Hardware
+********
+
+The ADP-XC7K AE350 platform integrates 1 ~ 4 cores 32/64-bit 60MHz RISC-V CPUs, DSP,
+1GB RAM, Cache, SPI flash memory, ethernet controller and other peripherals.
+
+The ADP-XC7K AE350 platform provides following hardware components:
+
+- 1 ~ 4 cores 32/64-bit 60MHz AndeStar v5 RISC-V CPUs
+- 1GB on-board SDRAM
+- 2MB SPI flash memory (1MB can be used for XIP)
+- UART
+- I2C
+- SPI
+- GPIO
+- PWM
+- DMA
+- 10/100 Ethernet RJ45 port
+- LCD module connector
+- 16KB I2C EEPROM
+- SD memory card slot
+- MIC-in, Line-in, and Line-out with AC97 audio codec
+
+Supported Features
+==================
+
+The ``adp_xc7k_ae350`` board configuration supports the following hardware features:
+
++----------------+------------+----------------------+
+| Interface      | Controller | Driver/Component     |
++================+============+======================+
+| PLIC           | on-chip    | interrupt_controller |
++----------------+------------+----------------------+
+| RISC-V Machine | on-chip    | timer                |
+| Timer          |            |                      |
++----------------+------------+----------------------+
+| GPIO           | on-chip    | gpio                 |
++----------------+------------+----------------------+
+| UART           | on-chip    | serial               |
++----------------+------------+----------------------+
+
+Other hardware features are not supported yet.
+
+Connections and IOs
+===================
+
+The ADP-XC7K AE350 platform has 1 GPIO controller. It providing 32 bits of IO.
+It is responsible for pin input/output, pull-up, etc.
+
+Mapping from GPIO controller to the ADP-XC7K board pins:
+
++--------------------+--------------------+
+| GPIO controller    | Usage / Board pins |
++====================+====================+
+| **Push Buttons**   |                    |
++--------------------+--------------------+
+| GPIO.0             | SW1                |
++--------------------+--------------------+
+| GPIO.1             | SW2                |
++--------------------+--------------------+
+| GPIO.2             | SW3                |
++--------------------+--------------------+
+| GPIO.3             | SW4                |
++--------------------+--------------------+
+| GPIO.4             | SW5                |
++--------------------+--------------------+
+| GPIO.5             | SW6                |
++--------------------+--------------------+
+| GPIO.6             | SW7                |
++--------------------+--------------------+
+| **7-Segment LED1** |                    |
++--------------------+--------------------+
+| GPIO.16            | 7SEG1.A            |
++--------------------+--------------------+
+| GPIO.17            | 7SEG1.B            |
++--------------------+--------------------+
+| GPIO.18            | 7SEG1.C            |
++--------------------+--------------------+
+| GPIO.19            | 7SEG1.D            |
++--------------------+--------------------+
+| GPIO.20            | 7SEG1.E            |
++--------------------+--------------------+
+| GPIO.21            | 7SEG1.F            |
++--------------------+--------------------+
+| GPIO.22            | 7SEG1.G            |
++--------------------+--------------------+
+| GPIO.23            | 7SEG1.DP           |
++--------------------+--------------------+
+| **7-Segment LED2** |                    |
++--------------------+--------------------+
+| GPIO.24            | 7SEG2.A            |
++--------------------+--------------------+
+| GPIO.25            | 7SEG2.B            |
++--------------------+--------------------+
+| GPIO.26            | 7SEG2.C            |
++--------------------+--------------------+
+| GPIO.27            | 7SEG2.D            |
++--------------------+--------------------+
+| GPIO.28            | 7SEG2.E            |
++--------------------+--------------------+
+| GPIO.29            | 7SEG2.F            |
++--------------------+--------------------+
+| GPIO.30            | 7SEG2.G            |
++--------------------+--------------------+
+| GPIO.31            | 7SEG2.DP           |
++--------------------+--------------------+
+| **GPIO pins**      |                    |
++--------------------+--------------------+
+| GPIO.7             | IDE_CON1.4         |
++--------------------+--------------------+
+| GPIO.8             | IDE_CON1.6         |
++--------------------+--------------------+
+| GPIO.9             | IDE_CON1.8         |
++--------------------+--------------------+
+| GPIO.10            | IDE_CON1.10        |
++--------------------+--------------------+
+| GPIO.11            | IDE_CON1.11        |
++--------------------+--------------------+
+| GPIO.12            | IDE_CON1.12        |
++--------------------+--------------------+
+| GPIO.13            | IDE_CON1.13        |
++--------------------+--------------------+
+| GPIO.14            | IDE_CON1.14        |
++--------------------+--------------------+
+| GPIO.15            | IDE_CON1.15        |
++--------------------+--------------------+
+
+Other peripheral mapping are listed below:
+
++-------------+---------------------------------+
+| Peripherals | Usage / Board pins              |
++=============+=================================+
+| SPI_1       | internal connected to SPI Flash |
++-------------+---------------------------------+
+| SPI_2_CS    | IDE_CON1.37                     |
++-------------+---------------------------------+
+| SPI_2_MOSI  | IDE_CON1.36                     |
++-------------+---------------------------------+
+| SPI_2_MISO  | IDE_CON1.38                     |
++-------------+---------------------------------+
+| SPI_2_SCLK  | IDE_CON1.35                     |
++-------------+---------------------------------+
+| I2C_SDA     | J27.1                           |
++-------------+---------------------------------+
+| I2C_SCL     | J27.2                           |
++-------------+---------------------------------+
+
+System Clock
+------------
+
+The ADP-XC7K AE350 platform has 60MHz core clock.
+
+Serial Port
+-----------
+
+The ADP-XC7K AE350 platform has 2 UARTs.
+The Zephyr console output is by default assigned to UART2 and the default
+settings are 115200 8N1.
+
+Programming and debugging
+*************************
+
+For debugging zephyr applications or burning them into a flash, you will need to
+connect Andes ICE from host computer to ADP-XC7K board and execute the
+Andes ICE management software, ICEman, on this host computer.
+
+Connecting Andes ICE (AICE)
+===========================
+
+AICE is used for flashing and debugging the board. Please connect AICE to both
+ADP-XC7K board and the host computer as shown in the figure.
+
+.. image:: img/connect_aice.png
+     :width: 600px
+     :align: center
+     :alt: Connect AICE
+
+More information can be found on `AICE-MINI+`_, `AICE-MICRO`_ website
+
+Building
+========
+
+You can build applications in the usual way. Here is an example for
+the :ref:`hello_world` application.
+
+.. zephyr-app-commands::
+   :board: adp_xc7k_ae350
+   :goals: build
+
+Flashing
+========
+
+Before flashing, you have to download ICEman (``ice.zip``) from the
+`Andes Development Kit`_.
+If you want to use XIP mode (``CONFIG_XIP=y``), you also need to download
+the flash burner (``flash.zip``).
+
+At first, you should run ICEman when flashing and debugging program.
+
+.. code-block:: console
+
+   # Enable execute file permission of ICEman
+   chmod a+x ./ICEman
+
+   # Running the ICEman server
+   sudo ./ICEman -Z v5
+
+.. note::
+
+   To run ICEman commands as a normal user, you will need to install the
+   :file:`70-ndsusb-v1.rules` udev rules file (usually by placing it in
+   :file:`/etc/udev/rules.d`, then unplugging and plugging the
+   AICE adapter in again via USB.).
+
+If ``CONFIG_XIP=n``, you can load the program (``zephyr.elf``) into RAM directly
+and execute it.
+
+.. code-block:: console
+
+   # Check the ICEman server is running
+   # Load the program into RAM and execute it
+   riscv64-zephyr-elf-gdb zephyr/zephyr.elf
+   (gdb) target remote :1111
+   (gdb) monitor reset halt
+   (gdb) load
+   (gdb) quit
+
+If ``CONFIG_XIP=y``, you need to burn the program (``zephyr.bin``) into flash memory
+and execute it.
+
+.. code-block:: console
+
+   # Check the ICEman server is running
+   # Burn the program into flash and execute it
+   <FLASH>/bin/target_burn_frontend \
+       -P 4444 --unlock --verify --image=zephyr/zephyr.bin \
+       --algorithm-bin=<FLASH>/target_bin/target_SPI_v5_[32|64].bin
+
+   # Note:
+   #   1. Assume the flash burner is downloaded to <FLASH> directory
+   #   2. For algorithm-bin file, use target_SPI_v5_32.bin in RV32 platform and
+   #      use target_SPI_v5_64.bin in RV64 platform
+
+Open a serial terminal with the following settings:
+
+- Speed: 115200
+- Data: 8 bits
+- Parity: None
+- Stop bits: 1
+
+you should see the following message in the terminal:
+
+.. code-block:: console
+
+   ***** Booting Zephyr OS v2.4.0 *****
+   Hello World! adp_xc7k_ae350
+
+Debugging
+=========
+
+.. code-block:: console
+
+   # Check the ICEman server is running
+   # Load and debug program
+   ./riscv64-zephyr-elf-gdb zephyr/zephyr.elf
+   (gdb) target remote :1111
+   (gdb) monitor reset halt
+   (gdb) load
+
+If ``CONFIG_XIP=y``, please follow the flashing section to burn the program into
+flash memory first.
+Then, you can use GDB to debug program by above commands but do NOT execute ``load``
+command since the program has been placed in the flash memory.
+
+References
+**********
+
+.. target-notes::
+
+.. _ADP-XC7K160/410: http://www.andestech.com/en/products-solutions/andeshape-platforms/adp-xc7k160-410/
+
+.. _AndeShape AE350: http://www.andestech.com/en/products-solutions/andeshape-platforms/ae350-axi-based-platform-pre-integrated-with-n25f-nx25f-a25-ax25/
+
+.. _AICE-MINI+: http://www.andestech.com/en/products-solutions/andeshape-platforms/aice-mini-plus/
+
+.. _AICE-MICRO: http://www.andestech.com/en/products-solutions/andeshape-platforms/aice-micro/
+
+.. _Andes Development Kit: https://github.com/andestech/Andes-Development-Kit/releases
diff --git a/tests/drivers/gpio/gpio_basic_api/boards/adp_xc7k_ae350.overlay b/tests/drivers/gpio/gpio_basic_api/boards/adp_xc7k_ae350.overlay
new file mode 100644
index 00000000000..3b82f5a1836
--- /dev/null
+++ b/tests/drivers/gpio/gpio_basic_api/boards/adp_xc7k_ae350.overlay
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2021 Andes Technology Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	resources {
+		compatible = "test-gpio-basic-api";
+		status = "okay";
+		out-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
+		in-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
+	};
+};