From f9152adc8181186e99d73716463c44258051df46 Mon Sep 17 00:00:00 2001 From: Ioannis Konstantelias Date: Mon, 15 Jul 2019 15:47:29 +0300 Subject: [PATCH] soc: stm32: Add fixups for WWDG EWI and clock info Extended the WWDG fixups to support early wake interrupt handling and clock information. Signed-off-by: Ioannis Konstantelias --- soc/arm/st_stm32/stm32f0/dts_fixup.h | 9 ++++++++- soc/arm/st_stm32/stm32f1/dts_fixup.h | 9 ++++++++- soc/arm/st_stm32/stm32f2/dts_fixup.h | 9 ++++++++- soc/arm/st_stm32/stm32f3/dts_fixup.h | 10 +++++++++- soc/arm/st_stm32/stm32f4/dts_fixup.h | 9 ++++++++- soc/arm/st_stm32/stm32f7/dts_fixup.h | 9 ++++++++- soc/arm/st_stm32/stm32g0/dts_fixup.h | 7 +++++++ soc/arm/st_stm32/stm32h7/dts_fixup.h | 7 +++++++ soc/arm/st_stm32/stm32l0/dts_fixup.h | 9 ++++++++- soc/arm/st_stm32/stm32l1/dts_fixup.h | 7 +++++++ soc/arm/st_stm32/stm32l4/dts_fixup.h | 9 ++++++++- soc/arm/st_stm32/stm32mp1/dts_fixup.h | 6 ++++++ soc/arm/st_stm32/stm32wb/dts_fixup.h | 7 +++++++ 13 files changed, 99 insertions(+), 8 deletions(-) diff --git a/soc/arm/st_stm32/stm32f0/dts_fixup.h b/soc/arm/st_stm32/stm32f0/dts_fixup.h index 472da335567..8d5e41b4e0d 100644 --- a/soc/arm/st_stm32/stm32f0/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f0/dts_fixup.h @@ -188,7 +188,14 @@ #define DT_TIM_STM32_17_CLOCK_BITS DT_ST_STM32_TIMERS_40014800_CLOCK_BITS #define DT_TIM_STM32_17_CLOCK_BUS DT_ST_STM32_TIMERS_40014800_CLOCK_BUS -#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL +#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL + +#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS +#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL +#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 +#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY +#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS +#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS #define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012400_BASE_ADDRESS #define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012400_IRQ_0 diff --git a/soc/arm/st_stm32/stm32f1/dts_fixup.h b/soc/arm/st_stm32/stm32f1/dts_fixup.h index 84ce751b6b2..49df0d217f2 100644 --- a/soc/arm/st_stm32/stm32f1/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f1/dts_fixup.h @@ -209,7 +209,14 @@ #define DT_TIM_STM32_8_CLOCK_BITS DT_ST_STM32_TIMERS_40013400_CLOCK_BITS #define DT_TIM_STM32_8_CLOCK_BUS DT_ST_STM32_TIMERS_40013400_CLOCK_BUS -#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL +#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL + +#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS +#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL +#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 +#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY +#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS +#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS #define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012400_BASE_ADDRESS #define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012400_IRQ_0 diff --git a/soc/arm/st_stm32/stm32f2/dts_fixup.h b/soc/arm/st_stm32/stm32f2/dts_fixup.h index fdf6255e7b0..3c1c03fd029 100644 --- a/soc/arm/st_stm32/stm32f2/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f2/dts_fixup.h @@ -148,7 +148,14 @@ #define DT_USB_CLOCK_BITS DT_ST_STM32_OTGFS_50000000_CLOCK_BITS #define DT_USB_CLOCK_BUS DT_ST_STM32_OTGFS_50000000_CLOCK_BUS -#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL +#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL + +#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS +#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL +#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 +#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY +#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS +#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS #define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012000_BASE_ADDRESS #define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012000_IRQ_0 diff --git a/soc/arm/st_stm32/stm32f3/dts_fixup.h b/soc/arm/st_stm32/stm32f3/dts_fixup.h index 56367bb8936..49e6f539be5 100644 --- a/soc/arm/st_stm32/stm32f3/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f3/dts_fixup.h @@ -262,10 +262,18 @@ #define CONFIG_RTC_0_NAME DT_ST_STM32_RTC_40002800_LABEL #define DT_RTC_0_NAME DT_ST_STM32_RTC_40002800_LABEL #define CONFIG_RTC_PRESCALER DT_ST_STM32_RTC_40002800_PRESCALER -#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL #define DT_RTC_0_CLOCK_BITS DT_ST_STM32_RTC_40002800_CLOCK_BITS #define DT_RTC_0_CLOCK_BUS DT_ST_STM32_RTC_40002800_CLOCK_BUS +#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL + +#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS +#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL +#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 +#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY +#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS +#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS + #define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_50000000_BASE_ADDRESS #define DT_ADC_1_IRQ DT_ST_STM32_ADC_50000000_IRQ_0 #define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_50000000_IRQ_0_PRIORITY diff --git a/soc/arm/st_stm32/stm32f4/dts_fixup.h b/soc/arm/st_stm32/stm32f4/dts_fixup.h index f6c5e0d90c1..19d7912ac40 100644 --- a/soc/arm/st_stm32/stm32f4/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f4/dts_fixup.h @@ -398,7 +398,14 @@ #define DT_RTC_0_CLOCK_BITS DT_ST_STM32_RTC_40002800_CLOCK_BITS #define DT_RTC_0_CLOCK_BUS DT_ST_STM32_RTC_40002800_CLOCK_BUS -#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL +#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL + +#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS +#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL +#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 +#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY +#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS +#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS #define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012000_BASE_ADDRESS #define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012000_IRQ_0 diff --git a/soc/arm/st_stm32/stm32f7/dts_fixup.h b/soc/arm/st_stm32/stm32f7/dts_fixup.h index 2908911d5a5..e5aecc5263a 100644 --- a/soc/arm/st_stm32/stm32f7/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f7/dts_fixup.h @@ -392,7 +392,14 @@ #define DT_CAN_1_CLOCK_BUS DT_ST_STM32_CAN_40006400_CLOCK_BUS #define DT_CAN_1_CLOCK_BITS DT_ST_STM32_CAN_40006400_CLOCK_BITS -#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL +#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL + +#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS +#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL +#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 +#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY +#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS +#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS #define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012000_BASE_ADDRESS #define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012000_IRQ_0 diff --git a/soc/arm/st_stm32/stm32g0/dts_fixup.h b/soc/arm/st_stm32/stm32g0/dts_fixup.h index 1931f00dd6e..a5f8b051bf4 100644 --- a/soc/arm/st_stm32/stm32g0/dts_fixup.h +++ b/soc/arm/st_stm32/stm32g0/dts_fixup.h @@ -80,4 +80,11 @@ #define DT_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS #define DT_UART_STM32_USART_2_HW_FLOW_CONTROL DT_ST_STM32_USART_40004400_HW_FLOW_CONTROL +#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS +#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL +#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 +#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY +#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS +#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS + /* End of SoC Level DTS fixup file */ diff --git a/soc/arm/st_stm32/stm32h7/dts_fixup.h b/soc/arm/st_stm32/stm32h7/dts_fixup.h index 46dabac8ae3..84d9d8ac7ae 100644 --- a/soc/arm/st_stm32/stm32h7/dts_fixup.h +++ b/soc/arm/st_stm32/stm32h7/dts_fixup.h @@ -181,4 +181,11 @@ #define DT_UART_STM32_UART_8_CLOCK_BUS DT_ST_STM32_UART_40007C00_CLOCK_BUS #define DT_UART_STM32_UART_8_HW_FLOW_CONTROL DT_ST_STM32_UART_40007C00_HW_FLOW_CONTROL +#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS +#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL +#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 +#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY +#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS +#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS + /* End of SoC Level DTS fixup file */ diff --git a/soc/arm/st_stm32/stm32l0/dts_fixup.h b/soc/arm/st_stm32/stm32l0/dts_fixup.h index 9bcee3dbe93..2d61465f4e3 100644 --- a/soc/arm/st_stm32/stm32l0/dts_fixup.h +++ b/soc/arm/st_stm32/stm32l0/dts_fixup.h @@ -133,7 +133,14 @@ #define DT_USB_CLOCK_BITS DT_ST_STM32_USB_40005C00_CLOCK_BITS #define DT_USB_CLOCK_BUS DT_ST_STM32_USB_40005C00_CLOCK_BUS -#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL +#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL + +#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS +#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL +#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 +#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY +#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS +#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS #define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012400_BASE_ADDRESS #define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012400_IRQ_0 diff --git a/soc/arm/st_stm32/stm32l1/dts_fixup.h b/soc/arm/st_stm32/stm32l1/dts_fixup.h index f165e6bcfea..e9c9d1b31c9 100644 --- a/soc/arm/st_stm32/stm32l1/dts_fixup.h +++ b/soc/arm/st_stm32/stm32l1/dts_fixup.h @@ -109,4 +109,11 @@ #define DT_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V1_40005800_CLOCK_BITS #define DT_I2C_2_CLOCK_BUS DT_ST_STM32_I2C_V1_40005800_CLOCK_BUS +#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS +#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL +#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 +#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY +#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS +#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS + /* End of SoC Level DTS fixup file */ diff --git a/soc/arm/st_stm32/stm32l4/dts_fixup.h b/soc/arm/st_stm32/stm32l4/dts_fixup.h index c7c13833bd3..7ae56a8055f 100644 --- a/soc/arm/st_stm32/stm32l4/dts_fixup.h +++ b/soc/arm/st_stm32/stm32l4/dts_fixup.h @@ -314,7 +314,14 @@ #define DT_CAN_1_CLOCK_BUS DT_ST_STM32_CAN_40006400_CLOCK_BUS #define DT_CAN_1_CLOCK_BITS DT_ST_STM32_CAN_40006400_CLOCK_BITS -#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL +#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL + +#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS +#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL +#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 +#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY +#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS +#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS #define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_50040000_BASE_ADDRESS #define DT_ADC_1_IRQ DT_ST_STM32_ADC_50040000_IRQ_0 diff --git a/soc/arm/st_stm32/stm32mp1/dts_fixup.h b/soc/arm/st_stm32/stm32mp1/dts_fixup.h index 4c4d9953397..105f25c14cf 100644 --- a/soc/arm/st_stm32/stm32mp1/dts_fixup.h +++ b/soc/arm/st_stm32/stm32mp1/dts_fixup.h @@ -389,5 +389,11 @@ #define DT_I2C_5_CLOCK_BITS DT_ST_STM32_I2C_V2_40015000_CLOCK_BITS #define DT_I2C_5_CLOCK_BUS DT_ST_STM32_I2C_V2_40015000_CLOCK_BUS +#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS +#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL +#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 +#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY +#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS +#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS /* End of SoC Level DTS fixup file */ diff --git a/soc/arm/st_stm32/stm32wb/dts_fixup.h b/soc/arm/st_stm32/stm32wb/dts_fixup.h index cb56e735c29..d8d93d93fe9 100644 --- a/soc/arm/st_stm32/stm32wb/dts_fixup.h +++ b/soc/arm/st_stm32/stm32wb/dts_fixup.h @@ -155,4 +155,11 @@ #define DT_ADC_1_CLOCK_BITS DT_ST_STM32_ADC_50040000_CLOCK_BITS_0 #define DT_ADC_1_CLOCK_BUS DT_ST_STM32_ADC_50040000_CLOCK_BUS_0 +#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS +#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL +#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 +#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY +#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS +#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS + /* End of SoC Level DTS fixup file */