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soc: stm32: Add fixups for WWDG EWI and clock info

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Extended the WWDG fixups to support early wake interrupt handling and
clock information.

Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
This commit is contained in:
Ioannis Konstantelias 2019-07-15 15:47:29 +03:00 • committed by Kumar Gala
commit f9152adc81
13 changed files with 99 additions and 8 deletions
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9
soc/arm/st_stm32/stm32f0/dts_fixup.h
View file

@ -188,7 +188,14 @@
#define DT_TIM_STM32_17_CLOCK_BITS DT_ST_STM32_TIMERS_40014800_CLOCK_BITS
#define DT_TIM_STM32_17_CLOCK_BUS DT_ST_STM32_TIMERS_40014800_CLOCK_BUS
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012400_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012400_IRQ_0

9
soc/arm/st_stm32/stm32f1/dts_fixup.h
View file

@ -209,7 +209,14 @@
#define DT_TIM_STM32_8_CLOCK_BITS DT_ST_STM32_TIMERS_40013400_CLOCK_BITS
#define DT_TIM_STM32_8_CLOCK_BUS DT_ST_STM32_TIMERS_40013400_CLOCK_BUS
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012400_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012400_IRQ_0

9
soc/arm/st_stm32/stm32f2/dts_fixup.h
View file

@ -148,7 +148,14 @@
#define DT_USB_CLOCK_BITS DT_ST_STM32_OTGFS_50000000_CLOCK_BITS
#define DT_USB_CLOCK_BUS DT_ST_STM32_OTGFS_50000000_CLOCK_BUS
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012000_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012000_IRQ_0

10
soc/arm/st_stm32/stm32f3/dts_fixup.h
View file

@ -262,10 +262,18 @@
#define CONFIG_RTC_0_NAME DT_ST_STM32_RTC_40002800_LABEL
#define DT_RTC_0_NAME DT_ST_STM32_RTC_40002800_LABEL
#define CONFIG_RTC_PRESCALER DT_ST_STM32_RTC_40002800_PRESCALER
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_RTC_0_CLOCK_BITS DT_ST_STM32_RTC_40002800_CLOCK_BITS
#define DT_RTC_0_CLOCK_BUS DT_ST_STM32_RTC_40002800_CLOCK_BUS
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_50000000_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_50000000_IRQ_0
#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_50000000_IRQ_0_PRIORITY

9
soc/arm/st_stm32/stm32f4/dts_fixup.h
View file

@ -398,7 +398,14 @@
#define DT_RTC_0_CLOCK_BITS DT_ST_STM32_RTC_40002800_CLOCK_BITS
#define DT_RTC_0_CLOCK_BUS DT_ST_STM32_RTC_40002800_CLOCK_BUS
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012000_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012000_IRQ_0

9
soc/arm/st_stm32/stm32f7/dts_fixup.h
View file

@ -392,7 +392,14 @@
#define DT_CAN_1_CLOCK_BUS DT_ST_STM32_CAN_40006400_CLOCK_BUS
#define DT_CAN_1_CLOCK_BITS DT_ST_STM32_CAN_40006400_CLOCK_BITS
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012000_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012000_IRQ_0

7
soc/arm/st_stm32/stm32g0/dts_fixup.h
View file

@ -80,4 +80,11 @@
#define DT_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
#define DT_UART_STM32_USART_2_HW_FLOW_CONTROL DT_ST_STM32_USART_40004400_HW_FLOW_CONTROL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
/* End of SoC Level DTS fixup file */

7
soc/arm/st_stm32/stm32h7/dts_fixup.h
View file

@ -181,4 +181,11 @@
#define DT_UART_STM32_UART_8_CLOCK_BUS DT_ST_STM32_UART_40007C00_CLOCK_BUS
#define DT_UART_STM32_UART_8_HW_FLOW_CONTROL DT_ST_STM32_UART_40007C00_HW_FLOW_CONTROL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
/* End of SoC Level DTS fixup file */

9
soc/arm/st_stm32/stm32l0/dts_fixup.h
View file

@ -133,7 +133,14 @@
#define DT_USB_CLOCK_BITS DT_ST_STM32_USB_40005C00_CLOCK_BITS
#define DT_USB_CLOCK_BUS DT_ST_STM32_USB_40005C00_CLOCK_BUS
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012400_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012400_IRQ_0

7
soc/arm/st_stm32/stm32l1/dts_fixup.h
View file

@ -109,4 +109,11 @@
#define DT_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V1_40005800_CLOCK_BITS
#define DT_I2C_2_CLOCK_BUS DT_ST_STM32_I2C_V1_40005800_CLOCK_BUS
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
/* End of SoC Level DTS fixup file */

9
soc/arm/st_stm32/stm32l4/dts_fixup.h
View file

@ -314,7 +314,14 @@
#define DT_CAN_1_CLOCK_BUS DT_ST_STM32_CAN_40006400_CLOCK_BUS
#define DT_CAN_1_CLOCK_BITS DT_ST_STM32_CAN_40006400_CLOCK_BITS
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_50040000_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_50040000_IRQ_0

6
soc/arm/st_stm32/stm32mp1/dts_fixup.h
View file

@ -389,5 +389,11 @@
#define DT_I2C_5_CLOCK_BITS DT_ST_STM32_I2C_V2_40015000_CLOCK_BITS
#define DT_I2C_5_CLOCK_BUS DT_ST_STM32_I2C_V2_40015000_CLOCK_BUS
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
/* End of SoC Level DTS fixup file */

7
soc/arm/st_stm32/stm32wb/dts_fixup.h
View file

@ -155,4 +155,11 @@
#define DT_ADC_1_CLOCK_BITS DT_ST_STM32_ADC_50040000_CLOCK_BITS_0
#define DT_ADC_1_CLOCK_BUS DT_ST_STM32_ADC_50040000_CLOCK_BUS_0
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
/* End of SoC Level DTS fixup file */