From f8b068ed88f248759f8661fa31cdd4b51ab476fb Mon Sep 17 00:00:00 2001 From: Ioannis Glaropoulos Date: Fri, 23 Aug 2019 16:09:42 +0200 Subject: [PATCH] release: adding release notes draft for ARM architecture Zephyr 2.0 release notes draft for the ARM architecture. Signed-off-by: Ioannis Glaropoulos --- doc/releases/release-notes-2.0.rst | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/doc/releases/release-notes-2.0.rst b/doc/releases/release-notes-2.0.rst index 9ab7c772a14..9104ca4a221 100644 --- a/doc/releases/release-notes-2.0.rst +++ b/doc/releases/release-notes-2.0.rst @@ -19,19 +19,38 @@ Major enhancements with this release include: connection between two nodes. * We added support for UpdateHub which is an end-to-end solution for large scale over-the-air update of devices. +* We added support for ARM Cortex-R Architecture (EXPERIMENTAL). The following sections provide detailed lists of changes by component. Kernel ****** -* TBD +* New kernel API for per-thread disabling of Floating Point Services for + ARC, ARM Cortex-M, and x86 architectures. Architectures ************* -* POSIX: Fix race condition with terminated threads which had never been - scheduled by kernel. On very loaded systems it could cause swap errors. +* ARM: + + * Added initial support for ARM Cortex-R architecture (EXPERIMENTAL) + * We enhanced the support for Floating Point Services in Cortex-M + architecture, implementing and enabling lazy-stacking for FPU + capable threads and fixing stack overflow detection for FPU + capable supervisor threads + * Added Qemu support for ARMv8-M Mainline architecture + * Optimized the IRQ locking time in thread context switch + * Fixed several critical bugs in User Mode implementation + * Added test coverage for ARM-specific kernel features + * Improved support for linking TrustZone Secure Entry functions into + Non-Secure firmware + + +* POSIX: + + * Fix race condition with terminated threads which had never been + scheduled by kernel. On very loaded systems it could cause swap errors. Boards & SoC Support ********************