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boards: st: stm32n6570_dk: add display support

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Add support of Rockchip RK050HR18C 800x480 RGB 24bits
panel connected on LTDC display parallel interface of
STM32N6570-DK board.

Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
This commit is contained in:
Hugues Fruchet 2025-04-03 11:26:24 +02:00 • committed by Benjamin Cabé
commit f88aa82b39
2 changed files with 66 additions and 0 deletions
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9
boards/st/stm32n6570_dk/Kconfig.defconfig
View file

@ -12,4 +12,13 @@ config NET_L2_ETHERNET
endif # NETWORKING endif # NETWORKING
if DISPLAY
# MEMC needs to be enabled in order to store
# display frame buffer to external PSRAM
config MEMC
default y
endif # DISPLAY
endif # BOARD_STM32N6570_DK endif # BOARD_STM32N6570_DK

57
boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi
View file

@ -6,8 +6,10 @@
#include <st/n6/stm32n657X0.dtsi> #include <st/n6/stm32n657X0.dtsi>
#include <st/n6/stm32n657x0hxq-pinctrl.dtsi> #include <st/n6/stm32n657x0hxq-pinctrl.dtsi>
#include "zephyr/dt-bindings/display/panel.h"
#include <zephyr/dt-bindings/flash_controller/xspi.h> #include <zephyr/dt-bindings/flash_controller/xspi.h>
#include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/video/video-interfaces.h>
#include "arduino_r3_connector.dtsi" #include "arduino_r3_connector.dtsi"
/ { / {
@ -16,6 +18,7 @@
zephyr,shell-uart = &usart1; zephyr,shell-uart = &usart1;
zephyr,sram = &axisram2; zephyr,sram = &axisram2;
zephyr,canbus = &fdcan1; zephyr,canbus = &fdcan1;
zephyr,display = &ltdc;
spi-flash0 = &mx66uw1g45g; spi-flash0 = &mx66uw1g45g;
}; };
@ -74,6 +77,15 @@
status = "okay"; status = "okay";
}; };
&pll4 {
clocks = <&clk_hsi>;
div-m = <4>;
mul-n = <75>;
div-p1 = <1>;
div-p2 = <1>;
status = "okay";
};
&ic1 { &ic1 {
pll-src = <1>; pll-src = <1>;
ic-div = <2>; ic-div = <2>;
@ -104,6 +116,12 @@
status = "okay"; status = "okay";
}; };
&ic16 {
pll-src = <4>;
ic-div = <60>;
status = "okay";
};
&perck { &perck {
clocks = <&rcc STM32_SRC_HSI PER_SEL(0)>; clocks = <&rcc STM32_SRC_HSI PER_SEL(0)>;
status = "okay"; status = "okay";
@ -289,3 +307,42 @@ zephyr_udc0: &usbotg_hs1 {
reg = <0x0>; reg = <0x0>;
}; };
}; };
&ltdc {
clocks = <&rcc STM32_CLOCK(APB5, 1)>,
<&rcc STM32_SRC_IC16 LTDC_SEL(2)>;
pinctrl-0 = <&ltdc_r0_pg0 &ltdc_r1_pd9 &ltdc_r2_pd15 &ltdc_r3_pb4
&ltdc_r4_ph4 &ltdc_r5_pa15 &ltdc_r6_pg11 &ltdc_r7_pd8
&ltdc_g0_pg12 &ltdc_g1_pg1 &ltdc_g2_pa1 &ltdc_g3_pa0
&ltdc_g4_pb15 &ltdc_g5_pb12 &ltdc_g6_pb11 &ltdc_g7_pg8
&ltdc_b0_pg15 &ltdc_b1_pa7 &ltdc_b2_pb2 &ltdc_b3_pg6
&ltdc_b4_ph3 &ltdc_b5_ph6 &ltdc_b6_pa8 &ltdc_b7_pa2
&ltdc_de_pg13 &ltdc_clk_pb13 &ltdc_hsync_pb14 &ltdc_vsync_pe11>;
pinctrl-names = "default";
disp-on-gpios = <&gpioq 3 GPIO_ACTIVE_HIGH>;
bl-ctrl-gpios = <&gpioq 6 GPIO_ACTIVE_HIGH>;
ext-sdram = <&psram>;
status = "okay";
width = <800>;
height = <480>;
pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
display-timings {
compatible = "zephyr,panel-timing";
de-active = <0>;
pixelclk-active = <0>;
hsync-active = <0>;
vsync-active = <0>;
hsync-len = <4>;
vsync-len = <4>;
hback-porch = <8>;
vback-porch = <8>;
hfront-porch = <8>;
vfront-porch = <8>;
};
def-back-color-red = <0xFF>;
def-back-color-green = <0xFF>;
def-back-color-blue = <0xFF>;
};