From f868d391ec1177b0f018d1e40ecefd6b807187b5 Mon Sep 17 00:00:00 2001 From: Jeff Daly Date: Thu, 10 Aug 2023 16:02:24 -0400 Subject: [PATCH] Samples: Fix XEC clock control sample code for MEC172x using new GPIOs. The XEC clock control driver sample code uses enum indexes to offset to the desired GPIO CTRL register of the package. These enums are only used in this example code and are being removed in favor of calculated indexing into the specific GPIO register memory map. Signed-off-by: Jeff Daly --- samples/drivers/clock_control_xec/src/main.c | 10 ++++++---- soc/arm/microchip_mec/common/reg/mec_gpio.h | 2 ++ 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/samples/drivers/clock_control_xec/src/main.c b/samples/drivers/clock_control_xec/src/main.c index f66347c9c8c..d4462bb882b 100644 --- a/samples/drivers/clock_control_xec/src/main.c +++ b/samples/drivers/clock_control_xec/src/main.c @@ -5,9 +5,11 @@ */ #include #include +#include #include #include #include +#include #include #include #include @@ -179,8 +181,8 @@ static void vbat_power_fail(void) } #endif -static const struct gpio_ctrl_regs * const gpc = - (struct gpio_ctrl_regs *)(DT_REG_ADDR(DT_NODELABEL(gpio_000_036))); +static const struct gpio_regs * const gpio = + (struct gpio_regs *)(DT_REG_ADDR(DT_NODELABEL(gpio_000_036))); static const struct device *clkdev = DEVICE_DT_GET(DT_NODELABEL(pcr)); struct sys_clk { @@ -214,8 +216,8 @@ int main(void) vbat_power_fail(); LOG_INF("32KHZ_IN is function 1 of GPIO 0165"); - r = gpc->CTRL_0165; - LOG_INF("XEC GPIO 0165 Control = 0x%x", gpc->CTRL_0165); + r = gpio->CTRL[MCHP_XEC_PINCTRL_REG_IDX(0165)]; + LOG_INF("XEC GPIO 0165 Control = 0x%x", r); r = (r & MCHP_GPIO_CTRL_MUX_MASK) >> MCHP_GPIO_CTRL_MUX_POS; LOG_INF("Pin function = %u", r); vbat_clock_regs(); diff --git a/soc/arm/microchip_mec/common/reg/mec_gpio.h b/soc/arm/microchip_mec/common/reg/mec_gpio.h index bf9ac425046..0fb2e240d8c 100644 --- a/soc/arm/microchip_mec/common/reg/mec_gpio.h +++ b/soc/arm/microchip_mec/common/reg/mec_gpio.h @@ -10,6 +10,8 @@ #include #include +#define MCHP_XEC_PINCTRL_REG_IDX(pin) ((pin >> 5) * 32 + (pin & 0x1f)) + /** @brief All GPIO register as arrays of registers */ struct gpio_regs { volatile uint32_t CTRL[174];