From f862716eb680b99444eee9610abf457fd9131fc2 Mon Sep 17 00:00:00 2001
From: Tony Han <tony.han@microchip.com>
Date: Thu, 24 Apr 2025 17:10:00 +0800
Subject: [PATCH] boards: microchip: sam: add the device-tree file for
 sama7g54_ek board

Introduce sama7g54_ek.dts for sama7g54_ek board.

Signed-off-by: Tony Han <tony.han@microchip.com>
---
 .../microchip/sam/sama7g54_ek/sama7g54_ek.dts | 64 +++++++++++++++++++
 1 file changed, 64 insertions(+)
 create mode 100644 boards/microchip/sam/sama7g54_ek/sama7g54_ek.dts

diff --git a/boards/microchip/sam/sama7g54_ek/sama7g54_ek.dts b/boards/microchip/sam/sama7g54_ek/sama7g54_ek.dts
new file mode 100644
index 00000000000..82648923842
--- /dev/null
+++ b/boards/microchip/sam/sama7g54_ek/sama7g54_ek.dts
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ */
+
+/dts-v1/;
+#include <common/freq.h>
+#include <dt-bindings/mfd/mfd_mchp_sam_flexcom.h>
+#include <dt-bindings/pinctrl/sama7g5-pinctrl.h>
+#include <microchip/sam/sama7g5.dtsi>
+
+/ {
+	model = "SAMA7G54-EK board";
+	compatible = "microchip,sama7g5ek", "microchip,sama7g5", "microchip,sama7";
+
+	chosen {
+		zephyr,sram = &ddram;
+		zephyr,console = &usart3;
+		zephyr,shell-uart = &usart3;
+	};
+
+	clocks {
+		main_xtal {
+			clock-frequency = <DT_FREQ_M(24)>;
+		};
+
+		slow_xtal {
+			clock-frequency = <32768>;
+		};
+	};
+
+	ddram: ddram@60000000 {
+		compatible = "ddram";
+		reg = <0x60000000 DT_SIZE_M(512)>;
+	};
+};
+
+&flx3 {
+	mchp,flexcom-mode = <SAM_FLEXCOM_MODE_USART>;
+	status = "okay";
+
+	usart3: serial@200 {
+		current-speed = <115200>;
+		pinctrl-0 = <&pinctrl_flx3_default>;
+		pinctrl-names = "default";
+		status = "okay";
+	};
+};
+
+&pinctrl {
+	pinctrl_flx3_default: flx3_default {
+		group1 {
+			pinmux = <PIN_PD16__FLEXCOM3_IO0>,
+				 <PIN_PD17__FLEXCOM3_IO1>;
+			bias-pull-up;
+		};
+	};
+};
+
+&pit64b0 {
+	clock-frequency = <DT_FREQ_M(10)>;
+};