From f8130d5ce3c01b300b3f0ca0d1bf2eec1c61c619 Mon Sep 17 00:00:00 2001
From: Jay Vasanth <jay.vasanth@microchip.com>
Date: Fri, 21 Jan 2022 12:15:27 -0500
Subject: [PATCH] espi: updated MEC172x espi module for pinctrl

Changes to espi module to support pinctrl

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
---
 drivers/espi/espi_mchp_xec_v2.c              | 14 +++++++++++++-
 drivers/espi/espi_mchp_xec_v2.h              |  5 ++++-
 dts/bindings/espi/microchip,xec-espi-v2.yaml |  8 +++++++-
 3 files changed, 24 insertions(+), 3 deletions(-)

diff --git a/drivers/espi/espi_mchp_xec_v2.c b/drivers/espi/espi_mchp_xec_v2.c
index 1faa3433567..9dc37d35ffd 100644
--- a/drivers/espi/espi_mchp_xec_v2.c
+++ b/drivers/espi/espi_mchp_xec_v2.c
@@ -1207,13 +1207,17 @@ static const struct espi_xec_irq_info espi_xec_irq_info_0[] = {
 	DT_FOREACH_PROP_ELEM(DT_NODELABEL(espi0), girqs, XEC_IRQ_INFO)
 };
 
+/* pin control structure(s) */
+PINCTRL_DT_INST_DEFINE(0);
+
 static const struct espi_xec_config espi_xec_config = {
 	.base_addr = DT_INST_REG_ADDR(0),
 	.vw_base_addr = DT_INST_REG_ADDR_BY_NAME(0, vw),
 	.pcr_idx = DT_INST_PROP_BY_IDX(0, pcrs, 0),
 	.pcr_bitpos = DT_INST_PROP_BY_IDX(0, pcrs, 1),
-	.irq_info_list = espi_xec_irq_info_0,
 	.irq_info_size = ARRAY_SIZE(espi_xec_irq_info_0),
+	.irq_info_list = espi_xec_irq_info_0,
+	.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(0),
 };
 
 DEVICE_DT_INST_DEFINE(0, &espi_xec_init, NULL,
@@ -1288,6 +1292,8 @@ static void espi_xec_connect_irqs(const struct device *dev)
  * contains the state of 4 virtual wires.
  * The total supported virtual wires is 64 * 4 = 256.
  * MEC172x supports 11 MSVW groups and 11 SMVW groups.
+ * NOTE: While ESPI_nRESET is active most of the eSPI hardware is held
+ * in reset state.
  */
 static int espi_xec_init(const struct device *dev)
 {
@@ -1297,6 +1303,12 @@ static int espi_xec_init(const struct device *dev)
 	struct pcr_regs *pcr = XEC_PCR_REG_BASE;
 	int ret;
 
+	ret = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
+	if (ret != 0) {
+		LOG_ERR("XEC eSPI V2 pinctrl setup failed (%d)", ret);
+		return ret;
+	}
+
 	data->plt_rst_asserted = 0;
 #ifdef ESPI_XEC_V2_DEBUG
 	data->espi_rst_count = 0;
diff --git a/drivers/espi/espi_mchp_xec_v2.h b/drivers/espi/espi_mchp_xec_v2.h
index d984c39a50e..c10e4bb8c6e 100644
--- a/drivers/espi/espi_mchp_xec_v2.h
+++ b/drivers/espi/espi_mchp_xec_v2.h
@@ -10,6 +10,7 @@
 #include <stdint.h>
 #include <device.h>
 #include <drivers/espi.h>
+#include <drivers/pinctrl.h>
 
 #define ESPI_XEC_V2_DEBUG	1
 
@@ -38,8 +39,10 @@ struct espi_xec_config {
 	uint32_t vw_base_addr;
 	uint8_t pcr_idx;
 	uint8_t pcr_bitpos;
-	const struct espi_xec_irq_info *irq_info_list;
 	uint8_t irq_info_size;
+	uint8_t rsvd[1];
+	const struct espi_xec_irq_info *irq_info_list;
+	const struct pinctrl_dev_config *pcfg;
 };
 
 #define ESPI_XEC_CONFIG(dev)						\
diff --git a/dts/bindings/espi/microchip,xec-espi-v2.yaml b/dts/bindings/espi/microchip,xec-espi-v2.yaml
index 563dc93a52f..3d919577e7a 100644
--- a/dts/bindings/espi/microchip,xec-espi-v2.yaml
+++ b/dts/bindings/espi/microchip,xec-espi-v2.yaml
@@ -6,7 +6,7 @@ description: Microchip ESPI V2 controller
 
 compatible: "microchip,xec-espi-v2"
 
-include: espi-controller.yaml
+include: [espi-controller.yaml, pinctrl-device.yaml]
 
 properties:
     reg:
@@ -28,6 +28,12 @@ properties:
       required: true
       description: eSPI PCR register index and bit position
 
+    pinctrl-0:
+      required: true
+
+    pinctrl-names:
+      required: true
+
     "#girq-cells":
       type: int
       const: 1