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arch: arm: aarch32: initialize FPSCR to reset value for ARMv8.1

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With GCC 11 now supporting low overhead branching in ARMv8.1, ASM "LE"
(loop-end) instructions would trigger an INVSTATE hard-fault after
FPSCR was set to 0. This was due to the FPSCR getting a new field in
ARMv8.1. LTPSIZE is now set to it's reset value of Tail predication not
applied.

Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
This commit is contained in:
Ryan McClelland 2022-04-12 00:35:41 -07:00 • committed by Marti Bolivar
commit f7ddcd2713
3 changed files with 24 additions and 0 deletions
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8
tests/arch/arm/arm_interrupt/src/arm_interrupt.c
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@ -197,7 +197,15 @@ void arm_isr_handler(const void *args)
* to prevent from having the interrupt line set to pending again,
* in case FPU IRQ is selected by the test as "Available IRQ line"
*/
#if defined(CONFIG_ARMV8_1_M_MAINLINE)
/*
* For ARMv8.1-M with FPU, the FPSCR[18:16] LTPSIZE field must be set
* to 0b100 for "Tail predication not applied" as it's reset value
*/
__set_FPSCR(4 << FPU_FPDSCR_LTPSIZE_Pos);
#else
__set_FPSCR(0);
#endif
#endif
test_flag++;