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drivers/i2c: Add I2C driver of it51xxx

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Implement the functions of I2C host and target.
I2CM: supports nine hosts and each one able located at I2C interface
      0~12.
      supports two 32 bytes dedicated FIFO mode for read and write.
I2CS: supports three targets and each one able located at I2C
      interface 0~8.
      supports 16 bytes dedicated FIFO mode that only supports write or
      read mode and the maximum buffer size is 256 bytes.
      support non-FIFO write to shared FIFO read mode. The maximum
      shared FIFO size for read is 256 bytes.
The APIs test include: i2c_write(), i2c_read(), i2c_burst_read(),
                       i2c_burst_write(), i2c_write_read()

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit is contained in:
Tim Lin 2024-12-24 14:33:29 +08:00 • committed by Benjamin Cabé
commit f7d381fef1
13 changed files with 2405 additions and 8 deletions
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12
soc/ite/ec/it51xxx/chip_chipregs.h
View file

@ -323,4 +323,16 @@ struct gctrl_it51xxx_regs {
#define gctrl_ite_ec_regs gctrl_it51xxx_regs
#define GCTRL_ITE_EC_REGS_BASE GCTRL_IT51XXX_REGS_BASE
/**
*
* (42xxh) SMBus Interface for target (SMB) registers
*
*/
#define IT51XXX_SMB_BASE 0xf04200
/* 0x0a, 0x2a, 0x4a: Slave n Dedicated FIFO Pre-defined Control Register */
#define SMB_SADFPCTL (IT51XXX_SMB_BASE + 0x0a)
#define SMB_SBDFPCTL (IT51XXX_SMB_BASE + 0x2a)
#define SMB_SCDFPCTL (IT51XXX_SMB_BASE + 0x4a)
#define SMB_HSAPE BIT(1)
#endif /* CHIP_CHIPREGS_H */

9
soc/ite/ec/it51xxx/soc.c
View file

@ -116,4 +116,13 @@ void soc_prep_hook(void)
/* Switch UART1 and UART2 on without hardware flow control */
gpio_regs->GPIO_GCR1 |=
IT51XXX_GPIO_U1CTRL_SIN0_SOUT0_EN | IT51XXX_GPIO_U2CTRL_SIN1_SOUT1_EN;
/*
* Disable this feature that can detect pre-define hardware target A, B, C through
* I2C0, I2C1, I2C2 respectively. This is for debugging use, so it can be disabled
* to avoid illegal access.
*/
sys_write8(sys_read8(SMB_SADFPCTL) & ~SMB_HSAPE, SMB_SADFPCTL);
sys_write8(sys_read8(SMB_SBDFPCTL) & ~SMB_HSAPE, SMB_SBDFPCTL);
sys_write8(sys_read8(SMB_SCDFPCTL) & ~SMB_HSAPE, SMB_SCDFPCTL);
}