From f74a84b251cd21a71ce0c6f47019919c68730d27 Mon Sep 17 00:00:00 2001 From: Flavio Ceolin Date: Wed, 10 Apr 2024 19:39:11 +0000 Subject: [PATCH] xtensa: mmu: MMU re-initialization API With power managment is enabled, depending on the SoC power state used when idle, the MMU may lose context and may need to be re-initialized. When re-initializing the MMU, we must not re-create the page table because it may overwrite changes done during the execution, but we still need to set the asid and page table for the current context. Signed-off-by: Flavio Ceolin --- arch/xtensa/core/ptables.c | 18 ++++++++++++++++++ include/zephyr/arch/xtensa/xtensa_mmu.h | 10 ++++++++++ 2 files changed, 28 insertions(+) diff --git a/arch/xtensa/core/ptables.c b/arch/xtensa/core/ptables.c index f44e17ad6a9..3ae39c6c1f3 100644 --- a/arch/xtensa/core/ptables.c +++ b/arch/xtensa/core/ptables.c @@ -320,6 +320,24 @@ void xtensa_mmu_init(void) arch_xtensa_mmu_post_init(_current_cpu->id == 0); } +void xtensa_mmu_reinit(void) +{ + /* First initialize the hardware */ + xtensa_init_paging(xtensa_kernel_ptables); + +#ifdef CONFIG_USERSPACE + struct k_thread *thread = _current_cpu->current; + struct arch_mem_domain *domain = + &(thread->mem_domain_info.mem_domain->arch); + + + /* Set the page table for current context */ + xtensa_set_paging(domain->asid, domain->ptables); +#endif /* CONFIG_USERSPACE */ + + arch_xtensa_mmu_post_init(_current_cpu->id == 0); +} + #ifdef CONFIG_ARCH_HAS_RESERVED_PAGE_FRAMES /* Zephyr's linker scripts for Xtensa usually puts * something before z_mapped_start (aka .text), diff --git a/include/zephyr/arch/xtensa/xtensa_mmu.h b/include/zephyr/arch/xtensa/xtensa_mmu.h index d4deca40b31..91da6a4f656 100644 --- a/include/zephyr/arch/xtensa/xtensa_mmu.h +++ b/include/zephyr/arch/xtensa/xtensa_mmu.h @@ -123,6 +123,16 @@ extern int xtensa_soc_mmu_ranges_num; */ void xtensa_mmu_init(void); +/** + * @brief Re-initialize hardware MMU. + * + * This configures the MMU hardware when the cpu lost context and has + * re-started. + * + * It assumes that the page table is already created and accessible in memory. + */ +void xtensa_mmu_reinit(void); + /** * @brief Tell other processors to flush TLBs. *