drivers: Apply SPI API change to relevant places

Mostly drivers, but also one sample and one test.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2021-09-07 15:39:20 +02:00 committed by Carles Cufí
commit f6be2835bd
31 changed files with 81 additions and 65 deletions

View file

@ -130,8 +130,7 @@ static const struct device *spi_dev;
static struct spi_config spi_conf = { static struct spi_config spi_conf = {
.frequency = DT_INST_PROP(0, spi_max_frequency), .frequency = DT_INST_PROP(0, spi_max_frequency),
.operation = (SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(8) | .operation = (SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(8)),
SPI_LINES_SINGLE),
.slave = 0, .slave = 0,
.cs = NULL, .cs = NULL,
}; };

View file

@ -430,8 +430,7 @@ static const struct ssd1306_config ssd1306_config = {
.bus = I2C_DT_SPEC_INST_GET(0), .bus = I2C_DT_SPEC_INST_GET(0),
#elif DT_INST_ON_BUS(0, spi) #elif DT_INST_ON_BUS(0, spi)
.bus = SPI_DT_SPEC_INST_GET( .bus = SPI_DT_SPEC_INST_GET(
0, SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | 0, SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(8), 0),
SPI_WORD_SET(8) | SPI_LINES_SINGLE, 0),
.data_cmd = GPIO_DT_SPEC_INST_GET(0, data_cmd_gpios), .data_cmd = GPIO_DT_SPEC_INST_GET(0, data_cmd_gpios),
#endif #endif
.reset = GPIO_DT_SPEC_INST_GET_OR(0, reset_gpios, { 0 }) .reset = GPIO_DT_SPEC_INST_GET_OR(0, reset_gpios, { 0 })

View file

@ -669,7 +669,7 @@ static const struct flash_driver_api spi_flash_at45_api = {
static const struct spi_flash_at45_config inst_##idx##_config = { \ static const struct spi_flash_at45_config inst_##idx##_config = { \
.bus = SPI_DT_SPEC_INST_GET( \ .bus = SPI_DT_SPEC_INST_GET( \
idx, SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | \ idx, SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | \
SPI_WORD_SET(8) | SPI_LINES_SINGLE, 0), \ SPI_WORD_SET(8), 0), \
IF_ENABLED(INST_HAS_RESET_GPIO(idx), \ IF_ENABLED(INST_HAS_RESET_GPIO(idx), \
(.reset = &reset_##idx,)) \ (.reset = &reset_##idx,)) \
IF_ENABLED(INST_HAS_WP_GPIO(idx), \ IF_ENABLED(INST_HAS_WP_GPIO(idx), \

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@ -378,8 +378,7 @@ static int mcp23s17_init(const struct device *dev)
.bus = SPI_DT_SPEC_INST_GET( \ .bus = SPI_DT_SPEC_INST_GET( \
inst, \ inst, \
SPI_OP_MODE_MASTER | SPI_MODE_CPOL | \ SPI_OP_MODE_MASTER | SPI_MODE_CPOL | \
SPI_MODE_CPHA | SPI_WORD_SET(8) | \ SPI_MODE_CPHA | SPI_WORD_SET(8), 0), \
SPI_LINES_SINGLE, 0), \
}; \ }; \
\ \
static struct mcp23s17_drv_data mcp23s17_##inst##_drvdata = { \ static struct mcp23s17_drv_data mcp23s17_##inst##_drvdata = { \

View file

@ -32,8 +32,7 @@ LOG_MODULE_REGISTER(lpd880x);
*/ */
#define LPD880X_SPI_OPERATION (SPI_OP_MODE_MASTER | \ #define LPD880X_SPI_OPERATION (SPI_OP_MODE_MASTER | \
SPI_TRANSFER_MSB | \ SPI_TRANSFER_MSB | \
SPI_WORD_SET(8) | \ SPI_WORD_SET(8))
SPI_LINES_SINGLE)
struct lpd880x_config { struct lpd880x_config {
struct spi_dt_spec bus; struct spi_dt_spec bus;

View file

@ -34,7 +34,7 @@ LOG_MODULE_REGISTER(ws2812_spi);
* isn't an EEPROM) * isn't an EEPROM)
*/ */
#define SPI_OPER (SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | \ #define SPI_OPER (SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | \
SPI_WORD_SET(SPI_FRAME_BITS) | SPI_LINES_SINGLE) SPI_WORD_SET(SPI_FRAME_BITS))
struct ws2812_spi_cfg { struct ws2812_spi_cfg {
struct spi_dt_spec bus; struct spi_dt_spec bus;

View file

@ -410,8 +410,7 @@ static int icm42605_init(const struct device *dev)
drv_data->spi_cfg.frequency = cfg->frequency; drv_data->spi_cfg.frequency = cfg->frequency;
drv_data->spi_cfg.slave = cfg->slave; drv_data->spi_cfg.slave = cfg->slave;
drv_data->spi_cfg.operation = (SPI_OP_MODE_MASTER | SPI_MODE_CPOL | drv_data->spi_cfg.operation = (SPI_OP_MODE_MASTER | SPI_MODE_CPOL |
SPI_MODE_CPHA | SPI_WORD_SET(8) | SPI_LINES_SINGLE | SPI_MODE_CPHA | SPI_WORD_SET(8) | SPI_TRANSFER_MSB);
SPI_TRANSFER_MSB);
drv_data->spi_cfg.cs = &drv_data->spi_cs; drv_data->spi_cfg.cs = &drv_data->spi_cs;
icm42605_spi_init(drv_data->spi, &drv_data->spi_cfg); icm42605_spi_init(drv_data->spi, &drv_data->spi_cfg);

View file

@ -24,7 +24,7 @@ LOG_MODULE_DECLARE(IIS2DH, CONFIG_SENSOR_LOG_LEVEL);
static struct spi_config iis2dh_spi_conf = { static struct spi_config iis2dh_spi_conf = {
.frequency = DT_INST_PROP(0, spi_max_frequency), .frequency = DT_INST_PROP(0, spi_max_frequency),
.operation = (SPI_OP_MODE_MASTER | SPI_MODE_CPOL | .operation = (SPI_OP_MODE_MASTER | SPI_MODE_CPOL |
SPI_MODE_CPHA | SPI_WORD_SET(8) | SPI_LINES_SINGLE), SPI_MODE_CPHA | SPI_WORD_SET(8)),
.slave = DT_INST_REG_ADDR(0), .slave = DT_INST_REG_ADDR(0),
.cs = NULL, .cs = NULL,
}; };

View file

@ -352,7 +352,6 @@ static int iis2mdc_init(const struct device *dev)
#define IIS2MDC_SPI_OP (SPI_WORD_SET(8) | \ #define IIS2MDC_SPI_OP (SPI_WORD_SET(8) | \
SPI_OP_MODE_MASTER | \ SPI_OP_MODE_MASTER | \
SPI_LINES_SINGLE | \
SPI_MODE_CPOL | \ SPI_MODE_CPOL | \
SPI_MODE_CPHA) \ SPI_MODE_CPHA) \

View file

@ -237,8 +237,7 @@ static const struct iis3dhhc_config iis3dhhc_config = {
.bus_init = iis3dhhc_spi_init, .bus_init = iis3dhhc_spi_init,
.spi_conf.frequency = DT_INST_PROP(0, spi_max_frequency), .spi_conf.frequency = DT_INST_PROP(0, spi_max_frequency),
.spi_conf.operation = (SPI_OP_MODE_MASTER | SPI_MODE_CPOL | .spi_conf.operation = (SPI_OP_MODE_MASTER | SPI_MODE_CPOL |
SPI_MODE_CPHA | SPI_WORD_SET(8) | SPI_MODE_CPHA | SPI_WORD_SET(8)),
SPI_LINES_SINGLE),
.spi_conf.slave = DT_INST_REG_ADDR(0), .spi_conf.slave = DT_INST_REG_ADDR(0),
#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0) #if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
.gpio_cs_port = DT_INST_SPI_DEV_CS_GPIOS_LABEL(0), .gpio_cs_port = DT_INST_SPI_DEV_CS_GPIOS_LABEL(0),

View file

@ -23,7 +23,7 @@ LOG_MODULE_DECLARE(IIS3DHHC, CONFIG_SENSOR_LOG_LEVEL);
static struct spi_config iis3dhhc_spi_conf = { static struct spi_config iis3dhhc_spi_conf = {
.frequency = DT_INST_PROP(0, spi_max_frequency), .frequency = DT_INST_PROP(0, spi_max_frequency),
.operation = (SPI_OP_MODE_MASTER | SPI_MODE_CPOL | .operation = (SPI_OP_MODE_MASTER | SPI_MODE_CPOL |
SPI_MODE_CPHA | SPI_WORD_SET(8) | SPI_LINES_SINGLE), SPI_MODE_CPHA | SPI_WORD_SET(8)),
.slave = DT_INST_REG_ADDR(0), .slave = DT_INST_REG_ADDR(0),
.cs = NULL, .cs = NULL,
}; };

View file

@ -744,8 +744,7 @@ static const struct ism330dhcx_config ism330dhcx_config = {
.bus_init = ism330dhcx_spi_init, .bus_init = ism330dhcx_spi_init,
.spi_conf.frequency = DT_INST_PROP(0, spi_max_frequency), .spi_conf.frequency = DT_INST_PROP(0, spi_max_frequency),
.spi_conf.operation = (SPI_OP_MODE_MASTER | SPI_MODE_CPOL | .spi_conf.operation = (SPI_OP_MODE_MASTER | SPI_MODE_CPOL |
SPI_MODE_CPHA | SPI_WORD_SET(8) | SPI_MODE_CPHA | SPI_WORD_SET(8)),
SPI_LINES_SINGLE),
.spi_conf.slave = DT_INST_REG_ADDR(0), .spi_conf.slave = DT_INST_REG_ADDR(0),
#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0) #if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
.gpio_cs_port = DT_INST_SPI_DEV_CS_GPIOS_LABEL(0), .gpio_cs_port = DT_INST_SPI_DEV_CS_GPIOS_LABEL(0),

View file

@ -513,7 +513,6 @@ static int lis2mdl_pm_action(const struct device *dev,
#define LIS2MDL_SPI_OPERATION (SPI_WORD_SET(8) | \ #define LIS2MDL_SPI_OPERATION (SPI_WORD_SET(8) | \
SPI_OP_MODE_MASTER | \ SPI_OP_MODE_MASTER | \
SPI_LINES_SINGLE | \
SPI_MODE_CPOL | \ SPI_MODE_CPOL | \
SPI_MODE_CPHA) \ SPI_MODE_CPHA) \

View file

@ -220,8 +220,7 @@ static const struct lps22hh_config lps22hh_config = {
.bus_init = lps22hh_spi_init, .bus_init = lps22hh_spi_init,
.spi_conf.frequency = DT_INST_PROP(0, spi_max_frequency), .spi_conf.frequency = DT_INST_PROP(0, spi_max_frequency),
.spi_conf.operation = (SPI_OP_MODE_MASTER | SPI_MODE_CPOL | .spi_conf.operation = (SPI_OP_MODE_MASTER | SPI_MODE_CPOL |
SPI_MODE_CPHA | SPI_WORD_SET(8) | SPI_MODE_CPHA | SPI_WORD_SET(8)),
SPI_LINES_SINGLE),
.spi_conf.slave = DT_INST_REG_ADDR(0), .spi_conf.slave = DT_INST_REG_ADDR(0),
#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0) #if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
.gpio_cs_port = DT_INST_SPI_DEV_CS_GPIOS_LABEL(0), .gpio_cs_port = DT_INST_SPI_DEV_CS_GPIOS_LABEL(0),

View file

@ -874,7 +874,6 @@ static int lsm6dso_init(const struct device *dev)
#define LSM6DSO_SPI_OP (SPI_WORD_SET(8) | \ #define LSM6DSO_SPI_OP (SPI_WORD_SET(8) | \
SPI_OP_MODE_MASTER | \ SPI_OP_MODE_MASTER | \
SPI_LINES_SINGLE | \
SPI_MODE_CPOL | \ SPI_MODE_CPOL | \
SPI_MODE_CPHA) \ SPI_MODE_CPHA) \

View file

@ -317,8 +317,7 @@ static const struct sensor_driver_api ms5607_api_funcs = {
}; };
#define MS5607_SPI_OPERATION (SPI_OP_MODE_MASTER | SPI_WORD_SET(8) | \ #define MS5607_SPI_OPERATION (SPI_OP_MODE_MASTER | SPI_WORD_SET(8) | \
SPI_MODE_CPOL | SPI_MODE_CPHA | \ SPI_MODE_CPOL | SPI_MODE_CPHA | SPI_TRANSFER_MSB)
SPI_TRANSFER_MSB | SPI_LINES_SINGLE)
/* Initializes a struct ms5607_config for an instance on a SPI bus. */ /* Initializes a struct ms5607_config for an instance on a SPI bus. */
#define MS5607_CONFIG_SPI(inst) \ #define MS5607_CONFIG_SPI(inst) \

View file

@ -267,13 +267,16 @@ static bool spi_b91_is_config_supported(const struct spi_config *config,
} }
/* check for lines configuration */ /* check for lines configuration */
if ((config->operation & SPI_LINES_MASK) == SPI_LINES_OCTAL) { if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES)) {
LOG_ERR("SPI lines Octal configuration is not supported"); if ((config->operation & SPI_LINES_MASK) == SPI_LINES_OCTAL) {
return false; LOG_ERR("SPI lines Octal is not supported");
} else if (((config->operation & SPI_LINES_MASK) == SPI_LINES_QUAD) && return false;
(b91_config->peripheral_id == PSPI_MODULE)) { } else if (((config->operation & SPI_LINES_MASK) ==
LOG_ERR("SPI lines Quad configuration is not supported by PSPI"); SPI_LINES_QUAD) &&
return false; (b91_config->peripheral_id == PSPI_MODULE)) {
LOG_ERR("SPI lines Quad is not supported by PSPI");
return false;
}
} }
/* check for slave configuration */ /* check for slave configuration */
@ -326,12 +329,19 @@ static int spi_b91_config(const struct device *dev,
spi_master_config(b91_config->peripheral_id, SPI_NOMAL); spi_master_config(b91_config->peripheral_id, SPI_NOMAL);
/* set lines configuration */ /* set lines configuration */
if ((config->operation & SPI_LINES_MASK) == SPI_LINES_SINGLE) { if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES)) {
spi_set_io_mode(b91_config->peripheral_id, SPI_SINGLE_MODE); uint32_t lines = config->operation & SPI_LINES_MASK;
} else if ((config->operation & SPI_LINES_MASK) == SPI_LINES_DUAL) {
spi_set_io_mode(b91_config->peripheral_id, SPI_DUAL_MODE); if (lines == SPI_LINES_SINGLE) {
} else if ((config->operation & SPI_LINES_MASK) == SPI_LINES_QUAD) { spi_set_io_mode(b91_config->peripheral_id,
spi_set_io_mode(b91_config->peripheral_id, HSPI_QUAD_MODE); SPI_SINGLE_MODE);
} else if (lines == SPI_LINES_DUAL) {
spi_set_io_mode(b91_config->peripheral_id,
SPI_DUAL_MODE);
} else if (lines == SPI_LINES_QUAD) {
spi_set_io_mode(b91_config->peripheral_id,
HSPI_QUAD_MODE);
}
} }
/* get pinmux driver */ /* get pinmux driver */

View file

@ -76,7 +76,8 @@ static int spi_cc13xx_cc26xx_configure(const struct device *dev,
return -EINVAL; return -EINVAL;
} }
if ((config->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) { if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES) &&
(config->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) {
LOG_ERR("Multiple lines are not supported"); LOG_ERR("Multiple lines are not supported");
return -EINVAL; return -EINVAL;
} }

View file

@ -220,8 +220,10 @@ static int spi_dw_configure(const struct spi_dw_config *info,
} }
} }
if (config->operation & (SPI_TRANSFER_LSB | if ((config->operation & SPI_TRANSFER_LSB) ||
SPI_LINES_DUAL | SPI_LINES_QUAD)) { (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES) &&
(config->operation & (SPI_LINES_DUAL |
SPI_LINES_QUAD | SPI_LINES_OCTAL)))) {
LOG_ERR("Unsupported configuration"); LOG_ERR("Unsupported configuration");
return -EINVAL; return -EINVAL;
} }

View file

@ -195,18 +195,22 @@ static int spi_esp32_configure_pin(gpio_pin_t pin, int pin_sig,
static inline spi_ll_io_mode_t spi_esp32_get_io_mode(uint16_t operation) static inline spi_ll_io_mode_t spi_esp32_get_io_mode(uint16_t operation)
{ {
switch (operation & SPI_LINES_MASK) { if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES)) {
case SPI_LINES_SINGLE: switch (operation & SPI_LINES_MASK) {
return SPI_LL_IO_MODE_NORMAL; case SPI_LINES_SINGLE:
case SPI_LINES_DUAL: return SPI_LL_IO_MODE_NORMAL;
return SPI_LL_IO_MODE_DUAL; case SPI_LINES_DUAL:
case SPI_LINES_OCTAL: return SPI_LL_IO_MODE_DUAL;
return SPI_LL_IO_MODE_QIO; case SPI_LINES_OCTAL:
case SPI_LINES_QUAD: return SPI_LL_IO_MODE_QIO;
return SPI_LL_IO_MODE_QUAD; case SPI_LINES_QUAD:
default: return SPI_LL_IO_MODE_QUAD;
return SPI_LL_IO_MODE_NORMAL; default:
break;
}
} }
return SPI_LL_IO_MODE_NORMAL;
} }
static int IRAM_ATTR spi_esp32_configure(const struct device *dev, static int IRAM_ATTR spi_esp32_configure(const struct device *dev,

View file

@ -72,7 +72,8 @@ static int spi_config(const struct device *dev,
return -ENOTSUP; return -ENOTSUP;
} }
if ((config->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) { if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES) &&
(config->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) {
LOG_ERR("Only supports single mode"); LOG_ERR("Only supports single mode");
return -ENOTSUP; return -ENOTSUP;
} }

View file

@ -40,7 +40,8 @@ static int spi_config(const struct spi_config *config, uint16_t *control)
return -ENOTSUP; return -ENOTSUP;
} }
if ((config->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) { if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES) &&
(config->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) {
LOG_ERR("Only supports single mode"); LOG_ERR("Only supports single mode");
return -ENOTSUP; return -ENOTSUP;
} }

View file

@ -110,7 +110,8 @@ static int configure(const struct device *dev,
return -EINVAL; return -EINVAL;
} }
if ((spi_cfg->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) { if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES) &&
(spi_cfg->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) {
LOG_ERR("Only single line mode is supported"); LOG_ERR("Only single line mode is supported");
return -EINVAL; return -EINVAL;
} }

View file

@ -142,7 +142,8 @@ static int configure(const struct device *dev,
return -EINVAL; return -EINVAL;
} }
if ((spi_cfg->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) { if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES) &&
(spi_cfg->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) {
LOG_ERR("Only single line mode is supported"); LOG_ERR("Only single line mode is supported");
return -EINVAL; return -EINVAL;
} }

View file

@ -79,7 +79,8 @@ static int configure(const struct device *dev,
return -EINVAL; return -EINVAL;
} }
if ((spi_cfg->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) { if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES) &&
(spi_cfg->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) {
LOG_ERR("Only single line mode is supported"); LOG_ERR("Only single line mode is supported");
return -EINVAL; return -EINVAL;
} }

View file

@ -48,8 +48,10 @@ static int spi_oc_simple_configure(const struct spi_oc_simple_cfg *info,
return -ENOTSUP; return -ENOTSUP;
} }
if (config->operation & (SPI_MODE_LOOP | SPI_TRANSFER_LSB | if ((config->operation & (SPI_MODE_LOOP | SPI_TRANSFER_LSB)) ||
SPI_LINES_DUAL | SPI_LINES_QUAD)) { (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES) &&
(config->operation &
(SPI_LINES_DUAL | SPI_LINES_QUAD | SPI_LINES_OCTAL)))) {
LOG_ERR("Unsupported configuration"); LOG_ERR("Unsupported configuration");
return -EINVAL; return -EINVAL;
} }

View file

@ -76,7 +76,8 @@ int spi_config(const struct device *dev, uint32_t frequency,
fmt_len &= SF_FMT_LEN_MASK; fmt_len &= SF_FMT_LEN_MASK;
sys_set_mask(SPI_REG(dev, REG_FMT), SF_FMT_LEN_MASK, fmt_len); sys_set_mask(SPI_REG(dev, REG_FMT), SF_FMT_LEN_MASK, fmt_len);
if ((operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) { if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES) &&
(operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) {
return -ENOTSUP; return -ENOTSUP;
} }
/* Set single line operation */ /* Set single line operation */

View file

@ -138,6 +138,7 @@ static void qmspi_set_signalling_mode(QMSPI_Type *regs, uint32_t smode)
*/ */
static uint32_t qmspi_config_get_lines(const struct spi_config *config) static uint32_t qmspi_config_get_lines(const struct spi_config *config)
{ {
#ifdef CONFIG_SPI_EXTENDED_MODES
uint32_t qlines; uint32_t qlines;
switch (config->operation & SPI_LINES_MASK) { switch (config->operation & SPI_LINES_MASK) {
@ -159,6 +160,9 @@ static uint32_t qmspi_config_get_lines(const struct spi_config *config)
} }
return qlines; return qlines;
#else
return MCHP_QMSPI_C_IFM_1X;
#endif
} }
/* /*

View file

@ -240,10 +240,8 @@ int eswifi_spi_init(struct eswifi_dev *eswifi)
/* SPI BUS */ /* SPI BUS */
spi->bus = (struct spi_dt_spec) SPI_DT_SPEC_INST_GET(0, spi->bus = (struct spi_dt_spec) SPI_DT_SPEC_INST_GET(0,
SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB |
SPI_WORD_SET(16) | SPI_LINES_SINGLE | SPI_WORD_SET(16) | SPI_HOLD_ON_CS |
SPI_HOLD_ON_CS | SPI_LOCK_ON, SPI_LOCK_ON, 1000U);
1000U);
eswifi->bus_data = spi; eswifi->bus_data = spi;
LOG_DBG("success"); LOG_DBG("success");

View file

@ -219,7 +219,7 @@ int spi_saf_init(void)
spi_cfg.frequency = SAF_TEST_FREQ_HZ; spi_cfg.frequency = SAF_TEST_FREQ_HZ;
spi_cfg.operation = SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB spi_cfg.operation = SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB
| SPI_WORD_SET(8) | SPI_LINES_SINGLE; | SPI_WORD_SET(8);
/* /*
* Use SPI master mode and inform driver the SPI controller hardware * Use SPI master mode and inform driver the SPI controller hardware

View file

@ -1,3 +1,4 @@
CONFIG_SPI=y CONFIG_SPI=y
CONFIG_SPI_EXTENDED_MODES=y
CONFIG_ZTEST=y CONFIG_ZTEST=y
CONFIG_TEST_USERSPACE=y CONFIG_TEST_USERSPACE=y