drivers: serial: uart_nrfx_uarte: utilize EasyDMA property from dts
This commit aligns UARTE shim to utilize memory-region property from nordic,nrf-uarte compatible. The memory-region is not required property that enables user to specify placement of dma buffers in memory region. It is done by assigning to memory-region property, phandle to node with zephyr,memory-region and mimo-sram compatible. When memory-region property is not specified for given instance, buffer is placed in default RAM region with other data. Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
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a471be3a41
commit
f6a880a2f9
2 changed files with 38 additions and 24 deletions
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@ -16,6 +16,7 @@
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#include <zephyr/kernel.h>
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#include <soc.h>
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#include <helpers/nrfx_gppi.h>
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#include <linker/devicetree_regions.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(uart_nrfx_uarte, CONFIG_UART_LOG_LEVEL);
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@ -86,7 +87,7 @@ struct uarte_async_cb {
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const uint8_t *xfer_buf;
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size_t xfer_len;
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uint8_t tx_cache[CONFIG_UART_ASYNC_TX_CACHE_SIZE];
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uint8_t *tx_cache;
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size_t tx_cache_offset;
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struct k_timer tx_timeout_timer;
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@ -144,8 +145,8 @@ struct uarte_nrfx_data {
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struct uarte_async_cb *async;
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#endif
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atomic_val_t poll_out_lock;
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uint8_t char_out;
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uint8_t rx_data;
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uint8_t *char_out;
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uint8_t *rx_data;
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gppi_channel_t ppi_ch_endtx;
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};
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@ -776,7 +777,7 @@ static bool setup_tx_cache(struct uarte_nrfx_data *data)
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return false;
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}
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size_t len = MIN(remaining, sizeof(data->async->tx_cache));
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size_t len = MIN(remaining, CONFIG_UART_ASYNC_TX_CACHE_SIZE);
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data->async->xfer_len = len;
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data->async->xfer_buf = data->async->tx_cache;
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@ -1517,7 +1518,7 @@ static int uarte_nrfx_poll_in(const struct device *dev, unsigned char *c)
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return -1;
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}
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*c = data->rx_data;
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*c = *data->rx_data;
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/* clear the interrupt */
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nrf_uarte_event_clear(uarte, NRF_UARTE_EVENT_ENDRX);
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@ -1559,8 +1560,8 @@ static void uarte_nrfx_poll_out(const struct device *dev, unsigned char c)
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key = wait_tx_ready(dev);
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}
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data->char_out = c;
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tx_start(dev, &data->char_out, 1);
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*data->char_out = c;
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tx_start(dev, data->char_out, 1);
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irq_unlock(key);
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}
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@ -1580,9 +1581,7 @@ static int uarte_nrfx_fifo_fill(const struct device *dev,
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}
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/* Copy data to RAM buffer for EasyDMA transfer */
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for (int i = 0; i < len; i++) {
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data->int_driven->tx_buffer[i] = tx_data[i];
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}
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memcpy(data->int_driven->tx_buffer, tx_data, len);
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int key = irq_lock();
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@ -1612,7 +1611,7 @@ static int uarte_nrfx_fifo_read(const struct device *dev,
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nrf_uarte_event_clear(uarte, NRF_UARTE_EVENT_ENDRX);
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/* Receive a character */
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rx_data[num_rx++] = (uint8_t)data->rx_data;
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rx_data[num_rx++] = *data->rx_data;
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nrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STARTRX);
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}
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@ -1838,7 +1837,7 @@ static int uarte_instance_init(const struct device *dev,
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if (!cfg->disable_rx) {
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nrf_uarte_event_clear(uarte, NRF_UARTE_EVENT_ENDRX);
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nrf_uarte_rx_buffer_set(uarte, &data->rx_data, 1);
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nrf_uarte_rx_buffer_set(uarte, data->rx_data, 1);
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nrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STARTRX);
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}
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}
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@ -1855,7 +1854,7 @@ static int uarte_instance_init(const struct device *dev,
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* Pointer to RAM variable (data->tx_buffer) is set because otherwise
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* such operation may result in HardFault or RAM corruption.
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*/
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nrf_uarte_tx_buffer_set(uarte, &data->char_out, 0);
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nrf_uarte_tx_buffer_set(uarte, data->char_out, 0);
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nrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STARTTX);
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/* switch off transmitter to save an energy */
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@ -2019,7 +2018,7 @@ static int uarte_nrfx_pm_action(const struct device *dev,
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#define UARTE_IRQ_CONFIGURE(idx, isr_handler) \
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do { \
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IRQ_CONNECT(DT_IRQN(UARTE(idx)), DT_IRQ(UARTE(idx), priority), \
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isr_handler, DEVICE_DT_GET(UARTE(idx)), 0); \
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isr_handler, DEVICE_DT_GET(UARTE(idx)), 0); \
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irq_enable(DT_IRQN(UARTE(idx))); \
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} while (0)
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@ -2039,7 +2038,7 @@ static int uarte_nrfx_pm_action(const struct device *dev,
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/* Low power mode is used when rx pin is not defined or in async mode if
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* kconfig option is enabled.
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*/
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#define USE_LOW_POWER(idx) \
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#define USE_LOW_POWER(idx) \
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((UARTE_HAS_PROP(idx, rx_pin) && \
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COND_CODE_1(CONFIG_UART_##idx##_ASYNC, \
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(!IS_ENABLED(CONFIG_UART_##idx##_NRF_ASYNC_LOW_POWER)), \
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@ -2055,6 +2054,8 @@ static int uarte_nrfx_pm_action(const struct device *dev,
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UARTE_INT_DRIVEN(idx); \
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UARTE_ASYNC(idx); \
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IF_ENABLED(CONFIG_PINCTRL, (PINCTRL_DT_DEFINE(UARTE(idx));)) \
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static uint8_t uarte##idx##_char_out UARTE_MEMORY_SECTION(idx); \
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static uint8_t uarte##idx##_rx_data UARTE_MEMORY_SECTION(idx); \
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static struct uarte_nrfx_data uarte_##idx##_data = { \
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UARTE_CONFIG(idx), \
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IF_ENABLED(CONFIG_UART_##idx##_ASYNC, \
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@ -2082,7 +2083,7 @@ static int uarte_nrfx_pm_action(const struct device *dev,
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(IS_ENABLED(CONFIG_UART_##idx##_ENHANCED_POLL_OUT) ? \
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UARTE_CFG_FLAG_PPI_ENDTX : 0) | \
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USE_LOW_POWER(idx), \
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UARTE_DISABLE_RX_INIT(UARTE(idx)), \
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UARTE_DISABLE_RX_INIT(UARTE(idx)), \
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IF_ENABLED(CONFIG_UART_##idx##_NRF_HW_ASYNC, \
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(.timer = NRFX_TIMER_INSTANCE( \
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CONFIG_UART_##idx##_NRF_HW_ASYNC_TIMER),)) \
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@ -2109,6 +2110,8 @@ static int uarte_nrfx_pm_action(const struct device *dev,
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&uart_nrfx_uarte_driver_api)
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#define UARTE_CONFIG(idx) \
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.char_out = &uarte##idx##_char_out, \
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.rx_data = &uarte##idx##_rx_data, \
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.uart_config = { \
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.baudrate = UARTE_PROP(idx, current_speed), \
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.data_bits = UART_CFG_DATA_BITS_8, \
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@ -2116,29 +2119,40 @@ static int uarte_nrfx_pm_action(const struct device *dev,
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.parity = IS_ENABLED(CONFIG_UART_##idx##_NRF_PARITY_BIT) \
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? UART_CFG_PARITY_EVEN \
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: UART_CFG_PARITY_NONE, \
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.flow_ctrl = UARTE_PROP(idx, hw_flow_control) \
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.flow_ctrl = UARTE_PROP(idx, hw_flow_control) \
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? UART_CFG_FLOW_CTRL_RTS_CTS \
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: UART_CFG_FLOW_CTRL_NONE, \
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}
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#define UARTE_ASYNC(idx) \
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IF_ENABLED(CONFIG_UART_##idx##_ASYNC, \
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(struct uarte_async_cb uarte##idx##_async = { \
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IF_ENABLED(CONFIG_UART_##idx##_ASYNC, ( \
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static uint8_t \
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uarte##idx##_tx_cache[CONFIG_UART_ASYNC_TX_CACHE_SIZE] \
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UARTE_MEMORY_SECTION(idx); \
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struct uarte_async_cb uarte##idx##_async = { \
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.tx_cache = uarte##idx##_tx_cache, \
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.hw_rx_counting = \
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IS_ENABLED(CONFIG_UART_##idx##_NRF_HW_ASYNC), \
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}))
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#define UARTE_INT_DRIVEN(idx) \
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IF_ENABLED(CONFIG_UART_##idx##_INTERRUPT_DRIVEN, \
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(static uint8_t uarte##idx##_tx_buffer[\
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MIN(CONFIG_UART_##idx##_NRF_TX_BUFFER_SIZE, \
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BIT_MASK(UARTE##idx##_EASYDMA_MAXCNT_SIZE))]; \
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IF_ENABLED(CONFIG_UART_##idx##_INTERRUPT_DRIVEN, \
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(static uint8_t uarte##idx##_tx_buffer \
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[MIN(CONFIG_UART_##idx##_NRF_TX_BUFFER_SIZE, \
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BIT_MASK(UARTE##idx##_EASYDMA_MAXCNT_SIZE))] \
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UARTE_MEMORY_SECTION(idx); \
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static struct uarte_nrfx_int_driven \
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uarte##idx##_int_driven = { \
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.tx_buffer = uarte##idx##_tx_buffer, \
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.tx_buff_size = sizeof(uarte##idx##_tx_buffer),\
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};))
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#define UARTE_MEMORY_SECTION(idx) \
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COND_CODE_1(UARTE_HAS_PROP(idx, memory_regions), \
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(__attribute__((__section__(LINKER_DT_NODE_REGION_NAME( \
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DT_PHANDLE(UARTE(idx), memory_regions)))))), \
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())
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#ifdef CONFIG_UART_0_NRF_UARTE
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UART_NRF_UARTE_DEVICE(0);
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#endif
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