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tests: modify test case so it does not crash on cortex-m

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The test case suggests that "For most arch which support
userspace, derefencing NULL pointer will be caught by
exception.". This is certainly not true for Cortex-M, where
read access to address 0x0 is generally allowed. The reason
the test had been passing was either 1) because in many
Cortex-M platforms, including QEMU, address 0x0 is unmapped,
or 2) GCC is generating an undefining instruction. However,
now that we have activated the null pointer derefrencing
detection, we may end up with two exceptions and the test
would fail.

Change illegal access to something outside the mapped memory
area, e.g. 0xFFFFFFFF.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2021-03-03 13:14:06 +01:00
commit f620ceacde
1 changed files with 8 additions and 2 deletions
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10
tests/ztest/error_hook/src/main.c
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@ -51,7 +51,7 @@ static void trigger_fault_illeagl_instuction(void)
static void trigger_fault_access(void)
{
#if defined(CONFIG_CPU_ARCEM)
#if defined(CONFIG_CPU_ARCEM) || defined(CONFIG_CPU_CORTEX_M)
/* For iotdk and ARC/nSIM, nSIM simulates full address space of memory,
* so all accesses outside of CCMs are valid and access to 0x0 address
* doesn't generate any exception.So we access it 0XFFFFFFFF instead to
@ -59,8 +59,14 @@ static void trigger_fault_access(void)
*/
void *a = (void *)0xFFFFFFFF;
#else
/* For most arch which support userspace, derefencing NULL
/* For most arch which support userspace, dereferencing NULL
* pointer will be caught by exception.
*
* Note: this is not applicable for ARM Cortex-M:
* In Cortex-M, nPRIV read access to address 0x0 is generally allowed,
* provided that it is "mapped" e.g. when CONFIG_FLASH_BASE_ADDRESS is
* 0x0. So, de-referencing NULL pointer is not guaranteed to trigger an
* exception.
*/
void *a = (void *)NULL;
#endif