michaelh/zephyr
1
0
Fork 0
Code Releases Activity

arm: access svc instruction using halfword load in svc_handler

Browse source 
Use of `ldr` triggers unaligned memory access when loading SVC
instruction to r0. This is caused by the fact that SVC is a 16-bit
instruction, hence with a 2 byte offset, we are performing an non-word
aligned access. Prevent this by using `ldrh` to load a halfwords rather
than full words.

Change-Id: Ieae60c2ce86c6cfe15c89627d3a450797ce7e714
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
This commit is contained in:
Maciek Borzecki 2016-03-18 12:23:05 +01:00 • committed by Gerrit Code Review
commit f607954dbc
1 changed files with 1 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/core/swap.S
View file

@ -160,7 +160,7 @@ SECTION_FUNC(TEXT, __svc)
ldr r0, [r0, #24] /* grab address of PC from stack frame */
/* SVC is a two-byte instruction, point to it and read encoding */
ldr r0, [r0, #-2]
ldrh r0, [r0, #-2]
/*
* grab service call number: if zero, it's a context switch; if not,