From f5d48240e99c56eeedb72f15d1327d316ced4534 Mon Sep 17 00:00:00 2001
From: Erwan Gouriou <erwan.gouriou@linaro.org>
Date: Wed, 19 Dec 2018 10:32:55 +0100
Subject: [PATCH] drivers/gpio: stm32l4: PortG[15:2] requires dedicated VDDio2

On STM32L4, 14 pins (Port G[15:2]), require external power supply.
Activate this at port G init when PWR_CR2_IOSV is defined.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
---
 drivers/gpio/gpio_stm32.c      | 14 ++++++++++++++
 soc/arm/st_stm32/stm32l4/soc.h |  5 +++++
 2 files changed, 19 insertions(+)

diff --git a/drivers/gpio/gpio_stm32.c b/drivers/gpio/gpio_stm32.c
index 2cebe565317..9abe1363eac 100644
--- a/drivers/gpio/gpio_stm32.c
+++ b/drivers/gpio/gpio_stm32.c
@@ -197,6 +197,20 @@ static int gpio_stm32_init(struct device *device)
 		return -EIO;
 	}
 
+#ifdef PWR_CR2_IOSV
+	if (cfg->port == STM32_PORTG) {
+		/* Port G[15:2] requires external power supply */
+		/* Cf: L4XX RM, §5.1 Power supplies */
+		if (LL_APB1_GRP1_IsEnabledClock(LL_APB1_GRP1_PERIPH_PWR)) {
+			LL_PWR_EnableVddIO2();
+		} else {
+			LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
+			LL_PWR_EnableVddIO2();
+			LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_PWR);
+		}
+	}
+#endif /* PWR_CR2_IOSV */
+
 	return 0;
 }
 
diff --git a/soc/arm/st_stm32/stm32l4/soc.h b/soc/arm/st_stm32/stm32l4/soc.h
index d81acf964fb..dcbcfbbed69 100644
--- a/soc/arm/st_stm32/stm32l4/soc.h
+++ b/soc/arm/st_stm32/stm32l4/soc.h
@@ -34,6 +34,11 @@
 /* base address for where GPIO registers start */
 #define GPIO_PORTS_BASE       (GPIOA_BASE)
 
+#ifdef CONFIG_GPIO_STM32
+/* Required to enable VDDio2 for port G */
+#include <stm32l4xx_ll_pwr.h>
+#endif
+
 #ifdef CONFIG_SERIAL_HAS_DRIVER
 #include <stm32l4xx_ll_usart.h>
 #include <stm32l4xx_ll_lpuart.h>