From f5a9d5d1a5a3a8792c6fd76e508c52a8a8ce41b5 Mon Sep 17 00:00:00 2001 From: Tomasz Bursztyka Date: Tue, 17 Dec 2019 13:54:00 +0100 Subject: [PATCH] driver/spi: Make DT aliases consistent for the DW drivers And apply it on all existing fixups. Signed-off-by: Tomasz Bursztyka --- drivers/spi/spi_dw.c | 136 ++++++++++++++++------------- soc/arc/snps_arc_hsdk/dts_fixup.h | 47 ++++++---- soc/arc/snps_emsk/dts_fixup.h | 31 ++++--- soc/xtensa/intel_s1000/dts_fixup.h | 19 ++-- 4 files changed, 139 insertions(+), 94 deletions(-) diff --git a/drivers/spi/spi_dw.c b/drivers/spi/spi_dw.c index 58fb119476f..2f6ac844681 100644 --- a/drivers/spi/spi_dw.c +++ b/drivers/spi/spi_dw.c @@ -544,8 +544,8 @@ struct spi_dw_data spi_dw_data_port_0 = { }; const struct spi_dw_config spi_dw_config_0 = { - .regs = DT_SPI_0_BASE_ADDRESS, - .clock_frequency = DT_SPI_0_CLOCK_FREQUENCY, + .regs = DT_SPI_DW_0_BASE_ADDRESS, + .clock_frequency = DT_SPI_DW_0_CLOCK_FREQUENCY, #ifdef CONFIG_SPI_DW_PORT_0_CLOCK_GATE .clock_name = CONFIG_SPI_DW_PORT_1_CLOCK_GATE_DRV_NAME, .clock_data = UINT_TO_POINTER(CONFIG_SPI_DW_PORT_0_CLOCK_GATE_SUBSYS), @@ -554,7 +554,7 @@ const struct spi_dw_config spi_dw_config_0 = { .op_modes = CONFIG_SPI_0_OP_MODES }; -DEVICE_AND_API_INIT(spi_dw_port_0, DT_SPI_0_NAME, spi_dw_init, +DEVICE_AND_API_INIT(spi_dw_port_0, DT_SPI_DW_0_NAME, spi_dw_init, &spi_dw_data_port_0, &spi_dw_config_0, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, &dw_spi_api); @@ -562,20 +562,24 @@ DEVICE_AND_API_INIT(spi_dw_port_0, DT_SPI_0_NAME, spi_dw_init, void spi_config_0_irq(void) { #ifdef CONFIG_SPI_DW_PORT_0_INTERRUPT_SINGLE_LINE - IRQ_CONNECT(DT_SPI_0_IRQ, DT_SPI_0_IRQ_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_0), DT_SPI_DW_IRQ_FLAGS); - irq_enable(DT_SPI_0_IRQ); + IRQ_CONNECT(DT_SPI_DW_0_IRQ, DT_SPI_DW_0_IRQ_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_0), + DT_SPI_DW_0_IRQ_FLAGS); + irq_enable(DT_SPI_DW_0_IRQ); #else - IRQ_CONNECT(DT_SPI_0_IRQ_RX_AVAIL, DT_SPI_0_IRQ_RX_AVAIL_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_0), DT_SPI_DW_IRQ_FLAGS); - IRQ_CONNECT(DT_SPI_0_IRQ_TX_REQ, DT_SPI_0_IRQ_TX_REQ_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_0), DT_SPI_DW_IRQ_FLAGS); - IRQ_CONNECT(DT_SPI_0_IRQ_ERR_INT, DT_SPI_0_IRQ_ERR_INT_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_0), DT_SPI_DW_IRQ_FLAGS); + IRQ_CONNECT(DT_SPI_DW_0_IRQ_RX_AVAIL, DT_SPI_DW_0_IRQ_RX_AVAIL_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_0), + DT_SPI_DW_0_IRQ_RX_AVAIL_FLAGS); + IRQ_CONNECT(DT_SPI_DW_0_IRQ_TX_REQ, DT_SPI_DW_0_IRQ_TX_REQ_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_0), + DT_SPI_DW_0_IRQ_TX_REQ_FLAGS); + IRQ_CONNECT(DT_SPI_DW_0_IRQ_ERR_INT, DT_SPI_DW_0_IRQ_ERR_INT_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_0), + DT_SPI_DW_0_IRQ_ERR_INT_FLAGS); - irq_enable(DT_SPI_0_IRQ_RX_AVAIL); - irq_enable(DT_SPI_0_IRQ_TX_REQ); - irq_enable(DT_SPI_0_IRQ_ERR_INT); + irq_enable(DT_SPI_DW_0_IRQ_RX_AVAIL); + irq_enable(DT_SPI_DW_0_IRQ_TX_REQ); + irq_enable(DT_SPI_DW_0_IRQ_ERR_INT); #endif } @@ -589,8 +593,8 @@ struct spi_dw_data spi_dw_data_port_1 = { }; static const struct spi_dw_config spi_dw_config_1 = { - .regs = DT_SPI_1_BASE_ADDRESS, - .clock_frequency = DT_SPI_1_CLOCK_FREQUENCY, + .regs = DT_SPI_DW_1_BASE_ADDRESS, + .clock_frequency = DT_SPI_DW_1_CLOCK_FREQUENCY, #ifdef CONFIG_SPI_DW_PORT_1_CLOCK_GATE .clock_name = CONFIG_SPI_DW_PORT_1_CLOCK_GATE_DRV_NAME, .clock_data = UINT_TO_POINTER(CONFIG_SPI_DW_PORT_1_CLOCK_GATE_SUBSYS), @@ -599,7 +603,7 @@ static const struct spi_dw_config spi_dw_config_1 = { .op_modes = CONFIG_SPI_1_OP_MODES }; -DEVICE_AND_API_INIT(spi_dw_port_1, DT_SPI_1_NAME, spi_dw_init, +DEVICE_AND_API_INIT(spi_dw_port_1, DT_SPI_DW_1_NAME, spi_dw_init, &spi_dw_data_port_1, &spi_dw_config_1, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, &dw_spi_api); @@ -607,20 +611,24 @@ DEVICE_AND_API_INIT(spi_dw_port_1, DT_SPI_1_NAME, spi_dw_init, void spi_config_1_irq(void) { #ifdef CONFIG_SPI_DW_PORT_1_INTERRUPT_SINGLE_LINE - IRQ_CONNECT(DT_SPI_1_IRQ, DT_SPI_1_IRQ_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_1), DT_SPI_DW_IRQ_FLAGS); - irq_enable(DT_SPI_1_IRQ); + IRQ_CONNECT(DT_SPI_DW_1_IRQ, DT_SPI_DW_1_IRQ_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_1), + DT_SPI_DW_1_IRQ_FLAGS); + irq_enable(DT_SPI_DW_1_IRQ); #else - IRQ_CONNECT(DT_SPI_1_IRQ_RX_AVAIL, DT_SPI_1_IRQ_RX_AVAIL_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_1), DT_SPI_DW_IRQ_FLAGS); - IRQ_CONNECT(DT_SPI_1_IRQ_TX_REQ, DT_SPI_1_IRQ_TX_REQ_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_1), DT_SPI_DW_IRQ_FLAGS); - IRQ_CONNECT(DT_SPI_1_IRQ_ERR_INT, DT_SPI_1_IRQ_ERR_INT_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_1), DT_SPI_DW_IRQ_FLAGS); + IRQ_CONNECT(DT_SPI_DW_1_IRQ_RX_AVAIL, DT_SPI_DW_1_IRQ_RX_AVAIL_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_1), + DT_SPI_DW_1_IRQ_RX_AVAIL_FLAGS); + IRQ_CONNECT(DT_SPI_DW_1_IRQ_TX_REQ, DT_SPI_DW_1_IRQ_TX_REQ_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_1), + DT_SPI_DW_IRQ_TX_REQ_FLAGS); + IRQ_CONNECT(DT_SPI_DW_1_IRQ_ERR_INT, DT_SPI_DW_1_IRQ_ERR_INT_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_1), + DT_SPI_DW_IRQ_ERR_INT_FLAGS); - irq_enable(DT_SPI_1_IRQ_RX_AVAIL); - irq_enable(DT_SPI_1_IRQ_TX_REQ); - irq_enable(DT_SPI_1_IRQ_ERR_INT); + irq_enable(DT_SPI_DW_1_IRQ_RX_AVAIL); + irq_enable(DT_SPI_DW_1_IRQ_TX_REQ); + irq_enable(DT_SPI_DW_1_IRQ_ERR_INT); #endif } @@ -634,8 +642,8 @@ struct spi_dw_data spi_dw_data_port_2 = { }; static const struct spi_dw_config spi_dw_config_2 = { - .regs = DT_SPI_2_BASE_ADDRESS, - .clock_frequency = DT_SPI_2_CLOCK_FREQUENCY, + .regs = DT_SPI_DW_2_BASE_ADDRESS, + .clock_frequency = DT_SPI_DW_2_CLOCK_FREQUENCY, #ifdef CONFIG_SPI_DW_PORT_2_CLOCK_GATE .clock_name = CONFIG_SPI_DW_PORT_2_CLOCK_GATE_DRV_NAME, .clock_data = UINT_TO_POINTER(CONFIG_SPI_DW_PORT_2_CLOCK_GATE_SUBSYS), @@ -644,7 +652,7 @@ static const struct spi_dw_config spi_dw_config_2 = { .op_modes = CONFIG_SPI_2_OP_MODES }; -DEVICE_AND_API_INIT(spi_dw_port_2, DT_SPI_2_NAME, spi_dw_init, +DEVICE_AND_API_INIT(spi_dw_port_2, DT_SPI_DW_2_NAME, spi_dw_init, &spi_dw_data_port_2, &spi_dw_config_2, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, &dw_spi_api); @@ -652,20 +660,24 @@ DEVICE_AND_API_INIT(spi_dw_port_2, DT_SPI_2_NAME, spi_dw_init, void spi_config_2_irq(void) { #ifdef CONFIG_SPI_DW_PORT_2_INTERRUPT_SINGLE_LINE - IRQ_CONNECT(DT_SPI_2_IRQ, DT_SPI_2_IRQ_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_2), DT_SPI_DW_IRQ_FLAGS); - irq_enable(DT_SPI_2_IRQ); + IRQ_CONNECT(DT_SPI_DW_2_IRQ, DT_SPI_DW_2_IRQ_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_2), + DT_SPI_DW_2_IRQ_FLAGS); + irq_enable(DT_SPI_DW_2_IRQ); #else - IRQ_CONNECT(DT_SPI_2_IRQ_RX_AVAIL, DT_SPI_2_IRQ_RX_AVAIL_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_2), DT_SPI_DW_IRQ_FLAGS); - IRQ_CONNECT(DT_SPI_2_IRQ_TX_REQ, DT_SPI_2_IRQ_TX_REQ_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_2), DT_SPI_DW_IRQ_FLAGS); - IRQ_CONNECT(DT_SPI_2_IRQ_ERR_INT, DT_SPI_2_IRQ_ERR_INT_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_2), DT_SPI_DW_IRQ_FLAGS); + IRQ_CONNECT(DT_SPI_DW_2_IRQ_RX_AVAIL, DT_SPI_DW_2_IRQ_RX_AVAIL_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_2), + DT_SPI_DW_2_IRQ_RX_AVAIL_FLAGS); + IRQ_CONNECT(DT_SPI_DW_2_IRQ_TX_REQ, DT_SPI_DW_2_IRQ_TX_REQ_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_2), + DT_SPI_DW_2_IRQ_TX_REQ_FLAGS); + IRQ_CONNECT(DT_SPI_DW_2_IRQ_ERR_INT, DT_SPI_DW_2_IRQ_ERR_INT_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_2), + DT_SPI_DW_2_IRQ_ERR_INT_FLAGS); - irq_enable(DT_SPI_2_IRQ_RX_AVAIL); - irq_enable(DT_SPI_2_IRQ_TX_REQ); - irq_enable(DT_SPI_2_IRQ_ERR_INT); + irq_enable(DT_SPI_DW_2_IRQ_RX_AVAIL); + irq_enable(DT_SPI_DW_2_IRQ_TX_REQ); + irq_enable(DT_SPI_DW_2_IRQ_ERR_INT); #endif } @@ -679,8 +691,8 @@ struct spi_dw_data spi_dw_data_port_3 = { }; static const struct spi_dw_config spi_dw_config_3 = { - .regs = DT_SPI_3_BASE_ADDRESS, - .clock_frequency = DT_SPI_3_CLOCK_FREQUENCY, + .regs = DT_SPI_DW_3_BASE_ADDRESS, + .clock_frequency = DT_SPI_DW_3_CLOCK_FREQUENCY, #ifdef CONFIG_SPI_DW_PORT_3_CLOCK_GATE .clock_name = CONFIG_SPI_DW_PORT_3_CLOCK_GATE_DRV_NAME, .clock_data = UINT_TO_POINTER(CONFIG_SPI_DW_PORT_3_CLOCK_GATE_SUBSYS), @@ -689,7 +701,7 @@ static const struct spi_dw_config spi_dw_config_3 = { .op_modes = CONFIG_SPI_3_OP_MODES }; -DEVICE_AND_API_INIT(spi_dw_port_3, DT_SPI_3_NAME, spi_dw_init, +DEVICE_AND_API_INIT(spi_dw_port_3, DT_SPI_DW_3_NAME, spi_dw_init, &spi_dw_data_port_3, &spi_dw_config_3, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, &dw_spi_api); @@ -697,20 +709,24 @@ DEVICE_AND_API_INIT(spi_dw_port_3, DT_SPI_3_NAME, spi_dw_init, void spi_config_3_irq(void) { #ifdef CONFIG_SPI_DW_PORT_3_INTERRUPT_SINGLE_LINE - IRQ_CONNECT(DT_SPI_3_IRQ, DT_SPI_3_IRQ_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_3), DT_SPI_DW_IRQ_FLAGS); - irq_enable(DT_SPI_3_IRQ); + IRQ_CONNECT(DT_SPI_DW_3_IRQ, DT_SPI_DW_3_IRQ_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_3), + DT_SPI_DW_3_IRQ_FLAGS); + irq_enable(DT_SPI_DW_3_IRQ); #else - IRQ_CONNECT(DT_SPI_3_IRQ_RX_AVAIL, DT_SPI_3_IRQ_RX_AVAIL_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_3), DT_SPI_DW_IRQ_FLAGS); - IRQ_CONNECT(DT_SPI_3_IRQ_TX_REQ, DT_SPI_3_IRQ_TX_REQ_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_3), DT_SPI_DW_IRQ_FLAGS); - IRQ_CONNECT(DT_SPI_3_IRQ_ERR_INT, DT_SPI_3_IRQ_ERR_INT_PRI, - spi_dw_isr, DEVICE_GET(spi_dw_port_3), DT_SPI_DW_IRQ_FLAGS); + IRQ_CONNECT(DT_SPI_DW_3_IRQ_RX_AVAIL, DT_SPI_DW_3_IRQ_RX_AVAIL_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_3), + DT_SPI_DW_3_IRQ_RX_AVAIL_FLAGS); + IRQ_CONNECT(DT_SPI_DW_3_IRQ_TX_REQ, DT_SPI_DW_3_IRQ_TX_REQ_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_3), + DT_SPI_DW_3_IRQ_TX_REQ_FLAGS); + IRQ_CONNECT(DT_SPI_DW_3_IRQ_ERR_INT, DT_SPI_DW_3_IRQ_ERR_INT_PRI, + spi_dw_isr, DEVICE_GET(spi_dw_port_3), + DT_SPI_DW_3_IRQ_ERR_INT_FLAGS); - irq_enable(DT_SPI_3_IRQ_RX_AVAIL); - irq_enable(DT_SPI_3_IRQ_TX_REQ); - irq_enable(DT_SPI_3_IRQ_ERR_INT); + irq_enable(DT_SPI_DW_3_IRQ_RX_AVAIL); + irq_enable(DT_SPI_DW_3_IRQ_TX_REQ); + irq_enable(DT_SPI_DW_3_IRQ_ERR_INT); #endif } diff --git a/soc/arc/snps_arc_hsdk/dts_fixup.h b/soc/arc/snps_arc_hsdk/dts_fixup.h index 2fcff98cb76..182222f86c9 100644 --- a/soc/arc/snps_arc_hsdk/dts_fixup.h +++ b/soc/arc/snps_arc_hsdk/dts_fixup.h @@ -30,25 +30,40 @@ * SPI configuration */ -#define DT_SPI_0_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_F0020000_BASE_ADDRESS -#define DT_SPI_0_CLOCK_FREQUENCY DT_SNPS_DESIGNWARE_SPI_F0020000_CLOCK_FREQUENCY -#define DT_SPI_0_NAME DT_SNPS_DESIGNWARE_SPI_F0020000_LABEL -#define DT_SPI_0_IRQ DT_SNPS_DESIGNWARE_SPI_F0020000_IRQ_0 -#define DT_SPI_0_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_F0020000_IRQ_0_PRIORITY +#define DT_SPI_DW_0_BASE_ADDRESS \ + DT_SNPS_DESIGNWARE_SPI_F0020000_BASE_ADDRESS +#define DT_SPI_DW_0_CLOCK_FREQUENCY \ + DT_SNPS_DESIGNWARE_SPI_F0020000_CLOCK_FREQUENCY +#define DT_SPI_DW_0_NAME DT_SNPS_DESIGNWARE_SPI_F0020000_LABEL +#define DT_SPI_DW_0_IRQ DT_SNPS_DESIGNWARE_SPI_F0020000_IRQ_0 +#define DT_SPI_DW_0_IRQ_PRI \ + DT_SNPS_DESIGNWARE_SPI_F0020000_IRQ_0_PRIORITY +#define DT_SPI_DW_0_IRQ_FLAGS 0 -#define DT_SPI_1_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_F0021000_BASE_ADDRESS -#define DT_SPI_1_CLOCK_FREQUENCY DT_SNPS_DESIGNWARE_SPI_F0021000_CLOCK_FREQUENCY -#define DT_SPI_1_NAME DT_SNPS_DESIGNWARE_SPI_F0021000_LABEL -#define DT_SPI_1_IRQ DT_SNPS_DESIGNWARE_SPI_F0021000_IRQ_0 -#define DT_SPI_1_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_F0021000_IRQ_0_PRIORITY -#define DT_SPI_2_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_F0022000_BASE_ADDRESS -#define DT_SPI_2_CLOCK_FREQUENCY DT_SNPS_DESIGNWARE_SPI_F0022000_CLOCK_FREQUENCY -#define DT_SPI_2_NAME DT_SNPS_DESIGNWARE_SPI_F0022000_LABEL -#define DT_SPI_2_IRQ DT_SNPS_DESIGNWARE_SPI_F0022000_IRQ_0 -#define DT_SPI_2_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_F0022000_IRQ_0_PRIORITY +#define DT_SPI_DW_1_BASE_ADDRESS \ + DT_SNPS_DESIGNWARE_SPI_F0021000_BASE_ADDRESS +#define DT_SPI_DW_1_CLOCK_FREQUENCY \ + DT_SNPS_DESIGNWARE_SPI_F0021000_CLOCK_FREQUENCY +#define DT_SPI_DW_1_NAME DT_SNPS_DESIGNWARE_SPI_F0021000_LABEL +#define DT_SPI_DW_1_IRQ DT_SNPS_DESIGNWARE_SPI_F0021000_IRQ_0 +#define DT_SPI_DW_1_IRQ_PRI \ + DT_SNPS_DESIGNWARE_SPI_F0021000_IRQ_0_PRIORITY +#define DT_SPI_DW_1_IRQ_FLAGS 0 -#define DT_SPI_DW_IRQ_FLAGS 0 + +#define DT_SPI_DW_2_BASE_ADDRESS \ + DT_SNPS_DESIGNWARE_SPI_F0022000_BASE_ADDRESS +#define DT_SPI_DW_2_CLOCK_FREQUENCY \ + DT_SNPS_DESIGNWARE_SPI_F0022000_CLOCK_FREQUENCY +#define DT_SPI_DW_2_NAME DT_SNPS_DESIGNWARE_SPI_F0022000_LABEL +#define DT_SPI_DW_2_IRQ DT_SNPS_DESIGNWARE_SPI_F0022000_IRQ_0 +#define DT_SPI_DW_2_IRQ_PRI \ + DT_SNPS_DESIGNWARE_SPI_F0022000_IRQ_0_PRIORITY +#define DT_SPI_DW_2_IRQ_FLAGS 0 + +/* For spi_fujistu_fram sample */ +#define DT_SPI_1_NAME DT_SPI_DW_1_NAME /* * seeed TFT TOUCH SHIELD configuration diff --git a/soc/arc/snps_emsk/dts_fixup.h b/soc/arc/snps_emsk/dts_fixup.h index 99d12073517..573f9a8b480 100644 --- a/soc/arc/snps_emsk/dts_fixup.h +++ b/soc/arc/snps_emsk/dts_fixup.h @@ -68,18 +68,27 @@ * SPI configuration */ -#define DT_SPI_0_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_F0006000_BASE_ADDRESS -#define DT_SPI_0_CLOCK_FREQUENCY DT_SNPS_DESIGNWARE_SPI_F0006000_CLOCKS_CLOCK_FREQUENCY -#define DT_SPI_0_NAME DT_SNPS_DESIGNWARE_SPI_F0006000_LABEL -#define DT_SPI_0_IRQ DT_SNPS_DESIGNWARE_SPI_F0006000_IRQ_0 -#define DT_SPI_0_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_F0006000_IRQ_0_PRIORITY +#define DT_SPI_DW_0_BASE_ADDRESS \ + DT_SNPS_DESIGNWARE_SPI_F0006000_BASE_ADDRESS +#define DT_SPI_DW_0_CLOCK_FREQUENCY \ + DT_SNPS_DESIGNWARE_SPI_F0006000_CLOCKS_CLOCK_FREQUENCY +#define DT_SPI_DW_0_NAME DT_SNPS_DESIGNWARE_SPI_F0006000_LABEL +#define DT_SPI_DW_0_IRQ DT_SNPS_DESIGNWARE_SPI_F0006000_IRQ_0 +#define DT_SPI_DW_0_IRQ_PRI \ + DT_SNPS_DESIGNWARE_SPI_F0006000_IRQ_0_PRIORITY +#define DT_SPI_DW_0_IRQ_FLAGS 0 -#define DT_SPI_1_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_F0007000_BASE_ADDRESS -#define DT_SPI_1_CLOCK_FREQUENCY DT_SNPS_DESIGNWARE_SPI_F0007000_CLOCKS_CLOCK_FREQUENCY -#define DT_SPI_1_NAME DT_SNPS_DESIGNWARE_SPI_F0007000_LABEL -#define DT_SPI_1_IRQ DT_SNPS_DESIGNWARE_SPI_F0007000_IRQ_0 -#define DT_SPI_1_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_F0007000_IRQ_0_PRIORITY +#define DT_SPI_DW_1_BASE_ADDRESS \ + DT_SNPS_DESIGNWARE_SPI_F0007000_BASE_ADDRESS +#define DT_SPI_DW_1_CLOCK_FREQUENCY \ + DT_SNPS_DESIGNWARE_SPI_F0007000_CLOCKS_CLOCK_FREQUENCY +#define DT_SPI_DW_1_NAME DT_SNPS_DESIGNWARE_SPI_F0007000_LABEL +#define DT_SPI_DW_1_IRQ DT_SNPS_DESIGNWARE_SPI_F0007000_IRQ_0 +#define DT_SPI_DW_1_IRQ_PRI \ + DT_SNPS_DESIGNWARE_SPI_F0007000_IRQ_0_PRIORITY +#define DT_SPI_DW_1_IRQ_FLAGS 0 -#define DT_SPI_DW_IRQ_FLAGS 0 +/* For spi_fujistu_fram sample */ +#define DT_SPI_1_NAME DT_SPI_DW_1_NAME /* End of SoC Level DTS fixup file */ diff --git a/soc/xtensa/intel_s1000/dts_fixup.h b/soc/xtensa/intel_s1000/dts_fixup.h index 446d26646c4..0cf2574e0fd 100644 --- a/soc/xtensa/intel_s1000/dts_fixup.h +++ b/soc/xtensa/intel_s1000/dts_fixup.h @@ -40,13 +40,18 @@ #define DT_DW_ICTL_IRQ_PRI DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0_PRIORITY #define DT_DW_ICTL_IRQ_FLAGS DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0_SENSE -#define DT_SPI_0_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_E000_BASE_ADDRESS -#define DT_SPI_0_CLOCK_FREQUENCY DT_SNPS_DESIGNWARE_SPI_E000_CLOCKS_CLOCK_FREQUENCY -#define DT_SPI_0_NAME DT_SNPS_DESIGNWARE_SPI_E000_LABEL -#define DT_SPI_0_IRQ DT_SNPS_DESIGNWARE_SPI_E000_IRQ_0 -#define DT_SPI_DW_IRQ_FLAGS DT_SNPS_DESIGNWARE_SPI_E000_IRQ_0_SENSE - -#define DT_SPI_0_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_E000_IRQ_0_PRIORITY +#define DT_SPI_DW_0_BASE_ADDRESS \ + DT_SNPS_DESIGNWARE_SPI_E000_BASE_ADDRESS +#define DT_SPI_DW_0_CLOCK_FREQUENCY \ + DT_SNPS_DESIGNWARE_SPI_E000_CLOCKS_CLOCK_FREQUENCY +#define DT_SPI_DW_0_NAME \ + DT_SNPS_DESIGNWARE_SPI_E000_LABEL +#define DT_SPI_DW_0_IRQ \ + DT_SNPS_DESIGNWARE_SPI_E000_IRQ_0 +#define DT_SPI_DW_0_IRQ_FLAGS \ + DT_SNPS_DESIGNWARE_SPI_E000_IRQ_0_SENSE +#define DT_SPI_DW_0_IRQ_PRI \ + DT_SNPS_DESIGNWARE_SPI_E000_IRQ_0_PRIORITY #define DT_GPIO_DW_0_BASE_ADDR \ DT_SNPS_DESIGNWARE_GPIO_80C00_BASE_ADDRESS