board: arm: black_f407ve: Initial support

Add support for black_f407ve board which is based on
stm32f407xx soc.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>

boards/arm/black_f407_generic/CMakeLists.txt

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: Apache-2.0
+
+if(CONFIG_PINMUX)
+zephyr_library()
+zephyr_library_sources(pinmux.c)
+zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)
+endif()

boards/arm/black_f407_generic/Kconfig.board

@@ -0,0 +1,8 @@
+# black_f407ve board configuration
+
+# Copyright (c) 2020 Intel Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_BLACK_F407VE
+	bool "Black F407VE Development Board"
+	depends on SOC_STM32F407XE

boards/arm/black_f407_generic/Kconfig.defconfig

@@ -0,0 +1,31 @@
+# black_f407ve board configuration
+
+# Copyright (c) 2020 Intel Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_BLACK_F407VE
+
+config BOARD
+	default "black_f407ve"
+
+config UART_2
+	default y
+	depends on UART_CONSOLE
+
+config PWM_STM32_2
+	default y
+	depends on PWM
+
+config CAN_2
+	default y
+	depends on CAN
+
+config SPI_2
+	default y
+	depends on SPI
+
+config SPI_STM32_INTERRUPT
+	default y
+	depends on SPI
+
+endif # BOARD_BLACK_F407VE

boards/arm/black_f407_generic/black_f407ve.dts

@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <st/f4/stm32f407Xe.dtsi>
+
+/ {
+	model = "black_f407ve board";
+	compatible = "st,stm32f407";
+
+	chosen {
+		zephyr,console = &usart2;
+		zephyr,shell-uart = &usart2;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,ccm = &ccm0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		green_led_1: led_1 {
+			gpios = <&gpioa 6 GPIO_ACTIVE_LOW>;
+			label = "User LD1";
+		};
+		green_led_2: led_2 {
+			gpios = <&gpioa 7 GPIO_ACTIVE_LOW>;
+			label = "User LD2";
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		user_button_0: K0 {
+			label = "Key K0";
+			gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
+		};
+		user_button_1: K1 {
+			label = "Key K1";
+			gpios = <&gpioe 3 GPIO_ACTIVE_LOW>;
+		};
+		user_button_UP: K_UP {
+			label = "Key WK_UP";
+			gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	aliases {
+		can-primary = &can2;
+		led0 = &green_led_1;
+		led1 = &green_led_2;
+		sw0 = &user_button_UP;
+	};
+};
+
+&usart1 {
+	current-speed = <115200>;
+	status = "okay";
+};
+
+&usart2 {
+	current-speed = <115200>;
+	status = "okay";
+};
+
+&timers2 {
+	status = "okay";
+
+	pwm {
+		status = "okay";
+	};
+};
+
+&rtc {
+	status = "okay";
+};
+
+&usbotg_fs {
+	status = "okay";
+};
+
+&can1 {
+	bus-speed = <125000>;
+	status = "okay";
+};
+
+&can2 {
+	bus-speed = <125000>;
+	status = "okay";
+};
+
+&spi2 {
+	status = "okay";
+};

boards/arm/black_f407_generic/black_f407ve.yaml

@@ -0,0 +1,17 @@
+identifier: black_f407ve
+name: Black STM32 F407VE Development Board
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+ram: 192
+flash: 512
+supported:
+  - can
+  - pwm
+  - counter
+  - usb
+  - spi
+  - gpio

boards/arm/black_f407_generic/black_f407ve_defconfig

@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_STM32F4X=y
+CONFIG_SOC_STM32F407XE=y
+# 168MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable UART
+CONFIG_SERIAL=y
+
+# Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable pinmux
+CONFIG_PINMUX=y
+
+# Clock configuration
+CONFIG_CLOCK_CONTROL=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Clock configuration for Cube Clock control driver
+CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
+CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
+# Use HSE as PLL input
+CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
+# Produce 168MHz clock at PLL output
+CONFIG_CLOCK_STM32_PLL_M_DIVISOR=8
+CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=336
+CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
+CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=7
+CONFIG_CLOCK_STM32_AHB_PRESCALER=1
+CONFIG_CLOCK_STM32_APB1_PRESCALER=4
+CONFIG_CLOCK_STM32_APB2_PRESCALER=2

boards/arm/black_f407_generic/board.cmake

@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=STM32F407VE" "--speed=4000")
+
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/arm/black_f407_generic/doc/index.rst

@@ -0,0 +1,248 @@
+.. _black_f407ve_board:
+
+ST BLACK_F407VE
+###############
+
+Overview
+********
+
+The BLACK_F407VE board features an ARM Cortex-M4 based STM32F407xx MCU
+with a wide range of connectivity support and configurations. There are
+multiple version of this board like ``black_f407ve``.
+Here are some highlights of the BLACK_F407VE board:
+
+- STM32 microcontroller in LQFP100 package
+- Extension header for all LQFP100 I/Os for quick connection to prototyping
+  board and easy probing
+- Flexible board power supply:
+
+       - USB VBUS or external source (3.3V, 5V)
+       - Power management access point
+
+- Three LEDs:
+
+       - 3.3 V power on (LD0)
+       - Two user LEDs: green (LD1), green (LD2)
+
+- Four push-buttons: RESET, K0, K1 and WK_UP
+- Mini-AB connector
+
+.. image:: img/stm32f4ve.jpg
+     :width: 500px
+     :align: center
+     :height: 500px
+     :alt: BLACK_F407VE
+
+See also board descriptions at `STM32-base website`_,
+`STM32F407VET6 black board`_ and `MCUDev Black STM32F407VET6`_
+
+.. warning:: The +5V pins on this board are directly connected to the +5V pin
+	     of the USB connector. There is no protection in place. Do not
+	     power this board through USB and an external power supply at
+	     the same time.
+
+
+Hardware
+********
+
+BLACK_F407VE board provides the following hardware components:
+
+- STM32F407VET6 in LQFP100 package
+- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
+- 168 MHz max CPU frequency
+- VDD from 1.8 V to 3.6 V
+- 8MHz system crystal
+- 32.768KHz RTC crystal
+- JTAG/SWD header
+- 512 kB Flash
+- 192+4 KB SRAM including 64-Kbyte of core coupled memory
+- GPIO with external interrupt capability
+- 3x12-bit ADC with 24 channels
+- 2x12-bit D/A converters
+- RTC battery CR1220
+- Advanced-control Timer (2)
+- General Purpose Timers (12)
+- Watchdog Timers (2)
+- USART (3), UART (2)
+- I2C (3)
+- I2S (2)
+- SPI (3)
+- SDIO (1)
+- CAN (2)
+- USB 2.0 OTG FS with on-chip PHY
+- USB 2.0 OTG HS/FS with dedicated DMA, on-chip full-speed PHY and ULPI
+- 10/100 Ethernet MAC with dedicated DMA
+- CRC calculation unit
+- True random number generator
+- DMA Controller
+- Micro SD
+- 1x 10/100 Ethernet MAC
+- 1x 8 to 12-bit Parallel Camera interface
+- Micro USB for power and comms
+- 2x jumpers for bootloader selection
+- 2x16 FMSC LCD Interface
+- NRF24L01 socket
+- Dimensions: 85.1mm x 72.45mm
+
+More information about STM32F407VE SOC can be found here:
+       - `STM32F407VE on www.st.com`_
+
+Supported Features
+==================
+
+The Zephyr black_f407ve board configuration supports the following hardware
+features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port-polling;                |
+|           |            | serial port-interrupt               |
++-----------+------------+-------------------------------------+
+| PINMUX    | on-chip    | pinmux                              |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| PWM       | on-chip    | pwm                                 |
++-----------+------------+-------------------------------------+
+| USB       | on-chip    | usb                                 |
++-----------+------------+-------------------------------------+
+| CAN       | on-chip    | CAN controller                      |
++-----------+------------+-------------------------------------+
+| SPI       | on-chip    | spi                                 |
++-----------+------------+-------------------------------------+
+
+.. note:: CAN feature requires CAN transceiver.
+	  Zephyr default configuration uses CAN_2 exclusively, as
+	  simultaneous use of CAN_1 and CAN_2 is not yet supported.
+
+Other hardware features are not yet supported on Zephyr porting.
+
+The default configuration can be found in the defconfig file:
+
+	``boards/arm/black_f407_generic/black_f407ve_defconfig``
+
+
+Pin Mapping
+===========
+
+BLACK_F407VE has 5 GPIO controllers. These controllers are responsible for pin
+muxing, input/output, pull-up, etc.
+
+.. image:: img/stm32f407vet6_left02.png
+     :width: 200px
+     :align: center
+     :height: 200px
+     :alt: left pins
+
+.. image:: img/stm32f407vet6_right01.png
+     :width: 200px
+     :align: center
+     :height: 200px
+     :alt: right pins
+
+.. image:: img/stm32f407vet6_st-link02.png
+     :width: 200px
+     :align: center
+     :height: 200px
+     :alt: bottom and top pins
+
+Default Zephyr Peripheral Mapping:
+----------------------------------
+
+.. rst-class:: rst-columns
+
+- UART_1_TX : PB6
+- UART_1_RX : PB7
+- UART_2_TX : PA2
+- UART_2_RX : PA3
+- USER_PB : PA0
+- LD3 : PD13
+- LD4 : PD12
+- LD5 : PD14
+- LD6 : PD15
+- USB DM : PA11
+- USB DP : PA12
+- CAN1_RX : PD0
+- CAN1_TX : PD1
+- CAN2_RX : PB12
+- CAN2_TX : PB13
+- SPI2 MISO : PC2
+- SPI2 MOSI : PC3
+- SPI2 SCK : PB10
+
+System Clock
+============
+
+BLACK_F407VE System Clock could be driven by internal or external oscillator,
+as well as main PLL clock. By default System clock is driven by PLL clock
+at 168MHz, driven by 8MHz high speed external clock.
+
+Serial Port
+===========
+
+BLACK_F407VE has up to 6 UARTs. The Zephyr console output is assigned to UART2.
+Default settings are 115200 8N1.
+Please note that ST-Link Virtual Com Port is not wired to chip serial port.
+In order to enable console output you should use a serial cable and connect
+it to UART2 pins (PA2/PA3).
+
+
+Programming and Debugging
+*************************
+
+Applications for the ``black_f407ve`` board configuration can be built and
+flashed in the usual way (see :ref:`build_an_application` and
+:ref:`application_run` for more details).
+
+Flashing
+========
+
+BLACK_F407VE board includes an ST-LINK/V2 embedded debug tool interface.
+This interface is supported by the openocd version included in Zephyr SDK.
+
+Flashing an application to BLACK_F407VE
+---------------------------------------
+
+Here is an example for the :ref:`blinky-sample` application.
+
+Run a serial host program to connect with your board:
+
+.. code-block:: console
+
+   $ minicom -D /dev/ttyACM0
+
+Build and flash the application:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/basic/blinky
+   :board: black_f407ve
+   :goals: build flash
+
+You should see user led "LD1" blinking.
+
+Debugging
+=========
+
+You can debug an application in the usual way.  Here is an example for the
+:ref:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: black_f407ve
+   :maybe-skip-config:
+   :goals: debug
+
+.. _STM32-base website:
+   https://stm32-base.org/boards/STM32F407VET6-STM32-F4VE-V2.0.html
+
+.. _STM32F407VE on www.st.com:
+   http://www.st.com/en/microcontrollers/stm32f407ve.html
+
+.. _STM32F407VET6 black board:
+   https://os.mbed.com/users/hudakz/code/STM32F407VET6_Hello/
+
+.. _MCUDev Black STM32F407VET6:
+   https://github.com/mcauser/BLACK_F407VE

boards/arm/black_f407_generic/pinmux.c

@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <kernel.h>
+#include <device.h>
+#include <init.h>
+#include <drivers/pinmux.h>
+#include <sys/sys_io.h>
+
+#include <pinmux/stm32/pinmux_stm32.h>
+
+/* pin assignments for black_f407ve board */
+static const struct pin_config pinconf[] = {
+#ifdef CONFIG_UART_1
+	{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX},
+	{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX},
+#endif	/* CONFIG_UART_1 */
+#ifdef CONFIG_UART_2
+	{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
+	{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
+#endif	/* CONFIG_UART_2 */
+#ifdef CONFIG_PWM_STM32_2
+	{STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1},
+#endif /* CONFIG_PWM_STM32_2 */
+#ifdef CONFIG_USB_DC_STM32
+	{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
+	{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},
+#endif	/* CONFIG_USB_DC_STM32 */
+#ifdef CONFIG_CAN_1
+	{STM32_PIN_PD0, STM32F4_PINMUX_FUNC_PD0_CAN1_RX},
+	{STM32_PIN_PD1, STM32F4_PINMUX_FUNC_PD1_CAN1_TX},
+#endif	/* CONFIG_CAN_1 */
+#ifdef CONFIG_CAN_2
+	{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_CAN2_RX},
+	{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_CAN2_TX},
+#endif	/* CONFIG_CAN_2 */
+#ifdef CONFIG_SPI_2
+	{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_SPI2_SCK},
+	{STM32_PIN_PC2, STM32F4_PINMUX_FUNC_PC2_SPI2_MISO},
+	{STM32_PIN_PC3, STM32F4_PINMUX_FUNC_PC3_SPI2_MOSI},
+#endif /* CONFIG_SPI_2 */
+};
+
+static int pinmux_black_f407ve_init(struct device *port)
+{
+	ARG_UNUSED(port);
+
+	stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
+
+	return 0;
+}
+
+SYS_INIT(pinmux_black_f407ve_init, PRE_KERNEL_1,
+	 CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);

boards/arm/black_f407_generic/support/openocd.cfg

@@ -0,0 +1,12 @@
+source [find board/stm32f4discovery.cfg]
+
+$_TARGETNAME configure -event gdb-attach {
+	echo "Debugger attaching: halting execution"
+	reset halt
+	gdb_breakpoint_override hard
+}
+
+$_TARGETNAME configure -event gdb-detach {
+	echo "Debugger detaching: resuming execution"
+	resume
+}

drivers/pinmux/stm32/pinmux_stm32f4.h

@@ -239,6 +239,9 @@
 #define STM32F4_PINMUX_FUNC_PB10_ETH			    \
 	(STM32_PINMUX_ALT_FUNC_11 | STM32_PUSHPULL_NOPULL | \
 	 STM32_OSPEEDR_VERY_HIGH_SPEED)
+#define STM32F4_PINMUX_FUNC_PB10_SPI2_SCK \
+	(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL | \
+	 STM32_OSPEEDR_VERY_HIGH_SPEED)
 
 #define STM32F4_PINMUX_FUNC_PB11_I2C2_SDA   \
 	(STM32_PINMUX_ALT_FUNC_4 | STM32_OPENDRAIN_PULLUP)
@@ -312,12 +315,16 @@
 	 STM32_OSPEEDR_VERY_HIGH_SPEED)
 #define STM32F4_PINMUX_FUNC_PC2_ADC123_IN12	\
 	STM32_MODER_ANALOG_MODE
+#define STM32F4_PINMUX_FUNC_PC2_SPI2_MISO \
+	(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
 
 #define STM32F4_PINMUX_FUNC_PC3_ETH			    \
 	(STM32_PINMUX_ALT_FUNC_11 | STM32_PUSHPULL_NOPULL | \
 	 STM32_OSPEEDR_VERY_HIGH_SPEED)
 #define STM32F4_PINMUX_FUNC_PC3_ADC123_IN13	\
 	STM32_MODER_ANALOG_MODE
+#define STM32F4_PINMUX_FUNC_PC3_SPI2_MOSI \
+	(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
 
 #define STM32F4_PINMUX_FUNC_PC4_ETH         \
 	(STM32_PINMUX_ALT_FUNC_11 | STM32_PUSHPULL_NOPULL | \