michaelh/zephyr
1
0
Fork 0
Code Releases Activity

usb: stm32wb: Properly lock Sem5 before initializing USB.

Browse source 
* AN5289 notes that Sem5 should be held before configuring
  CLK48 for USB timing.

Signed-off-by: Pete Johanson <peter@peterjohanson.com>
This commit is contained in:
Pete Johanson 2020-05-30 10:39:44 -04:00 • committed by Carles Cufí
commit f525a4b25a
2 changed files with 19 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

17
drivers/usb/device/usb_dc_stm32.c
View file

@ -110,6 +110,8 @@ LOG_MODULE_REGISTER(usb_dc_stm32);
*/
#ifdef USB
#define CFG_HW_RCC_CRRCR_CCIPR_SEMID 5
#define EP0_MPS 64U
#define EP_MPS 64U
@ -253,6 +255,11 @@ static int usb_dc_stm32_clock_enable(void)
}
#endif /* CONFIG_SOC_SERIES_STM32L0X */
#ifdef CONFIG_SOC_SERIES_STM32WBX
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_CRRCR_CCIPR_SEMID)) {
}
#endif /* CONFIG_SOC_SERIES_STM32WBX */
LL_RCC_HSI48_Enable();
while (!LL_RCC_HSI48_IsReady()) {
/* Wait for HSI48 to become ready */
@ -909,6 +916,16 @@ int usb_dc_detach(void)
{
LOG_ERR("Not implemented");
#ifdef CONFIG_SOC_SERIES_STM32WBX
LL_HSEM_ReleaseLock(HSEM, CFG_HW_RCC_CRRCR_CCIPR_SEMID, 0);
/*
* TODO: AN5289 notes a process of locking Sem0, with possible waits
* via interrupts before switching off CLK48, but lacking any actual
* examples of that, that remains to be implemented. See
* https://github.com/zephyrproject-rtos/zephyr/pull/25850
*/
#endif /* CONFIG_SOC_SERIES_STM32WBX */
return 0;
}

4
soc/arm/st_stm32/stm32wb/soc.h
View file

@ -49,9 +49,9 @@
#include <stm32wbxx_ll_system.h>
#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
#ifdef CONFIG_FLASH
#if defined(CONFIG_FLASH) || defined(CONFIG_USB)
#include <stm32wbxx_ll_hsem.h>
#endif /* CONFIG_FLASH */
#endif /* CONFIG_FLASH || CONFIG_USB */
#ifdef CONFIG_I2C_STM32
#include <stm32wbxx_ll_i2c.h>