usb: stm32wb: Properly lock Sem5 before initializing USB.

* AN5289 notes that Sem5 should be held before configuring
  CLK48 for USB timing.

Signed-off-by: Pete Johanson <peter@peterjohanson.com>

drivers/usb/device/usb_dc_stm32.c

@@ -110,6 +110,8 @@ LOG_MODULE_REGISTER(usb_dc_stm32);
  */
 #ifdef USB
 
+#define CFG_HW_RCC_CRRCR_CCIPR_SEMID	5
+
 #define EP0_MPS 64U
 #define EP_MPS 64U
 
@@ -253,6 +255,11 @@ static int usb_dc_stm32_clock_enable(void)
 	}
 #endif /* CONFIG_SOC_SERIES_STM32L0X */
 
+#ifdef CONFIG_SOC_SERIES_STM32WBX
+	while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_CRRCR_CCIPR_SEMID)) {
+	}
+#endif /* CONFIG_SOC_SERIES_STM32WBX */
+
 	LL_RCC_HSI48_Enable();
 	while (!LL_RCC_HSI48_IsReady()) {
 		/* Wait for HSI48 to become ready */
@@ -909,6 +916,16 @@ int usb_dc_detach(void)
 {
 	LOG_ERR("Not implemented");
 
+#ifdef CONFIG_SOC_SERIES_STM32WBX
+	LL_HSEM_ReleaseLock(HSEM, CFG_HW_RCC_CRRCR_CCIPR_SEMID, 0);
+	/*
+	 * TODO: AN5289 notes a process of locking Sem0, with possible waits
+	 * via interrupts before switching off CLK48, but lacking any actual
+	 * examples of that, that remains to be implemented.  See
+	 * https://github.com/zephyrproject-rtos/zephyr/pull/25850
+	 */
+#endif /* CONFIG_SOC_SERIES_STM32WBX */
+
 	return 0;
 }
 

soc/arm/st_stm32/stm32wb/soc.h

@@ -49,9 +49,9 @@
 #include <stm32wbxx_ll_system.h>
 #endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
 
-#ifdef CONFIG_FLASH
+#if defined(CONFIG_FLASH) || defined(CONFIG_USB)
 #include <stm32wbxx_ll_hsem.h>
-#endif /* CONFIG_FLASH */
+#endif /* CONFIG_FLASH || CONFIG_USB */
 
 #ifdef CONFIG_I2C_STM32
 #include <stm32wbxx_ll_i2c.h>