From f4f3ab7df2a00ab821f1564d4d6fd50bdd701ce6 Mon Sep 17 00:00:00 2001 From: Trung Hieu Le Date: Mon, 25 Mar 2024 17:15:05 +0100 Subject: [PATCH] boards: shields: rk055hdmipi4ma0: fix pixelclk-active issue On the RT1170-EVKB, the framebuffer displays incorrectly (shifted by about 1/4 of the screen width). This is because pixelclk-active was set to 1 (which corresponds to kELCDIF_DriveDataOnRisingClkEdge). According to the HX8394 datasheet, the DSI transfert begins at the uprising pixel clock and stop at the falling pixel clock. So, pixelclk-active needs to be set to 0 (which corresponds to kELCDIF_DriveDataOnFallingClkEdge). Signed-off-by: Trung Hieu Le --- boards/shields/rk055hdmipi4ma0/rk055hdmipi4ma0.overlay | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards/shields/rk055hdmipi4ma0/rk055hdmipi4ma0.overlay b/boards/shields/rk055hdmipi4ma0/rk055hdmipi4ma0.overlay index 0f4e0c9ce45..7df9f53b6a3 100644 --- a/boards/shields/rk055hdmipi4ma0/rk055hdmipi4ma0.overlay +++ b/boards/shields/rk055hdmipi4ma0/rk055hdmipi4ma0.overlay @@ -49,7 +49,7 @@ hsync-active = <0>; vsync-active = <0>; de-active = <1>; - pixelclk-active = <1>; + pixelclk-active = <0>; /* * Pixel clock is given by the following formula: * (height + vsync-len + vfront-porch + vback-porch) *