arm: Add GPIO interrupt/callback support for K64F
Interrupt and callback function support is added to the K64F GPIO driver. The implementation is based on the Designware GPIO driver (gpio-dw.*). Change-Id: Id88d06f748400f8f822ca98e098cb44a53678c38 Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
This commit is contained in:
Jeff Blais
Gerrit Code Review
parent
dcd04f2a68
commit
f4c7e6697d
4 changed files with 284 additions and 27 deletions
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@ -710,6 +710,11 @@ config GPIO_K64
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help
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Enable driver for Freescale K64-based GPIOs.
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config PORT_K64_INT_STATUS_OFFSET
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hex "Freescale K64-based Port Control interrupt status register offset"
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depends on GPIO_K64
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default 0xA0
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config GPIO_K64_A
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bool "Freescale K64-based GPIO Port A"
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depends on GPIO_K64
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@ -732,6 +737,20 @@ config PORT_K64_A_BASE_ADDR
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hex # Freescale K64-based Port Control Port A base address
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depends on GPIO_K64_A
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config GPIO_K64_PORTA_IRQ
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int "Freescale K64-based Port A interrupt number"
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depends on GPIO_K64_A
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default 59
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help
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K64 Port A IRQ number for the interrupt controller
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config GPIO_K64_PORTA_PRI
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int "Freescale K64-based Port A interrupt priority"
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depends on GPIO_K64_A
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default 2
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help
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K64 Port A IRQ priority
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config GPIO_K64_B
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bool "Freescale K64-based GPIO Port B"
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depends on GPIO_K64
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@ -754,6 +773,20 @@ config PORT_K64_B_BASE_ADDR
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hex # Freescale K64-based Port Control Port B base address
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depends on GPIO_K64_B
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config GPIO_K64_PORTB_IRQ
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int "Freescale K64-based Port B interrupt number"
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depends on GPIO_K64_B
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default 60
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help
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K64 Port B IRQ number for the interrupt controller
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config GPIO_K64_PORTB_PRI
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int "Freescale K64-based Port B interrupt priority"
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depends on GPIO_K64_B
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default 2
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help
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K64 Port B IRQ priority
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config GPIO_K64_C
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bool "Freescale K64-based GPIO Port B"
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depends on GPIO_K64
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@ -776,6 +809,20 @@ config PORT_K64_C_BASE_ADDR
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hex # Freescale K64-based Port Control Port C base address
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depends on GPIO_K64_C
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config GPIO_K64_PORTC_IRQ
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int "Freescale K64-based Port C interrupt number"
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depends on GPIO_K64_C
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default 61
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help
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K64 Port C IRQ number for the interrupt controller
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config GPIO_K64_PORTC_PRI
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int "Freescale K64-based Port C interrupt priority"
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depends on GPIO_K64_C
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default 2
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help
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K64 Port C IRQ priority
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config GPIO_K64_D
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bool "Freescale K64-based GPIO Port D"
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depends on GPIO_K64
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@ -798,6 +845,20 @@ config PORT_K64_D_BASE_ADDR
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hex # Freescale K64-based Port Control Port D base address
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depends on GPIO_K64_D
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config GPIO_K64_PORTD_IRQ
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int "Freescale K64-based Port D interrupt number"
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depends on GPIO_K64_D
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default 62
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help
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K64 Port D IRQ number for the interrupt controller
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config GPIO_K64_PORTD_PRI
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int "Freescale K64-based Port D interrupt priority"
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depends on GPIO_K64_D
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default 2
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help
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K64 Port D IRQ priority
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config GPIO_K64_E
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bool "Freescale K64-based GPIO Port E"
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depends on GPIO_K64
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@ -820,6 +881,20 @@ config PORT_K64_E_BASE_ADDR
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hex # Freescale K64-based Port Control Port E base address
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depends on GPIO_K64_E
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config GPIO_K64_PORTE_IRQ
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int "Freescale K64-based Port E interrupt number"
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depends on GPIO_K64_E
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default 63
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help
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K64 Port E IRQ number for the interrupt controller
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config GPIO_K64_PORTE_PRI
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int "Freescale K64-based Port E interrupt priority"
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depends on GPIO_K64_E
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default 2
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help
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K64 Port E IRQ priority
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source "drivers/gpio/Kconfig.atmel_sam3"
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endif # GPIO
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@ -39,8 +39,8 @@ static int gpio_k64_config(struct device *dev, int access_op,
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/* check for an invalid pin configuration */
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if (flags & GPIO_INT) {
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/* interrupts not supported */
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if (((flags & GPIO_INT) && (flags & GPIO_DIR_OUT)) ||
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((flags & GPIO_DIR_IN) && (flags & GPIO_DIR_OUT))) {
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return DEV_INVALID_OP;
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}
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@ -82,7 +82,36 @@ static int gpio_k64_config(struct device *dev, int access_op,
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return DEV_INVALID_OP;
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}
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/* write pull-up/-down configuration settings */
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/*
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* Set up interrupt configuration, in Port Control module:
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*/
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if (flags & GPIO_INT) {
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/* edge or level */
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if (flags & GPIO_INT_EDGE) {
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if (flags & GPIO_INT_ACTIVE_HIGH) {
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setting |= K64_PINMUX_INT_RISING;
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} else if (flags & GPIO_INT_DOUBLE_EDGE) {
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setting |= K64_PINMUX_INT_BOTH_EDGE;
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} else {
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setting |= K64_PINMUX_INT_FALLING;
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}
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} else { /* GPIO_INT_LEVEL */
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if (flags & GPIO_INT_ACTIVE_HIGH) {
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setting |= K64_PINMUX_INT_HIGH;
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} else {
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setting |= K64_PINMUX_INT_LOW;
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}
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}
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}
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/* write pull-up/-down and, if set, interrupt configuration settings */
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if (access_op == GPIO_ACCESS_BY_PIN) {
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@ -92,6 +121,10 @@ static int gpio_k64_config(struct device *dev, int access_op,
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value &= ~(K64_PINMUX_PULL_EN_MASK | K64_PINMUX_PULL_SEL_MASK);
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if (flags & GPIO_INT) {
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value &= ~K64_PINMUX_INT_MASK;
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}
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value |= setting;
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sys_write32(value,
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@ -108,6 +141,10 @@ static int gpio_k64_config(struct device *dev, int access_op,
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value &= ~(K64_PINMUX_PULL_EN_MASK | K64_PINMUX_PULL_SEL_MASK);
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if (flags & GPIO_INT) {
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value &= ~K64_PINMUX_INT_MASK;
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}
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value |= setting;
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sys_write32(value,
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@ -164,32 +201,44 @@ static int gpio_k64_read(struct device *dev, int access_op,
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static int gpio_k64_set_callback(struct device *dev, gpio_callback_t callback)
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{
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ARG_UNUSED(dev);
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ARG_UNUSED(callback);
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struct gpio_k64_data *data = dev->driver_data;
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return DEV_INVALID_OP;
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data->callback_func = callback;
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return DEV_OK;
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}
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static int gpio_k64_enable_callback(struct device *dev, int access_op,
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uint32_t pin)
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{
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ARG_UNUSED(dev);
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ARG_UNUSED(access_op);
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ARG_UNUSED(pin);
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struct gpio_k64_data *data = dev->driver_data;
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return DEV_INVALID_OP;
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if (access_op == GPIO_ACCESS_BY_PIN) {
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data->pin_callback_enables |= (1 << pin);
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} else {
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data->port_callback_enable = 1;
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}
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return DEV_OK;
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}
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static int gpio_k64_disable_callback(struct device *dev, int access_op,
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uint32_t pin)
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{
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ARG_UNUSED(dev);
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ARG_UNUSED(access_op);
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ARG_UNUSED(pin);
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struct gpio_k64_data *data = dev->driver_data;
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return DEV_INVALID_OP;
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if (access_op == GPIO_ACCESS_BY_PIN) {
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data->pin_callback_enables &= ~(1 << pin);
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} else {
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data->port_callback_enable = 0;
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}
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return DEV_OK;
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}
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static int gpio_k64_suspend_port(struct device *dev)
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{
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ARG_UNUSED(dev);
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@ -197,6 +246,7 @@ static int gpio_k64_suspend_port(struct device *dev)
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return DEV_INVALID_OP;
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}
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static int gpio_k64_resume_port(struct device *dev)
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{
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ARG_UNUSED(dev);
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@ -204,6 +254,61 @@ static int gpio_k64_resume_port(struct device *dev)
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return DEV_INVALID_OP;
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}
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/**
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* @brief Handler for port interrupts
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* @param dev Pointer to device structure for driver instance
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*
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* @return N/A
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*/
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static void gpio_k64_port_isr(void *dev)
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{
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struct device *port = (struct device *)dev;
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struct gpio_k64_data *data = port->driver_data;
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struct gpio_k64_config *config = port->config->config_info;
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mem_addr_t int_status_reg_addr;
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uint32_t enabled_int, int_status, pin;
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if (!data->callback_func) {
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return;
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}
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int_status_reg_addr = config->port_base_addr +
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CONFIG_PORT_K64_INT_STATUS_OFFSET;
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int_status = sys_read32(int_status_reg_addr);
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if (data->port_callback_enable) {
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data->callback_func(port, int_status);
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} else if (data->pin_callback_enables) {
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/* perform callback for each callback-enabled pin with an interrupt */
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enabled_int = int_status & data->pin_callback_enables;
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while ((pin = find_lsb_set(enabled_int))) {
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pin--; /* normalize the pin number */
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data->callback_func(port, (1 << pin));
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/* clear the interrupt status */
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enabled_int &= ~(1 << pin);
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}
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}
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/* clear the port interrupts */
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sys_write32(0xFFFFFFFF, int_status_reg_addr);
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}
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static struct gpio_driver_api gpio_k64_drv_api_funcs = {
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.config = gpio_k64_config,
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.write = gpio_k64_write,
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@ -232,69 +337,139 @@ int gpio_k64_init(struct device *dev)
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/* Initialization for Port A */
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#ifdef CONFIG_GPIO_K64_A
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static int gpio_k64_A_init(struct device *dev);
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static struct gpio_k64_config gpio_k64_A_cfg = {
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.gpio_base_addr = CONFIG_GPIO_K64_A_BASE_ADDR,
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.port_base_addr = CONFIG_PORT_K64_A_BASE_ADDR,
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};
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DEVICE_INIT(gpio_k64_A, CONFIG_GPIO_K64_A_DEV_NAME, gpio_k64_init,
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NULL, &gpio_k64_A_cfg,
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static struct gpio_k64_data gpio_data_A;
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DEVICE_INIT(gpio_k64_A, CONFIG_GPIO_K64_A_DEV_NAME, gpio_k64_A_init,
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&gpio_data_A, &gpio_k64_A_cfg,
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SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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static int gpio_k64_A_init(struct device *dev)
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{
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IRQ_CONNECT(CONFIG_GPIO_K64_PORTA_IRQ, CONFIG_GPIO_K64_PORTA_PRI,
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gpio_k64_port_isr, DEVICE_GET(gpio_k64_A), 0);
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irq_enable(CONFIG_GPIO_K64_PORTA_IRQ);
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return gpio_k64_init(dev);
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}
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#endif /* CONFIG_GPIO_K64_A */
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/* Initialization for Port B */
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#ifdef CONFIG_GPIO_K64_B
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static int gpio_k64_B_init(struct device *dev);
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static struct gpio_k64_config gpio_k64_B_cfg = {
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.gpio_base_addr = CONFIG_GPIO_K64_B_BASE_ADDR,
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.port_base_addr = CONFIG_PORT_K64_B_BASE_ADDR,
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};
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DEVICE_INIT(gpio_k64_B, CONFIG_GPIO_K64_B_DEV_NAME, gpio_k64_init,
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NULL, &gpio_k64_B_cfg,
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static struct gpio_k64_data gpio_data_B;
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DEVICE_INIT(gpio_k64_B, CONFIG_GPIO_K64_B_DEV_NAME, gpio_k64_B_init,
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&gpio_data_B, &gpio_k64_B_cfg,
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SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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static int gpio_k64_B_init(struct device *dev)
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{
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IRQ_CONNECT(CONFIG_GPIO_K64_PORTB_IRQ, CONFIG_GPIO_K64_PORTB_PRI,
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gpio_k64_port_isr, DEVICE_GET(gpio_k64_B), 0);
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irq_enable(CONFIG_GPIO_K64_PORTB_IRQ);
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return gpio_k64_init(dev);
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}
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#endif /* CONFIG_GPIO_K64_B */
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/* Initialization for Port C */
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#ifdef CONFIG_GPIO_K64_C
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static int gpio_k64_C_init(struct device *dev);
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static struct gpio_k64_config gpio_k64_C_cfg = {
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.gpio_base_addr = CONFIG_GPIO_K64_C_BASE_ADDR,
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.port_base_addr = CONFIG_PORT_K64_C_BASE_ADDR,
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};
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DEVICE_INIT(gpio_k64_C, CONFIG_GPIO_K64_C_DEV_NAME, gpio_k64_init,
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NULL, &gpio_k64_C_cfg,
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static struct gpio_k64_data gpio_data_C;
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DEVICE_INIT(gpio_k64_C, CONFIG_GPIO_K64_C_DEV_NAME, gpio_k64_C_init,
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&gpio_data_C, &gpio_k64_C_cfg,
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SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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static int gpio_k64_C_init(struct device *dev)
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{
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IRQ_CONNECT(CONFIG_GPIO_K64_PORTC_IRQ, CONFIG_GPIO_K64_PORTC_PRI,
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gpio_k64_port_isr, DEVICE_GET(gpio_k64_C), 0);
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irq_enable(CONFIG_GPIO_K64_PORTC_IRQ);
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return gpio_k64_init(dev);
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}
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#endif /* CONFIG_GPIO_K64_C */
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/* Initialization for Port D */
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#ifdef CONFIG_GPIO_K64_D
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static int gpio_k64_D_init(struct device *dev);
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static struct gpio_k64_config gpio_k64_D_cfg = {
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.gpio_base_addr = CONFIG_GPIO_K64_D_BASE_ADDR,
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.port_base_addr = CONFIG_PORT_K64_D_BASE_ADDR,
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};
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DEVICE_INIT(gpio_k64_D, CONFIG_GPIO_K64_D_DEV_NAME, gpio_k64_init,
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NULL, &gpio_k64_D_cfg,
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static struct gpio_k64_data gpio_data_D;
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DEVICE_INIT(gpio_k64_D, CONFIG_GPIO_K64_D_DEV_NAME, gpio_k64_D_init,
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&gpio_data_D, &gpio_k64_D_cfg,
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SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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static int gpio_k64_D_init(struct device *dev)
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{
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IRQ_CONNECT(CONFIG_GPIO_K64_PORTD_IRQ, CONFIG_GPIO_K64_PORTD_PRI,
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gpio_k64_port_isr, DEVICE_GET(gpio_k64_D), 0);
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irq_enable(CONFIG_GPIO_K64_PORTD_IRQ);
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return gpio_k64_init(dev);
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}
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#endif /* CONFIG_GPIO_K64_D */
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/* Initialization for Port E */
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#ifdef CONFIG_GPIO_K64_E
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static int gpio_k64_E_init(struct device *dev);
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static struct gpio_k64_config gpio_k64_E_cfg = {
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.gpio_base_addr = CONFIG_GPIO_K64_E_BASE_ADDR,
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.port_base_addr = CONFIG_PORT_K64_E_BASE_ADDR,
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};
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DEVICE_INIT(gpio_k64_E, CONFIG_GPIO_K64_E_DEV_NAME, gpio_k64_init,
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NULL, &gpio_k64_E_cfg,
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static struct gpio_k64_data gpio_data_E;
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DEVICE_INIT(gpio_k64_E, CONFIG_GPIO_K64_E_DEV_NAME, gpio_k64_E_init,
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&gpio_data_E, &gpio_k64_E_cfg,
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SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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static int gpio_k64_E_init(struct device *dev)
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{
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IRQ_CONNECT(CONFIG_GPIO_K64_PORTE_IRQ, CONFIG_GPIO_K64_PORTE_PRI,
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gpio_k64_port_isr, DEVICE_GET(gpio_k64_E), 0);
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irq_enable(CONFIG_GPIO_K64_PORTE_IRQ);
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return gpio_k64_init(dev);
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}
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#endif /* CONFIG_GPIO_K64_E */
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|
|
|
|||
|
|
@ -43,4 +43,12 @@ struct gpio_k64_config {
|
|||
uint32_t port_base_addr;
|
||||
};
|
||||
|
||||
struct gpio_k64_data {
|
||||
/* port ISR callback routine address */
|
||||
gpio_callback_t callback_func;
|
||||
/* pin callback routine enable flags, by pin number */
|
||||
uint32_t pin_callback_enables;
|
||||
/* port callback routine enable flag */
|
||||
uint8_t port_callback_enable;
|
||||
};
|
||||
#endif /* _GPIO_K64_H_ */
|
||||
|
|
|
|||
|
|
@ -166,8 +166,7 @@ static uint32_t _fsl_k64_set_pin(struct device *dev,
|
|||
bool is_gpio = false;
|
||||
int gpio_setting;
|
||||
|
||||
if ((pin_id >= CONFIG_PINMUX_NUM_PINS) ||
|
||||
(func & K64_PINMUX_INT_MASK)) { /* interrupts not supported */
|
||||
if (pin_id >= CONFIG_PINMUX_NUM_PINS) {
|
||||
|
||||
return DEV_INVALID_OP;
|
||||
}
|
||||
|
|
@ -360,4 +359,4 @@ struct fsl_k64_data fsl_k64_pinmux_driver = {
|
|||
/* must be initialized after GPIO */
|
||||
DEVICE_INIT(pmux, PINMUX_NAME, &pinmux_fsl_k64_initialize,
|
||||
&fsl_k64_pinmux_driver, &fsl_k64_pmux,
|
||||
PRIMARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
|
||||
SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue