boards: stm32h747i_disco: Use dts for clocks configuration
Convert board to use of device tree for clocks configuration. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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5 changed files with 34 additions and 42 deletions
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@ -9,32 +9,6 @@ config BOARD
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default "stm32h747i_disco_m7" if BOARD_STM32H747I_DISCO_M7
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default "stm32h747i_disco_m4" if BOARD_STM32H747I_DISCO_M4
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# clock configuration
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 400000000 if BOARD_STM32H747I_DISCO_M7
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# SYS_CLOCK_M4 = SYS_CLOCK_M7 / CLOCK_STM32_HPRE
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default 200000000 if BOARD_STM32H747I_DISCO_M4
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config CLOCK_STM32_D1CPRE
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default 1
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config CLOCK_STM32_HPRE
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# HCLK: 200MHz
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default 2
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config CLOCK_STM32_D2PPRE1
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# APBX: 100MHz
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default 2
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config CLOCK_STM32_D2PPRE2
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default 2
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config CLOCK_STM32_D1PPRE
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default 2
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config CLOCK_STM32_D3PPRE
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default 2
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config STM32H7_DUAL_CORE
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default y
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@ -66,4 +66,13 @@
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};
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};
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&rcc {
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d1cpre = <1>;
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hpre = <2>;
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d1ppre = <2>;
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d2ppre1 = <2>;
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d2ppre2 = <2>;
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d3ppre = <2>;
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};
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arduino_serial: &uart8 {};
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@ -43,6 +43,10 @@
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};
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};
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&rcc {
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clock-frequency = <DT_FREQ_M(200)>;
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};
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&usart1 {
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pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
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current-speed = <115200>;
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@ -48,6 +48,26 @@
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};
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};
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&clk_hse {
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clock-frequency = <DT_FREQ_M(25)>;
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status = "okay";
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};
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&pll {
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div-m = <5>;
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mul-n = <160>;
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div-p = <2>;
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div-q = <4>;
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div-r = <2>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(400)>;
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};
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&usart1 {
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pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
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current-speed = <115200>;
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@ -12,24 +12,9 @@ CONFIG_PINMUX=y
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# enable GPIO
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CONFIG_GPIO=y
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# clock configuration
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# Enable clocks
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CONFIG_CLOCK_CONTROL=y
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# Clock configuration for Cube Clock control driver
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CONFIG_CLOCK_STM32_HSE_CLOCK=25000000
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# use HSE (bypass) as PLL input
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CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
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CONFIG_CLOCK_STM32_HSE_BYPASS=y
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# produce 400MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_M_DIVISOR=5
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CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=160
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CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
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CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=4
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CONFIG_CLOCK_STM32_PLL_R_DIVISOR=2
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# Enable MPU
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CONFIG_ARM_MPU=y
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