From f3ea8328357eb168cdb0c36dd3ac89ded918a613 Mon Sep 17 00:00:00 2001 From: Guillaume Gautier Date: Fri, 11 Apr 2025 15:19:39 +0200 Subject: [PATCH] boards: st: n6: use ic3 as xspi kernel clock Configure and enable IC3 to 400MHz and use it as kernel clock for XSPI instances. Signed-off-by: Guillaume Gautier --- .../st/nucleo_n657x0_q/nucleo_n657x0_q_common.dtsi | 9 +++++++++ boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi | 12 ++++++++++++ 2 files changed, 21 insertions(+) diff --git a/boards/st/nucleo_n657x0_q/nucleo_n657x0_q_common.dtsi b/boards/st/nucleo_n657x0_q/nucleo_n657x0_q_common.dtsi index c7ed3565522..b249d2ab847 100644 --- a/boards/st/nucleo_n657x0_q/nucleo_n657x0_q_common.dtsi +++ b/boards/st/nucleo_n657x0_q/nucleo_n657x0_q_common.dtsi @@ -97,6 +97,12 @@ status = "okay"; }; +&ic3 { + pll-src = <1>; + ic-div = <6>; + status = "okay"; +}; + &ic6 { pll-src = <3>; ic-div = <2>; @@ -224,6 +230,9 @@ zephyr_udc0: &usbotg_hs1 { &xspim_p2_io3_pn5 &xspim_p2_io4_pn8 &xspim_p2_io5_pn9 &xspim_p2_io6_pn10 &xspim_p2_io7_pn11>; pinctrl-names = "default"; + clocks = <&rcc STM32_CLOCK(AHB5, 12)>, + <&rcc STM32_SRC_IC3 XSPI1_SEL(2)>, + <&rcc STM32_CLOCK(AHB5, 13)>; status = "okay"; mx25um51245g: ospi-nor-flash@70000000 { diff --git a/boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi b/boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi index 234b8c0b87d..48ee7e4a22a 100644 --- a/boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi +++ b/boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi @@ -107,6 +107,12 @@ status = "okay"; }; +&ic3 { + pll-src = <1>; + ic-div = <6>; + status = "okay"; +}; + &ic4 { pll-src = <2>; ic-div = <32>; @@ -238,6 +244,9 @@ zephyr_udc0: &usbotg_hs1 { &xspim_p1_io12_pp12 &xspim_p1_io13_pp13 &xspim_p1_io14_pp14 &xspim_p1_io15_pp15>; pinctrl-names = "default"; + clocks = <&rcc STM32_CLOCK(AHB5, 5)>, + <&rcc STM32_SRC_IC3 XSPI1_SEL(2)>, + <&rcc STM32_CLOCK(AHB5, 13)>; status = "okay"; memc: aps256xxn_obr: memory@90000000 { @@ -258,6 +267,9 @@ zephyr_udc0: &usbotg_hs1 { &xspim_p2_io3_pn5 &xspim_p2_io4_pn8 &xspim_p2_io5_pn9 &xspim_p2_io6_pn10 &xspim_p2_io7_pn11>; pinctrl-names = "default"; + clocks = <&rcc STM32_CLOCK(AHB5, 12)>, + <&rcc STM32_SRC_IC3 XSPI1_SEL(2)>, + <&rcc STM32_CLOCK(AHB5, 13)>; status = "okay"; mx66uw1g45g: ospi-nor-flash@70000000 {