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soc: riscv: esp32c3: apply CONFIG_RISCV_GP option

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esp32c3 has already supported RISC-V GP, just apply new kconfig option
to it. Forcely select CONFIG_RISCV_GP in esp32c3 at first because it
seems to be necessary in the esp32c3 SoC.

Signed-off-by: Jim Shu <cwshu@andestech.com>
This commit is contained in:
Jim Shu 2021-08-18 17:53:36 +08:00 • committed by Christopher Friedt
commit f3e926b6d0
3 changed files with 5 additions and 0 deletions
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1
soc/riscv/esp32c3/Kconfig.soc
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@ -4,6 +4,7 @@
config SOC_ESP32C3 config SOC_ESP32C3
bool "ESP32C3" bool "ESP32C3"
select RISCV select RISCV
select RISCV_GP
select DYNAMIC_INTERRUPTS select DYNAMIC_INTERRUPTS
config IDF_TARGET_ESP32C3 config IDF_TARGET_ESP32C3

2
soc/riscv/esp32c3/linker.ld
View file

@ -154,7 +154,9 @@ SECTIONS
*(.data.*) *(.data.*)
*(.gnu.linkonce.d.*) *(.gnu.linkonce.d.*)
*(.data1) *(.data1)
#ifdef CONFIG_RISCV_GP
__global_pointer$ = . + 0x800; __global_pointer$ = . + 0x800;
#endif /* CONFIG_RISCV_GP */
*(.sdata) *(.sdata)
*(.sdata.*) *(.sdata.*)
*(.gnu.linkonce.s.*) *(.gnu.linkonce.s.*)

2
soc/riscv/esp32c3/soc.c
View file

@ -36,6 +36,7 @@ void __attribute__((section(".iram1"))) __start(void)
volatile uint32_t *wdt_rtc_protect = (uint32_t *)RTC_CNTL_WDTWPROTECT_REG; volatile uint32_t *wdt_rtc_protect = (uint32_t *)RTC_CNTL_WDTWPROTECT_REG;
volatile uint32_t *wdt_rtc_reg = (uint32_t *)RTC_CNTL_WDTCONFIG0_REG; volatile uint32_t *wdt_rtc_reg = (uint32_t *)RTC_CNTL_WDTCONFIG0_REG;
#ifdef CONFIG_RISCV_GP
/* Configure the global pointer register /* Configure the global pointer register
* (This should be the first thing startup does, as any other piece of code could be * (This should be the first thing startup does, as any other piece of code could be
* relaxed by the linker to access something relative to __global_pointer$) * relaxed by the linker to access something relative to __global_pointer$)
@ -44,6 +45,7 @@ void __attribute__((section(".iram1"))) __start(void)
".option norelax\n" ".option norelax\n"
"la gp, __global_pointer$\n" "la gp, __global_pointer$\n"
".option pop"); ".option pop");
#endif /* CONFIG_RISCV_GP */
__asm__ __volatile__("la t0, _esp32c3_vector_table\n" __asm__ __volatile__("la t0, _esp32c3_vector_table\n"
"csrw mtvec, t0\n"); "csrw mtvec, t0\n");