Bluetooth: Controller: nRF54Lx: Review rework GRTC support
Review rework GRTC support for nRF54Lx SoCs. Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
This commit is contained in:
parent
4fb293224c
commit
f39c27bc95
10 changed files with 125 additions and 110 deletions
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@ -5,6 +5,8 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "hal/cntr_vendor_hal.h"
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void cntr_init(void);
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uint32_t cntr_start(void);
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uint32_t cntr_stop(void);
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@ -0,0 +1,7 @@
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/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "hal/nrf5/cntr.h"
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@ -51,8 +51,9 @@ void cntr_init(void)
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GRTC_CLKCFG_CLKFASTDIV_Msk);
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#endif /* CONFIG_BT_CTLR_NRF_GRTC_START */
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NRF_GRTC->EVENTS_COMPARE[10] = 0U;
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NRF_GRTC->INTENSET1 = GRTC_INTENSET1_COMPARE10_Msk;
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NRF_GRTC->EVENTS_COMPARE[HAL_CNTR_GRTC_CC_IDX_TICKER] = 0U;
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NRF_GRTC->INTENSET1 = HAL_CNTR_GRTC_INTENSET_COMPARE_TICKER_Msk;
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#if defined(CONFIG_BT_CTLR_NRF_GRTC_START)
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NRF_GRTC->MODE = ((GRTC_MODE_SYSCOUNTEREN_Enabled <<
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@ -115,7 +116,7 @@ uint32_t cntr_stop(void)
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uint32_t cntr_cnt_get(void)
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{
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#if defined(CONFIG_BT_CTLR_NRF_GRTC)
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uint32_t l, h, ho;
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uint32_t cntr_l, cntr_h, cntr_h_overflow;
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/* NOTE: For a 32-bit implementation, L value is read after H
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* to avoid another L value after SYSCOUNTER gets ready.
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@ -123,13 +124,13 @@ uint32_t cntr_cnt_get(void)
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* ensure that L value does not change when H value is read.
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*/
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do {
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h = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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l = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERL;
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ho = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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} while ((h & GRTC_SYSCOUNTER_SYSCOUNTERH_BUSY_Msk) ||
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(ho & GRTC_SYSCOUNTER_SYSCOUNTERH_OVERFLOW_Msk));
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cntr_h = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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cntr_l = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERL;
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cntr_h_overflow = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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} while ((cntr_h & GRTC_SYSCOUNTER_SYSCOUNTERH_BUSY_Msk) ||
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(cntr_h_overflow & GRTC_SYSCOUNTER_SYSCOUNTERH_OVERFLOW_Msk));
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return l;
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return cntr_l;
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#else /* !CONFIG_BT_CTLR_NRF_GRTC */
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return nrf_rtc_counter_get(NRF_RTC);
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#endif /* !CONFIG_BT_CTLR_NRF_GRTC */
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@ -138,7 +139,7 @@ uint32_t cntr_cnt_get(void)
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void cntr_cmp_set(uint8_t cmp, uint32_t value)
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{
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#if defined(CONFIG_BT_CTLR_NRF_GRTC)
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uint32_t l, h, ho, stale;
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uint32_t cntr_l, cntr_h, cntr_h_overflow, stale;
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/* NOTE: We are going to use TASKS_CAPTURE to read current
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* SYSCOUNTER H and L, so that COMPARE registers can be set
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@ -147,17 +148,17 @@ void cntr_cmp_set(uint8_t cmp, uint32_t value)
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/* Read current syscounter value */
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do {
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h = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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l = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERL;
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ho = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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} while ((h & GRTC_SYSCOUNTER_SYSCOUNTERH_BUSY_Msk) ||
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(ho & GRTC_SYSCOUNTER_SYSCOUNTERH_OVERFLOW_Msk));
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cntr_h = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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cntr_l = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERL;
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cntr_h_overflow = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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} while ((cntr_h & GRTC_SYSCOUNTER_SYSCOUNTERH_BUSY_Msk) ||
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(cntr_h_overflow & GRTC_SYSCOUNTER_SYSCOUNTERH_OVERFLOW_Msk));
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/* Disable capture/compare */
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NRF_GRTC->CC[cmp].CCEN = 0U;
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/* Set a stale value in capture value */
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stale = l - 1U;
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stale = cntr_l - 1U;
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NRF_GRTC->CC[cmp].CCL = stale;
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/* Trigger a capture */
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@ -165,22 +166,22 @@ void cntr_cmp_set(uint8_t cmp, uint32_t value)
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/* Wait to get a new L value */
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do {
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l = NRF_GRTC->CC[cmp].CCL;
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} while (l == stale);
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cntr_l = NRF_GRTC->CC[cmp].CCL;
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} while (cntr_l == stale);
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/* Read H value */
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h = NRF_GRTC->CC[cmp].CCH;
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cntr_h = NRF_GRTC->CC[cmp].CCH;
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/* NOTE: HERE, we have h and l in sync. */
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/* NOTE: HERE, we have cntr_h and cntr_l in sync. */
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/* Handle rollover between current and expected value */
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if (value < l) {
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h++;
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if (value < cntr_l) {
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cntr_h++;
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}
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/* Set compare register values */
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NRF_GRTC->CC[cmp].CCL = value;
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NRF_GRTC->CC[cmp].CCH = h & GRTC_CC_CCH_CCH_Msk;
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NRF_GRTC->CC[cmp].CCH = cntr_h & GRTC_CC_CCH_CCH_Msk;
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/* Enable compare */
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NRF_GRTC->CC[cmp].CCEN = 1U;
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12
subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/cntr.h
Normal file
12
subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/cntr.h
Normal file
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@ -0,0 +1,12 @@
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/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#if defined(CONFIG_BT_CTLR_NRF_GRTC)
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#define HAL_CNTR_GRTC_CC_IDX_TICKER 10
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#define HAL_CNTR_GRTC_INTENSET_COMPARE_TICKER_Msk \
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_CONCAT(_CONCAT(GRTC_INTENSET1_COMPARE, HAL_CNTR_GRTC_CC_IDX_TICKER), _Msk)
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#define HAL_CNTR_GRTC_CC_IDX_RADIO 11
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#endif /* CONFIG_BT_CTLR_NRF_GRTC */
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@ -15,6 +15,7 @@
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#include "hal/cpu.h"
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#include "hal/ccm.h"
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#include "hal/cntr.h"
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#include "hal/radio.h"
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#include "hal/radio_df.h"
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#include "hal/ticker.h"
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@ -1181,8 +1182,7 @@ uint32_t radio_bc_has_match(void)
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void radio_tmr_status_reset(void)
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{
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#if defined(CONFIG_BT_CTLR_NRF_GRTC)
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#define GRTC_CC_IDX_RADIO 11U
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NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCEN = 0U;
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NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCEN = 0U;
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#else /* !CONFIG_BT_CTLR_NRF_GRTC */
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nrf_rtc_event_disable(NRF_RTC, RTC_EVTENCLR_COMPARE2_Msk);
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#endif /* !CONFIG_BT_CTLR_NRF_GRTC */
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@ -1225,7 +1225,7 @@ void radio_tmr_status_reset(void)
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void radio_tmr_tx_status_reset(void)
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{
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#if defined(CONFIG_BT_CTLR_NRF_GRTC)
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NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCEN = 0U;
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NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCEN = 0U;
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#else /* !CONFIG_BT_CTLR_NRF_GRTC */
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nrf_rtc_event_disable(NRF_RTC, RTC_EVTENCLR_COMPARE2_Msk);
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#endif /* !CONFIG_BT_CTLR_NRF_GRTC */
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@ -1272,7 +1272,7 @@ void radio_tmr_tx_status_reset(void)
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void radio_tmr_rx_status_reset(void)
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{
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#if defined(CONFIG_BT_CTLR_NRF_GRTC)
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NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCEN = 0U;
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NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCEN = 0U;
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#else /* !CONFIG_BT_CTLR_NRF_GRTC */
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nrf_rtc_event_disable(NRF_RTC, RTC_EVTENCLR_COMPARE2_Msk);
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#endif /* !CONFIG_BT_CTLR_NRF_GRTC */
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@ -1389,30 +1389,10 @@ uint32_t radio_tmr_start(uint8_t trx, uint32_t ticks_start, uint32_t remainder)
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nrf_timer_cc_set(EVENT_TIMER, 0, remainder);
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#if defined(CONFIG_BT_CTLR_NRF_GRTC)
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uint32_t l, h, ho, stale;
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uint32_t cntr_l, cntr_h, cntr_h_overflow, stale;
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/* Disable capture/compare */
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NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCEN = 0U;
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/* Publish GRTC compare */
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NRF_GRTC->PUBLISH_COMPARE[GRTC_CC_IDX_RADIO] =
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((HAL_EVENT_TIMER_START_PPI <<
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GRTC_PUBLISH_COMPARE_CHIDX_Pos) &
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GRTC_PUBLISH_COMPARE_CHIDX_Msk) |
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((GRTC_PUBLISH_COMPARE_EN_Enabled <<
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GRTC_PUBLISH_COMPARE_EN_Pos) &
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GRTC_PUBLISH_COMPARE_EN_Msk);
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/* Enable same DPPI in Global domain */
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NRF_DPPIC20->CHENSET = BIT(HAL_EVENT_TIMER_START_PPI);
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/* Setup PPIB send subscribe */
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NRF_PPIB21->SUBSCRIBE_SEND[HAL_EVENT_TIMER_START_PPI] =
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BIT(HAL_EVENT_TIMER_START_PPI) | PPIB_SUBSCRIBE_SEND_EN_Msk;
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/* Setup PPIB receive publish */
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NRF_PPIB11->PUBLISH_RECEIVE[HAL_EVENT_TIMER_START_PPI] =
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BIT(HAL_EVENT_TIMER_START_PPI) | PPIB_PUBLISH_RECEIVE_EN_Msk;
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NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCEN = 0U;
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/* NOTE: We are going to use TASKS_CAPTURE to read current
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* SYSCOUNTER H and L, so that COMPARE registers can be set
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/* Read current syscounter value */
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do {
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h = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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l = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERL;
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ho = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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} while ((h & GRTC_SYSCOUNTER_SYSCOUNTERH_BUSY_Msk) ||
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(ho & GRTC_SYSCOUNTER_SYSCOUNTERH_OVERFLOW_Msk));
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cntr_h = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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cntr_l = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERL;
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cntr_h_overflow = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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} while ((cntr_h & GRTC_SYSCOUNTER_SYSCOUNTERH_BUSY_Msk) ||
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(cntr_h_overflow & GRTC_SYSCOUNTER_SYSCOUNTERH_OVERFLOW_Msk));
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/* Set a stale value in capture value */
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stale = l - 1U;
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NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCL = stale;
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stale = cntr_l - 1U;
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NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCL = stale;
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/* Trigger a capture */
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NRF_GRTC->TASKS_CAPTURE[GRTC_CC_IDX_RADIO] = 1U;
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NRF_GRTC->TASKS_CAPTURE[HAL_CNTR_GRTC_CC_IDX_RADIO] = 1U;
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/* Wait to get a new L value */
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do {
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l = NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCL;
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} while (l == stale);
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cntr_l = NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCL;
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} while (cntr_l == stale);
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/* Read H value */
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h = NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCH;
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cntr_h = NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCH;
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/* NOTE: HERE, we have h and l in sync. */
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/* NOTE: HERE, we have cntr_h and cntr_l in sync. */
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/* Handle rollover between current and expected value */
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if (ticks_start < l) {
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h++;
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if (ticks_start < cntr_l) {
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cntr_h++;
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}
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/* Clear compare event, if any */
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NRF_GRTC->EVENTS_COMPARE[GRTC_CC_IDX_RADIO] = 0U;
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NRF_GRTC->EVENTS_COMPARE[HAL_CNTR_GRTC_CC_IDX_RADIO] = 0U;
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/* Set compare register values */
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NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCL = ticks_start;
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NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCH = h & GRTC_CC_CCH_CCH_Msk;
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NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCL = ticks_start;
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NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCH = cntr_h & GRTC_CC_CCH_CCH_Msk;
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/* Enable compare */
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NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCEN = 1U;
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NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCEN = 1U;
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#else /* !CONFIG_BT_CTLR_NRF_GRTC */
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nrf_rtc_cc_set(NRF_RTC, 2, ticks_start);
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nrf_timer_cc_set(EVENT_TIMER, 0, remainder_us);
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#if defined(CONFIG_BT_CTLR_NRF_GRTC)
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uint32_t l, h, ho, stale;
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uint32_t cntr_l, cntr_h, cntr_h_overflow, stale;
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/* Disable capture/compare */
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NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCEN = 0U;
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/* Publish GRTC compare */
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NRF_GRTC->PUBLISH_COMPARE[GRTC_CC_IDX_RADIO] =
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((HAL_EVENT_TIMER_START_PPI <<
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GRTC_PUBLISH_COMPARE_CHIDX_Pos) &
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GRTC_PUBLISH_COMPARE_CHIDX_Msk) |
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((GRTC_PUBLISH_COMPARE_EN_Enabled <<
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GRTC_PUBLISH_COMPARE_EN_Pos) &
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GRTC_PUBLISH_COMPARE_EN_Msk);
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/* Enable same DPPI in Global domain */
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NRF_DPPIC20->CHENSET = BIT(HAL_EVENT_TIMER_START_PPI);
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/* Setup PPIB send subscribe */
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NRF_PPIB21->SUBSCRIBE_SEND[HAL_EVENT_TIMER_START_PPI] =
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BIT(HAL_EVENT_TIMER_START_PPI) | PPIB_SUBSCRIBE_SEND_EN_Msk;
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/* Setup PPIB receive publish */
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NRF_PPIB11->PUBLISH_RECEIVE[HAL_EVENT_TIMER_START_PPI] =
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BIT(HAL_EVENT_TIMER_START_PPI) | PPIB_PUBLISH_RECEIVE_EN_Msk;
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NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCEN = 0U;
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/* NOTE: We are going to use TASKS_CAPTURE to read current
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* SYSCOUNTER H and L, so that COMPARE registers can be set
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@ -1561,43 +1521,43 @@ uint32_t radio_tmr_start_tick(uint8_t trx, uint32_t ticks_start)
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/* Read current syscounter value */
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do {
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h = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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l = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERL;
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ho = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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} while ((h & GRTC_SYSCOUNTER_SYSCOUNTERH_BUSY_Msk) ||
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(ho & GRTC_SYSCOUNTER_SYSCOUNTERH_OVERFLOW_Msk));
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cntr_h = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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cntr_l = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERL;
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cntr_h_overflow = NRF_GRTC->SYSCOUNTER[1].SYSCOUNTERH;
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} while ((cntr_h & GRTC_SYSCOUNTER_SYSCOUNTERH_BUSY_Msk) ||
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(cntr_h_overflow & GRTC_SYSCOUNTER_SYSCOUNTERH_OVERFLOW_Msk));
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/* Set a stale value in capture value */
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stale = l - 1U;
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NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCL = stale;
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stale = cntr_l - 1U;
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NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCL = stale;
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/* Trigger a capture */
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NRF_GRTC->TASKS_CAPTURE[GRTC_CC_IDX_RADIO] = 1U;
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NRF_GRTC->TASKS_CAPTURE[HAL_CNTR_GRTC_CC_IDX_RADIO] = 1U;
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/* Wait to get a new L value */
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do {
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l = NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCL;
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} while (l == stale);
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cntr_l = NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCL;
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} while (cntr_l == stale);
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/* Read H value */
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h = NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCH;
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cntr_h = NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCH;
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/* NOTE: HERE, we have h and l in sync. */
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/* NOTE: HERE, we have cntr_h and cntr_l in sync. */
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/* Handle rollover between current and expected value */
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if (ticks_start < l) {
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h++;
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if (ticks_start < cntr_l) {
|
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cntr_h++;
|
||||
}
|
||||
|
||||
/* Clear compare event, if any */
|
||||
NRF_GRTC->EVENTS_COMPARE[GRTC_CC_IDX_RADIO] = 0U;
|
||||
NRF_GRTC->EVENTS_COMPARE[HAL_CNTR_GRTC_CC_IDX_RADIO] = 0U;
|
||||
|
||||
/* Set compare register values */
|
||||
NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCL = ticks_start;
|
||||
NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCH = h & GRTC_CC_CCH_CCH_Msk;
|
||||
NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCL = ticks_start;
|
||||
NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCH = cntr_h & GRTC_CC_CCH_CCH_Msk;
|
||||
|
||||
/* Enable compare */
|
||||
NRF_GRTC->CC[GRTC_CC_IDX_RADIO].CCEN = 1U;
|
||||
NRF_GRTC->CC[HAL_CNTR_GRTC_CC_IDX_RADIO].CCEN = 1U;
|
||||
|
||||
#else /* !CONFIG_BT_CTLR_NRF_GRTC */
|
||||
nrf_rtc_cc_set(NRF_RTC, 2, ticks_start);
|
||||
|
|
|
@ -101,6 +101,26 @@ static inline void hal_radio_end_time_capture_ppi_config(void)
|
|||
static inline void hal_event_timer_start_ppi_config(void)
|
||||
{
|
||||
#if defined(CONFIG_BT_CTLR_NRF_GRTC)
|
||||
/* Publish GRTC compare */
|
||||
NRF_GRTC->PUBLISH_COMPARE[HAL_CNTR_GRTC_CC_IDX_RADIO] =
|
||||
((HAL_EVENT_TIMER_START_PPI <<
|
||||
GRTC_PUBLISH_COMPARE_CHIDX_Pos) &
|
||||
GRTC_PUBLISH_COMPARE_CHIDX_Msk) |
|
||||
((GRTC_PUBLISH_COMPARE_EN_Enabled <<
|
||||
GRTC_PUBLISH_COMPARE_EN_Pos) &
|
||||
GRTC_PUBLISH_COMPARE_EN_Msk);
|
||||
|
||||
/* Enable same DPPI in Global domain */
|
||||
NRF_DPPIC20->CHENSET = BIT(HAL_EVENT_TIMER_START_PPI);
|
||||
|
||||
/* Setup PPIB send subscribe */
|
||||
NRF_PPIB21->SUBSCRIBE_SEND[HAL_EVENT_TIMER_START_PPI] =
|
||||
BIT(HAL_EVENT_TIMER_START_PPI) | PPIB_SUBSCRIBE_SEND_EN_Msk;
|
||||
|
||||
/* Setup PPIB receive publish */
|
||||
NRF_PPIB11->PUBLISH_RECEIVE[HAL_EVENT_TIMER_START_PPI] =
|
||||
BIT(HAL_EVENT_TIMER_START_PPI) | PPIB_PUBLISH_RECEIVE_EN_Msk;
|
||||
|
||||
#else /* !CONFIG_BT_CTLR_NRF_GRTC */
|
||||
nrf_rtc_publish_set(NRF_RTC, NRF_RTC_EVENT_COMPARE_2, HAL_EVENT_TIMER_START_PPI);
|
||||
#endif /* !CONFIG_BT_CTLR_NRF_GRTC */
|
||||
|
|
|
@ -195,7 +195,7 @@ void hal_ticker_instance0_sched(uint8_t caller_id, uint8_t callee_id, uint8_t ch
|
|||
void hal_ticker_instance0_trigger_set(uint32_t value)
|
||||
{
|
||||
#if defined(CONFIG_BT_CTLR_NRF_GRTC)
|
||||
cntr_cmp_set(10U, value);
|
||||
cntr_cmp_set(HAL_CNTR_GRTC_CC_IDX_TICKER, value);
|
||||
#else /* !CONFIG_BT_CTLR_NRF_GRTC */
|
||||
cntr_cmp_set(0U, value);
|
||||
#endif /* !CONFIG_BT_CTLR_NRF_GRTC */
|
||||
|
|
|
@ -18,6 +18,7 @@
|
|||
|
||||
#include "hal/swi.h"
|
||||
#include "hal/ccm.h"
|
||||
#include "hal/cntr.h"
|
||||
#include "hal/radio.h"
|
||||
#include "hal/ticker.h"
|
||||
|
||||
|
@ -119,8 +120,8 @@ static void rtc0_nrf5_isr(const void *arg)
|
|||
|
||||
/* On compare0 run ticker worker instance0 */
|
||||
#if defined(CONFIG_BT_CTLR_NRF_GRTC)
|
||||
if (NRF_GRTC->EVENTS_COMPARE[10]) {
|
||||
nrf_grtc_event_clear(NRF_GRTC, NRF_GRTC_EVENT_COMPARE_10);
|
||||
if (NRF_GRTC->EVENTS_COMPARE[HAL_CNTR_GRTC_CC_IDX_TICKER]) {
|
||||
NRF_GRTC->EVENTS_COMPARE[HAL_CNTR_GRTC_CC_IDX_TICKER] = 0U;
|
||||
#else /* !CONFIG_BT_CTLR_NRF_GRTC */
|
||||
if (NRF_RTC->EVENTS_COMPARE[0]) {
|
||||
nrf_rtc_event_clear(NRF_RTC, NRF_RTC_EVENT_COMPARE_0);
|
||||
|
|
|
@ -0,0 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2024 Nordic Semiconductor ASA
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
|
@ -0,0 +1,7 @@
|
|||
/*
|
||||
* Copyright (c) 2024 Nordic Semiconductor ASA
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "hal/RV32M1/cntr.h"
|
Loading…
Add table
Add a link
Reference in a new issue