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dts_fixups: Update labels generated from DTS with DT_ prefix

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All labels containing "_<8-hex-digits>_" or "16550_<3or6-hex-digits>_"
in their names, assumed to be generated by the extracting script,
are updated with the DT_ prefix, to reflect the recent changes made
to the script.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek 2018-11-13 12:24:15 +01:00 • committed by Kumar Gala
commit f39ba7230d
71 changed files with 3286 additions and 3286 deletions
Download patch file Download diff file Expand all files Collapse all files

12
boards/arc/arduino_101_sss/dts_fixup.h
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@ -4,10 +4,10 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#define CONFIG_BMI160_SLAVE SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_BASE_ADDRESS #define CONFIG_BMI160_SLAVE DT_SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_BASE_ADDRESS
#define CONFIG_BMI160_SPI_PORT_NAME SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_BUS_NAME #define CONFIG_BMI160_SPI_PORT_NAME DT_SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_BUS_NAME
#define CONFIG_BMI160_GPIO_DEV_NAME SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_INT_GPIOS_CONTROLLER #define CONFIG_BMI160_GPIO_DEV_NAME DT_SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_INT_GPIOS_CONTROLLER
#define CONFIG_BMI160_GPIO_PIN_NUM SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_INT_GPIOS_PIN #define CONFIG_BMI160_GPIO_PIN_NUM DT_SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_INT_GPIOS_PIN
#define CONFIG_BMI160_NAME SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_LABEL #define CONFIG_BMI160_NAME DT_SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_LABEL
#define CONFIG_BMI160_SPI_BUS_FREQ SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_SPI_MAX_FREQUENCY #define CONFIG_BMI160_SPI_BUS_FREQ DT_SNPS_DESIGNWARE_SPI_80010100_BOSCH_BMI160_1_SPI_MAX_FREQUENCY

34
boards/arm/96b_argonkey/dts_fixup.h
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@ -9,24 +9,24 @@
* generated data matches the driver definitions. * generated data matches the driver definitions.
*/ */
#define CONFIG_HTS221_NAME ST_STM32_I2C_V1_40005800_ST_HTS221_5F_LABEL #define CONFIG_HTS221_NAME DT_ST_STM32_I2C_V1_40005800_ST_HTS221_5F_LABEL
#define CONFIG_HTS221_I2C_MASTER_DEV_NAME ST_STM32_I2C_V1_40005800_ST_HTS221_5F_BUS_NAME #define CONFIG_HTS221_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V1_40005800_ST_HTS221_5F_BUS_NAME
#define CONFIG_LPS22HB_DEV_NAME ST_STM32_I2C_V1_40005800_ST_LPS22HB_PRESS_5D_LABEL #define CONFIG_LPS22HB_DEV_NAME DT_ST_STM32_I2C_V1_40005800_ST_LPS22HB_PRESS_5D_LABEL
#define CONFIG_LPS22HB_I2C_ADDR ST_STM32_I2C_V1_40005800_ST_LPS22HB_PRESS_5D_BASE_ADDRESS #define CONFIG_LPS22HB_I2C_ADDR DT_ST_STM32_I2C_V1_40005800_ST_LPS22HB_PRESS_5D_BASE_ADDRESS
#define CONFIG_LPS22HB_I2C_MASTER_DEV_NAME ST_STM32_I2C_V1_40005800_ST_LPS22HB_PRESS_5D_BUS_NAME #define CONFIG_LPS22HB_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V1_40005800_ST_LPS22HB_PRESS_5D_BUS_NAME
#define CONFIG_VL53L0X_NAME ST_STM32_I2C_V1_40005800_ST_VL53L0X_29_LABEL #define CONFIG_VL53L0X_NAME DT_ST_STM32_I2C_V1_40005800_ST_VL53L0X_29_LABEL
#define CONFIG_VL53L0X_I2C_ADDR ST_STM32_I2C_V1_40005800_ST_VL53L0X_29_BASE_ADDRESS #define CONFIG_VL53L0X_I2C_ADDR DT_ST_STM32_I2C_V1_40005800_ST_VL53L0X_29_BASE_ADDRESS
#define CONFIG_VL53L0X_I2C_MASTER_DEV_NAME ST_STM32_I2C_V1_40005800_ST_VL53L0X_29_BUS_NAME #define CONFIG_VL53L0X_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V1_40005800_ST_VL53L0X_29_BUS_NAME
#define CONFIG_LSM6DSL_DEV_NAME ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_LABEL #define CONFIG_LSM6DSL_DEV_NAME DT_ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_LABEL
#define CONFIG_LSM6DSL_SPI_SELECT_SLAVE ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_BASE_ADDRESS #define CONFIG_LSM6DSL_SPI_SELECT_SLAVE DT_ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_BASE_ADDRESS
#define CONFIG_LSM6DSL_SPI_MASTER_DEV_NAME ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_BUS_NAME #define CONFIG_LSM6DSL_SPI_MASTER_DEV_NAME DT_ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_BUS_NAME
#define CONFIG_LSM6DSL_SPI_BUS_FREQ ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_SPI_MAX_FREQUENCY #define CONFIG_LSM6DSL_SPI_BUS_FREQ DT_ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_SPI_MAX_FREQUENCY
#define CONFIG_LSM6DSL_GPIO_DEV_NAME ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_IRQ_GPIOS_CONTROLLER #define CONFIG_LSM6DSL_GPIO_DEV_NAME DT_ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_IRQ_GPIOS_CONTROLLER
#define CONFIG_LSM6DSL_GPIO_PIN_NUM ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_IRQ_GPIOS_PIN #define CONFIG_LSM6DSL_GPIO_PIN_NUM DT_ST_STM32_SPI_40003800_ST_LSM6DSL_SPI_1_IRQ_GPIOS_PIN
#define CONFIG_LP3943_DEV_NAME ST_STM32_I2C_V1_40005C00_TI_LP3943_60_LABEL #define CONFIG_LP3943_DEV_NAME DT_ST_STM32_I2C_V1_40005C00_TI_LP3943_60_LABEL
#define CONFIG_LP3943_I2C_ADDRESS ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BASE_ADDRESS #define CONFIG_LP3943_I2C_ADDRESS DT_ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BASE_ADDRESS
#define CONFIG_LP3943_I2C_MASTER_DEV_NAME ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BUS_NAME #define CONFIG_LP3943_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BUS_NAME

4
boards/arm/96b_carbon/dts_fixup.h
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@ -8,5 +8,5 @@
#define CONFIG_BT_SPI_IRQ_PIN BT_IRQ_GPIOS_PIN #define CONFIG_BT_SPI_IRQ_PIN BT_IRQ_GPIOS_PIN
#define CONFIG_BT_SPI_RESET_DEV_NAME BT_RESET_GPIOS_CONTROLLER #define CONFIG_BT_SPI_RESET_DEV_NAME BT_RESET_GPIOS_CONTROLLER
#define CONFIG_BT_SPI_RESET_PIN BT_RESET_GPIOS_PIN #define CONFIG_BT_SPI_RESET_PIN BT_RESET_GPIOS_PIN
#define CONFIG_BT_SPI_DEV_NAME ST_STM32_SPI_40013000_ZEPHYR_BT_HCI_SPI_0_BUS_NAME #define CONFIG_BT_SPI_DEV_NAME DT_ST_STM32_SPI_40013000_ZEPHYR_BT_HCI_SPI_0_BUS_NAME
#define CONFIG_BT_SPI_MAX_CLK_FREQ ST_STM32_SPI_40013000_ZEPHYR_BT_HCI_SPI_0_SPI_MAX_FREQUENCY #define CONFIG_BT_SPI_MAX_CLK_FREQ DT_ST_STM32_SPI_40013000_ZEPHYR_BT_HCI_SPI_0_SPI_MAX_FREQUENCY

6
boards/arm/96b_neonkey/dts_fixup.h
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@ -4,6 +4,6 @@
* generated data matches the driver definitions. * generated data matches the driver definitions.
*/ */
#define CONFIG_LP3943_DEV_NAME ST_STM32_I2C_V1_40005C00_TI_LP3943_60_LABEL #define CONFIG_LP3943_DEV_NAME DT_ST_STM32_I2C_V1_40005C00_TI_LP3943_60_LABEL
#define CONFIG_LP3943_I2C_ADDRESS ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BASE_ADDRESS #define CONFIG_LP3943_I2C_ADDRESS DT_ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BASE_ADDRESS
#define CONFIG_LP3943_I2C_MASTER_DEV_NAME ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BUS_NAME #define CONFIG_LP3943_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V1_40005C00_TI_LP3943_60_BUS_NAME

10
boards/arm/bbc_microbit/dts_fixup.h
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@ -4,8 +4,8 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#define CONFIG_FXOS8700_NAME NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_LABEL #define CONFIG_FXOS8700_NAME DT_NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_LABEL
#define CONFIG_FXOS8700_I2C_NAME NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_BUS_NAME #define CONFIG_FXOS8700_I2C_NAME DT_NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_BUS_NAME
#define CONFIG_FXOS8700_I2C_ADDRESS NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_BASE_ADDRESS #define CONFIG_FXOS8700_I2C_ADDRESS DT_NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_BASE_ADDRESS
#define CONFIG_FXOS8700_GPIO_NAME NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_INT2_GPIOS_CONTROLLER #define CONFIG_FXOS8700_GPIO_NAME DT_NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_INT2_GPIOS_CONTROLLER
#define CONFIG_FXOS8700_GPIO_PIN NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_INT2_GPIOS_PIN #define CONFIG_FXOS8700_GPIO_PIN DT_NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_INT2_GPIOS_PIN

40
boards/arm/disco_l475_iot1/dts_fixup.h
View file

@ -4,34 +4,34 @@
* generated data matches the driver definitions. * generated data matches the driver definitions.
*/ */
#define CONFIG_HTS221_NAME ST_STM32_I2C_V2_40005800_ST_HTS221_5F_LABEL #define CONFIG_HTS221_NAME DT_ST_STM32_I2C_V2_40005800_ST_HTS221_5F_LABEL
#define CONFIG_HTS221_I2C_MASTER_DEV_NAME ST_STM32_I2C_V2_40005800_ST_HTS221_5F_BUS_NAME #define CONFIG_HTS221_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V2_40005800_ST_HTS221_5F_BUS_NAME
#define CONFIG_LIS3MDL_NAME ST_STM32_I2C_V2_40005800_ST_LIS3MDL_MAGN_1E_LABEL #define CONFIG_LIS3MDL_NAME DT_ST_STM32_I2C_V2_40005800_ST_LIS3MDL_MAGN_1E_LABEL
#define CONFIG_LIS3MDL_I2C_ADDR ST_STM32_I2C_V2_40005800_ST_LIS3MDL_MAGN_1E_BASE_ADDRESS #define CONFIG_LIS3MDL_I2C_ADDR DT_ST_STM32_I2C_V2_40005800_ST_LIS3MDL_MAGN_1E_BASE_ADDRESS
#define CONFIG_LIS3MDL_I2C_MASTER_DEV_NAME ST_STM32_I2C_V2_40005800_ST_LIS3MDL_MAGN_1E_BUS_NAME #define CONFIG_LIS3MDL_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V2_40005800_ST_LIS3MDL_MAGN_1E_BUS_NAME
#define CONFIG_LSM6DSL_DEV_NAME ST_STM32_I2C_V2_40005800_ST_LSM6DSL_6A_LABEL #define CONFIG_LSM6DSL_DEV_NAME DT_ST_STM32_I2C_V2_40005800_ST_LSM6DSL_6A_LABEL
#define CONFIG_LSM6DSL_I2C_ADDR ST_STM32_I2C_V2_40005800_ST_LSM6DSL_6A_BASE_ADDRESS #define CONFIG_LSM6DSL_I2C_ADDR DT_ST_STM32_I2C_V2_40005800_ST_LSM6DSL_6A_BASE_ADDRESS
#define CONFIG_LSM6DSL_I2C_MASTER_DEV_NAME ST_STM32_I2C_V2_40005800_ST_LSM6DSL_6A_BUS_NAME #define CONFIG_LSM6DSL_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V2_40005800_ST_LSM6DSL_6A_BUS_NAME
#define CONFIG_LPS22HB_DEV_NAME ST_STM32_I2C_V2_40005800_ST_LPS22HB_PRESS_5D_LABEL #define CONFIG_LPS22HB_DEV_NAME DT_ST_STM32_I2C_V2_40005800_ST_LPS22HB_PRESS_5D_LABEL
#define CONFIG_LPS22HB_I2C_ADDR ST_STM32_I2C_V2_40005800_ST_LPS22HB_PRESS_5D_BASE_ADDRESS #define CONFIG_LPS22HB_I2C_ADDR DT_ST_STM32_I2C_V2_40005800_ST_LPS22HB_PRESS_5D_BASE_ADDRESS
#define CONFIG_LPS22HB_I2C_MASTER_DEV_NAME ST_STM32_I2C_V2_40005800_ST_LPS22HB_PRESS_5D_BUS_NAME #define CONFIG_LPS22HB_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V2_40005800_ST_LPS22HB_PRESS_5D_BUS_NAME
#define CONFIG_BT_SPI_DEV_NAME ST_STM32_SPI_FIFO_40003C00_ST_SPBTLE_RF_0_BUS_NAME #define CONFIG_BT_SPI_DEV_NAME DT_ST_STM32_SPI_FIFO_40003C00_ST_SPBTLE_RF_0_BUS_NAME
#define CONFIG_BT_SPI_MAX_CLK_FREQ ST_STM32_SPI_FIFO_40003C00_ST_SPBTLE_RF_0_SPI_MAX_FREQUENCY #define CONFIG_BT_SPI_MAX_CLK_FREQ DT_ST_STM32_SPI_FIFO_40003C00_ST_SPBTLE_RF_0_SPI_MAX_FREQUENCY
#define CONFIG_VL53L0X_NAME ST_STM32_I2C_V2_40005800_ST_VL53L0X_29_LABEL #define CONFIG_VL53L0X_NAME DT_ST_STM32_I2C_V2_40005800_ST_VL53L0X_29_LABEL
#define CONFIG_VL53L0X_I2C_ADDR ST_STM32_I2C_V2_40005800_ST_VL53L0X_29_BASE_ADDRESS #define CONFIG_VL53L0X_I2C_ADDR DT_ST_STM32_I2C_V2_40005800_ST_VL53L0X_29_BASE_ADDRESS
#define CONFIG_VL53L0X_I2C_MASTER_DEV_NAME ST_STM32_I2C_V2_40005800_ST_VL53L0X_29_BUS_NAME #define CONFIG_VL53L0X_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V2_40005800_ST_VL53L0X_29_BUS_NAME
#define CONFIG_BT_SPI_IRQ_DEV_NAME BT_IRQ_GPIOS_CONTROLLER #define CONFIG_BT_SPI_IRQ_DEV_NAME BT_IRQ_GPIOS_CONTROLLER
#define CONFIG_BT_SPI_IRQ_PIN BT_IRQ_GPIOS_PIN #define CONFIG_BT_SPI_IRQ_PIN BT_IRQ_GPIOS_PIN
#define CONFIG_BT_SPI_CHIP_SELECT_DEV_NAME ST_STM32_SPI_FIFO_40003C00_CS_GPIOS_CONTROLLER_0 #define CONFIG_BT_SPI_CHIP_SELECT_DEV_NAME DT_ST_STM32_SPI_FIFO_40003C00_CS_GPIOS_CONTROLLER_0
#define CONFIG_BT_SPI_CHIP_SELECT_PIN ST_STM32_SPI_FIFO_40003C00_CS_GPIOS_PIN_0 #define CONFIG_BT_SPI_CHIP_SELECT_PIN DT_ST_STM32_SPI_FIFO_40003C00_CS_GPIOS_PIN_0
#define CONFIG_BT_SPI_RESET_DEV_NAME BT_RESET_GPIOS_CONTROLLER #define CONFIG_BT_SPI_RESET_DEV_NAME BT_RESET_GPIOS_CONTROLLER
#define CONFIG_BT_SPI_RESET_PIN BT_RESET_GPIOS_PIN #define CONFIG_BT_SPI_RESET_PIN BT_RESET_GPIOS_PIN
#define ESWIFI0_CS_GPIOS_CONTROLLER ST_STM32_SPI_FIFO_40003C00_CS_GPIOS_CONTROLLER_1 #define ESWIFI0_CS_GPIOS_CONTROLLER DT_ST_STM32_SPI_FIFO_40003C00_CS_GPIOS_CONTROLLER_1
#define ESWIFI0_CS_GPIOS_PIN ST_STM32_SPI_FIFO_40003C00_CS_GPIOS_PIN_1 #define ESWIFI0_CS_GPIOS_PIN DT_ST_STM32_SPI_FIFO_40003C00_CS_GPIOS_PIN_1

28
boards/arm/frdm_k64f/dts_fixup.h
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@ -1,15 +1,15 @@
#define CONFIG_FXOS8700_NAME NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_LABEL #define CONFIG_FXOS8700_NAME DT_NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_LABEL
#define CONFIG_FXOS8700_I2C_NAME NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_BUS_NAME #define CONFIG_FXOS8700_I2C_NAME DT_NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_BUS_NAME
#define CONFIG_FXOS8700_I2C_ADDRESS NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_BASE_ADDRESS #define CONFIG_FXOS8700_I2C_ADDRESS DT_NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_BASE_ADDRESS
#define CONFIG_FXOS8700_GPIO_NAME NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_CONTROLLER #define CONFIG_FXOS8700_GPIO_NAME DT_NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_CONTROLLER
#define CONFIG_FXOS8700_GPIO_PIN NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_PIN #define CONFIG_FXOS8700_GPIO_PIN DT_NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_PIN
#define CONFIG_IEEE802154_MCR20A_SPI_DRV_NAME NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_BUS_NAME #define CONFIG_IEEE802154_MCR20A_SPI_DRV_NAME DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_BUS_NAME
#define CONFIG_IEEE802154_MCR20A_SPI_SLAVE NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_BASE_ADDRESS #define CONFIG_IEEE802154_MCR20A_SPI_SLAVE DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_BASE_ADDRESS
#define CONFIG_IEEE802154_MCR20A_SPI_FREQ NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_SPI_MAX_FREQUENCY #define CONFIG_IEEE802154_MCR20A_SPI_FREQ DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_SPI_MAX_FREQUENCY
#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME NXP_KINETIS_DSPI_4002C000_CS_GPIOS_CONTROLLER #define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME DT_NXP_KINETIS_DSPI_4002C000_CS_GPIOS_CONTROLLER
#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_PIN NXP_KINETIS_DSPI_4002C000_CS_GPIOS_PIN #define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_PIN DT_NXP_KINETIS_DSPI_4002C000_CS_GPIOS_PIN
#define CONFIG_MCR20A_GPIO_IRQ_B_NAME NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_IRQB_GPIOS_CONTROLLER #define CONFIG_MCR20A_GPIO_IRQ_B_NAME DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_IRQB_GPIOS_CONTROLLER
#define CONFIG_MCR20A_GPIO_IRQ_B_PIN NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_IRQB_GPIOS_PIN #define CONFIG_MCR20A_GPIO_IRQ_B_PIN DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_IRQB_GPIOS_PIN
#define CONFIG_MCR20A_GPIO_RESET_NAME NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_RESET_GPIOS_CONTROLLER #define CONFIG_MCR20A_GPIO_RESET_NAME DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_RESET_GPIOS_CONTROLLER
#define CONFIG_MCR20A_GPIO_RESET_PIN NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_RESET_GPIOS_PIN #define CONFIG_MCR20A_GPIO_RESET_PIN DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_RESET_GPIOS_PIN

10
boards/arm/frdm_kl25z/dts_fixup.h
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@ -4,8 +4,8 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#define CONFIG_FXOS8700_NAME NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_LABEL #define CONFIG_FXOS8700_NAME DT_NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_LABEL
#define CONFIG_FXOS8700_I2C_NAME NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_BUS_NAME #define CONFIG_FXOS8700_I2C_NAME DT_NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_BUS_NAME
#define CONFIG_FXOS8700_I2C_ADDRESS NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_BASE_ADDRESS #define CONFIG_FXOS8700_I2C_ADDRESS DT_NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_BASE_ADDRESS
#define CONFIG_FXOS8700_GPIO_NAME NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_CONTROLLER #define CONFIG_FXOS8700_GPIO_NAME DT_NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_CONTROLLER
#define CONFIG_FXOS8700_GPIO_PIN NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_PIN #define CONFIG_FXOS8700_GPIO_PIN DT_NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_PIN

10
boards/arm/frdm_kw41z/dts_fixup.h
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@ -1,5 +1,5 @@
#define CONFIG_FXOS8700_NAME NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1F_LABEL #define CONFIG_FXOS8700_NAME DT_NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1F_LABEL
#define CONFIG_FXOS8700_I2C_NAME NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1F_BUS_NAME #define CONFIG_FXOS8700_I2C_NAME DT_NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1F_BUS_NAME
#define CONFIG_FXOS8700_I2C_ADDRESS NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1F_BASE_ADDRESS #define CONFIG_FXOS8700_I2C_ADDRESS DT_NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1F_BASE_ADDRESS
#define CONFIG_FXOS8700_GPIO_NAME NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1F_INT1_GPIOS_CONTROLLER #define CONFIG_FXOS8700_GPIO_NAME DT_NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1F_INT1_GPIOS_CONTROLLER
#define CONFIG_FXOS8700_GPIO_PIN NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1F_INT1_GPIOS_PIN #define CONFIG_FXOS8700_GPIO_PIN DT_NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1F_INT1_GPIOS_PIN

26
boards/arm/hexiwear_k64/dts_fixup.h
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@ -1,15 +1,15 @@
#define CONFIG_FXOS8700_NAME NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1E_LABEL #define CONFIG_FXOS8700_NAME DT_NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1E_LABEL
#define CONFIG_FXOS8700_I2C_NAME NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1E_BUS_NAME #define CONFIG_FXOS8700_I2C_NAME DT_NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1E_BUS_NAME
#define CONFIG_FXOS8700_I2C_ADDRESS NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1E_BASE_ADDRESS #define CONFIG_FXOS8700_I2C_ADDRESS DT_NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1E_BASE_ADDRESS
#define CONFIG_FXOS8700_GPIO_NAME NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1E_INT2_GPIOS_CONTROLLER #define CONFIG_FXOS8700_GPIO_NAME DT_NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1E_INT2_GPIOS_CONTROLLER
#define CONFIG_FXOS8700_GPIO_PIN NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1E_INT2_GPIOS_PIN #define CONFIG_FXOS8700_GPIO_PIN DT_NXP_KINETIS_I2C_40067000_NXP_FXOS8700_1E_INT2_GPIOS_PIN
#define CONFIG_FXAS21002_NAME NXP_KINETIS_I2C_40067000_NXP_FXAS21002_20_LABEL #define CONFIG_FXAS21002_NAME DT_NXP_KINETIS_I2C_40067000_NXP_FXAS21002_20_LABEL
#define CONFIG_FXAS21002_I2C_NAME NXP_KINETIS_I2C_40067000_NXP_FXAS21002_20_BUS_NAME #define CONFIG_FXAS21002_I2C_NAME DT_NXP_KINETIS_I2C_40067000_NXP_FXAS21002_20_BUS_NAME
#define CONFIG_FXAS21002_I2C_ADDRESS NXP_KINETIS_I2C_40067000_NXP_FXAS21002_20_BASE_ADDRESS #define CONFIG_FXAS21002_I2C_ADDRESS DT_NXP_KINETIS_I2C_40067000_NXP_FXAS21002_20_BASE_ADDRESS
#define CONFIG_FXAS21002_GPIO_NAME NXP_KINETIS_I2C_40067000_NXP_FXAS21002_20_INT2_GPIOS_CONTROLLER #define CONFIG_FXAS21002_GPIO_NAME DT_NXP_KINETIS_I2C_40067000_NXP_FXAS21002_20_INT2_GPIOS_CONTROLLER
#define CONFIG_FXAS21002_GPIO_PIN NXP_KINETIS_I2C_40067000_NXP_FXAS21002_20_INT2_GPIOS_PIN #define CONFIG_FXAS21002_GPIO_PIN DT_NXP_KINETIS_I2C_40067000_NXP_FXAS21002_20_INT2_GPIOS_PIN
#define CONFIG_MAX30101_NAME NXP_KINETIS_I2C_40066000_MAX_MAX30101_57_LABEL #define CONFIG_MAX30101_NAME DT_NXP_KINETIS_I2C_40066000_MAX_MAX30101_57_LABEL
#define CONFIG_MAX30101_I2C_NAME NXP_KINETIS_I2C_40066000_MAX_MAX30101_57_BUS_NAME #define CONFIG_MAX30101_I2C_NAME DT_NXP_KINETIS_I2C_40066000_MAX_MAX30101_57_BUS_NAME
#define CONFIG_MAX30101_I2C_ADDRESS NXP_KINETIS_I2C_40066000_MAX_MAX30101_57_BASE_ADDRESS #define CONFIG_MAX30101_I2C_ADDRESS DT_NXP_KINETIS_I2C_40066000_MAX_MAX30101_57_BASE_ADDRESS

108
boards/arm/mps2_an385/dts_fixup.h
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@ -1,81 +1,81 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
/* CMSDK APB Timers */ /* CMSDK APB Timers */
#define CMSDK_APB_TIMER0 ARM_CMSDK_TIMER_40000000_BASE_ADDRESS #define CMSDK_APB_TIMER0 DT_ARM_CMSDK_TIMER_40000000_BASE_ADDRESS
#define CMSDK_APB_TIMER_0_IRQ ARM_CMSDK_TIMER_40000000_IRQ_0 #define CMSDK_APB_TIMER_0_IRQ DT_ARM_CMSDK_TIMER_40000000_IRQ_0
#define CMSDK_APB_TIMER1 ARM_CMSDK_TIMER_40001000_BASE_ADDRESS #define CMSDK_APB_TIMER1 DT_ARM_CMSDK_TIMER_40001000_BASE_ADDRESS
#define CMSDK_APB_TIMER_1_IRQ IRQ_TIMER1 ARM_CMSDK_TIMER_40001000_IRQ_0 #define CMSDK_APB_TIMER_1_IRQ IRQ_TIMER1 DT_ARM_CMSDK_TIMER_40001000_IRQ_0
/* CMSDK APB Dual Timer */ /* CMSDK APB Dual Timer */
#define CMSDK_APB_DTIMER ARM_CMSDK_DTIMER_40002000_BASE_ADDRESS #define CMSDK_APB_DTIMER DT_ARM_CMSDK_DTIMER_40002000_BASE_ADDRESS
#define CMSDK_APB_DUALTIMER_IRQ ARM_CMSDK_DTIMER_40002000_IRQ_0 #define CMSDK_APB_DUALTIMER_IRQ DT_ARM_CMSDK_DTIMER_40002000_IRQ_0
/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */ /* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */
#define CMSDK_APB_UART0 ARM_CMSDK_UART_40004000_BASE_ADDRESS #define CMSDK_APB_UART0 DT_ARM_CMSDK_UART_40004000_BASE_ADDRESS
#define CMSDK_APB_UART_0_IRQ_TX ARM_CMSDK_UART_40004000_IRQ_0 #define CMSDK_APB_UART_0_IRQ_TX DT_ARM_CMSDK_UART_40004000_IRQ_0
#define CMSDK_APB_UART_0_IRQ_RX ARM_CMSDK_UART_40004000_IRQ_1 #define CMSDK_APB_UART_0_IRQ_RX DT_ARM_CMSDK_UART_40004000_IRQ_1
#define CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI ARM_CMSDK_UART_40004000_IRQ_0_PRIORITY #define CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI DT_ARM_CMSDK_UART_40004000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT0_BAUD_RATE ARM_CMSDK_UART_40004000_CURRENT_SPEED #define CONFIG_UART_CMSDK_APB_PORT0_BAUD_RATE DT_ARM_CMSDK_UART_40004000_CURRENT_SPEED
#define CONFIG_UART_CMSDK_APB_PORT0_NAME ARM_CMSDK_UART_40004000_LABEL #define CONFIG_UART_CMSDK_APB_PORT0_NAME DT_ARM_CMSDK_UART_40004000_LABEL
#define CMSDK_APB_UART1 ARM_CMSDK_UART_40005000_BASE_ADDRESS #define CMSDK_APB_UART1 DT_ARM_CMSDK_UART_40005000_BASE_ADDRESS
#define CMSDK_APB_UART_1_IRQ_TX ARM_CMSDK_UART_40005000_IRQ_0 #define CMSDK_APB_UART_1_IRQ_TX DT_ARM_CMSDK_UART_40005000_IRQ_0
#define CMSDK_APB_UART_1_IRQ_RX ARM_CMSDK_UART_40005000_IRQ_1 #define CMSDK_APB_UART_1_IRQ_RX DT_ARM_CMSDK_UART_40005000_IRQ_1
#define CONFIG_UART_CMSDK_APB_PORT1_IRQ_PRI ARM_CMSDK_UART_40005000_IRQ_0_PRIORITY #define CONFIG_UART_CMSDK_APB_PORT1_IRQ_PRI DT_ARM_CMSDK_UART_40005000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT1_BAUD_RATE ARM_CMSDK_UART_40005000_CURRENT_SPEED #define CONFIG_UART_CMSDK_APB_PORT1_BAUD_RATE DT_ARM_CMSDK_UART_40005000_CURRENT_SPEED
#define CONFIG_UART_CMSDK_APB_PORT1_NAME ARM_CMSDK_UART_40005000_LABEL #define CONFIG_UART_CMSDK_APB_PORT1_NAME DT_ARM_CMSDK_UART_40005000_LABEL
#define CMSDK_APB_UART2 ARM_CMSDK_UART_40006000_BASE_ADDRESS #define CMSDK_APB_UART2 DT_ARM_CMSDK_UART_40006000_BASE_ADDRESS
#define CMSDK_APB_UART_2_IRQ_TX ARM_CMSDK_UART_40006000_IRQ_0 #define CMSDK_APB_UART_2_IRQ_TX DT_ARM_CMSDK_UART_40006000_IRQ_0
#define CMSDK_APB_UART_2_IRQ_RX ARM_CMSDK_UART_40006000_IRQ_1 #define CMSDK_APB_UART_2_IRQ_RX DT_ARM_CMSDK_UART_40006000_IRQ_1
#define CONFIG_UART_CMSDK_APB_PORT2_IRQ_PRI ARM_CMSDK_UART_40006000_IRQ_0_PRIORITY #define CONFIG_UART_CMSDK_APB_PORT2_IRQ_PRI DT_ARM_CMSDK_UART_40006000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT2_BAUD_RATE ARM_CMSDK_UART_40006000_CURRENT_SPEED #define CONFIG_UART_CMSDK_APB_PORT2_BAUD_RATE DT_ARM_CMSDK_UART_40006000_CURRENT_SPEED
#define CONFIG_UART_CMSDK_APB_PORT2_NAME ARM_CMSDK_UART_40006000_LABEL #define CONFIG_UART_CMSDK_APB_PORT2_NAME DT_ARM_CMSDK_UART_40006000_LABEL
#define CMSDK_APB_UART3 ARM_CMSDK_UART_40007000_BASE_ADDRESS #define CMSDK_APB_UART3 DT_ARM_CMSDK_UART_40007000_BASE_ADDRESS
#define CMSDK_APB_UART_3_IRQ_TX ARM_CMSDK_UART_40007000_IRQ_0 #define CMSDK_APB_UART_3_IRQ_TX DT_ARM_CMSDK_UART_40007000_IRQ_0
#define CMSDK_APB_UART_3_IRQ_RX ARM_CMSDK_UART_40007000_IRQ_1 #define CMSDK_APB_UART_3_IRQ_RX DT_ARM_CMSDK_UART_40007000_IRQ_1
#define CONFIG_UART_CMSDK_APB_PORT3_IRQ_PRI ARM_CMSDK_UART_40007000_IRQ_0_PRIORITY #define CONFIG_UART_CMSDK_APB_PORT3_IRQ_PRI DT_ARM_CMSDK_UART_40007000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT3_BAUD_RATE ARM_CMSDK_UART_40007000_CURRENT_SPEED #define CONFIG_UART_CMSDK_APB_PORT3_BAUD_RATE DT_ARM_CMSDK_UART_40007000_CURRENT_SPEED
#define CONFIG_UART_CMSDK_APB_PORT3_NAME ARM_CMSDK_UART_40007000_LABEL #define CONFIG_UART_CMSDK_APB_PORT3_NAME DT_ARM_CMSDK_UART_40007000_LABEL
#define CMSDK_APB_UART4 ARM_CMSDK_UART_40009000_BASE_ADDRESS #define CMSDK_APB_UART4 DT_ARM_CMSDK_UART_40009000_BASE_ADDRESS
#define CMSDK_APB_UART_4_IRQ_TX ARM_CMSDK_UART_40009000_IRQ_0 #define CMSDK_APB_UART_4_IRQ_TX DT_ARM_CMSDK_UART_40009000_IRQ_0
#define CMSDK_APB_UART_4_IRQ_RX ARM_CMSDK_UART_40009000_IRQ_1 #define CMSDK_APB_UART_4_IRQ_RX DT_ARM_CMSDK_UART_40009000_IRQ_1
#define CONFIG_UART_CMSDK_APB_PORT4_IRQ_PRI ARM_CMSDK_UART_40009000_IRQ_0_PRIORITY #define CONFIG_UART_CMSDK_APB_PORT4_IRQ_PRI DT_ARM_CMSDK_UART_40009000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT4_BAUD_RATE ARM_CMSDK_UART_40009000_CURRENT_SPEED #define CONFIG_UART_CMSDK_APB_PORT4_BAUD_RATE DT_ARM_CMSDK_UART_40009000_CURRENT_SPEED
#define CONFIG_UART_CMSDK_APB_PORT4_NAME ARM_CMSDK_UART_40009000_LABEL #define CONFIG_UART_CMSDK_APB_PORT4_NAME DT_ARM_CMSDK_UART_40009000_LABEL
/* CMSDK APB Watchdog */ /* CMSDK APB Watchdog */
#define CMSDK_APB_WDOG ARM_CMSDK_WATCHDOG_40008000_BASE_ADDRESS #define CMSDK_APB_WDOG DT_ARM_CMSDK_WATCHDOG_40008000_BASE_ADDRESS
/* CMSDK AHB General Purpose Input/Output (GPIO) */ /* CMSDK AHB General Purpose Input/Output (GPIO) */
#define CMSDK_AHB_GPIO0 ARM_CMSDK_GPIO_40010000_BASE_ADDRESS #define CMSDK_AHB_GPIO0 DT_ARM_CMSDK_GPIO_40010000_BASE_ADDRESS
#define IRQ_PORT0_ALL ARM_CMSDK_GPIO_40010000_IRQ_0 #define IRQ_PORT0_ALL DT_ARM_CMSDK_GPIO_40010000_IRQ_0
#define CMSDK_AHB_GPIO1 ARM_CMSDK_GPIO_40011000_BASE_ADDRESS #define CMSDK_AHB_GPIO1 DT_ARM_CMSDK_GPIO_40011000_BASE_ADDRESS
#define IRQ_PORT1_ALL ARM_CMSDK_GPIO_40011000_IRQ_0 #define IRQ_PORT1_ALL DT_ARM_CMSDK_GPIO_40011000_IRQ_0
#define CMSDK_AHB_GPIO2 ARM_CMSDK_GPIO_40012000_BASE_ADDRESS #define CMSDK_AHB_GPIO2 DT_ARM_CMSDK_GPIO_40012000_BASE_ADDRESS
#define IRQ_PORT2_ALL ARM_CMSDK_GPIO_40012000_IRQ_0 #define IRQ_PORT2_ALL DT_ARM_CMSDK_GPIO_40012000_IRQ_0
#define CMSDK_AHB_GPIO3 ARM_CMSDK_GPIO_40013000_BASE_ADDRESS #define CMSDK_AHB_GPIO3 DT_ARM_CMSDK_GPIO_40013000_BASE_ADDRESS
#define IRQ_PORT3_ALL ARM_CMSDK_GPIO_40013000_IRQ_0 #define IRQ_PORT3_ALL DT_ARM_CMSDK_GPIO_40013000_IRQ_0
/* I2C SBCon */ /* I2C SBCon */
#define I2C_SBCON_0_BASE_ADDR ARM_VERSATILE_I2C_40022000_BASE_ADDRESS #define I2C_SBCON_0_BASE_ADDR DT_ARM_VERSATILE_I2C_40022000_BASE_ADDRESS
#define I2C_SBCON_0_NAME ARM_VERSATILE_I2C_40022000_LABEL #define I2C_SBCON_0_NAME DT_ARM_VERSATILE_I2C_40022000_LABEL
#define I2C_SBCON_1_BASE_ADDR ARM_VERSATILE_I2C_40023000_BASE_ADDRESS #define I2C_SBCON_1_BASE_ADDR DT_ARM_VERSATILE_I2C_40023000_BASE_ADDRESS
#define I2C_SBCON_1_NAME ARM_VERSATILE_I2C_40023000_LABEL #define I2C_SBCON_1_NAME DT_ARM_VERSATILE_I2C_40023000_LABEL
#define I2C_SBCON_2_BASE_ADDR ARM_VERSATILE_I2C_40029000_BASE_ADDRESS #define I2C_SBCON_2_BASE_ADDR DT_ARM_VERSATILE_I2C_40029000_BASE_ADDRESS
#define I2C_SBCON_2_NAME ARM_VERSATILE_I2C_40029000_LABEL #define I2C_SBCON_2_NAME DT_ARM_VERSATILE_I2C_40029000_LABEL
#define I2C_SBCON_3_BASE_ADDR ARM_VERSATILE_I2C_4002A000_BASE_ADDRESS #define I2C_SBCON_3_BASE_ADDR DT_ARM_VERSATILE_I2C_4002A000_BASE_ADDRESS
#define I2C_SBCON_3_NAME ARM_VERSATILE_I2C_4002A000_LABEL #define I2C_SBCON_3_NAME DT_ARM_VERSATILE_I2C_4002A000_LABEL
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

24
boards/arm/nrf52_pca20020/dts_fixup.h
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@ -1,15 +1,15 @@
#define CONFIG_GPIO_SX1509B_DEV_NAME NORDIC_NRF_I2C_40003000_SEMTECH_SX1509B_3E_LABEL #define CONFIG_GPIO_SX1509B_DEV_NAME DT_NORDIC_NRF_I2C_40003000_SEMTECH_SX1509B_3E_LABEL
#define CONFIG_GPIO_SX1509B_I2C_ADDR NORDIC_NRF_I2C_40003000_SEMTECH_SX1509B_3E_BASE_ADDRESS #define CONFIG_GPIO_SX1509B_I2C_ADDR DT_NORDIC_NRF_I2C_40003000_SEMTECH_SX1509B_3E_BASE_ADDRESS
#define CONFIG_GPIO_SX1509B_I2C_MASTER_DEV_NAME NORDIC_NRF_I2C_40003000_SEMTECH_SX1509B_3E_BUS_NAME #define CONFIG_GPIO_SX1509B_I2C_MASTER_DEV_NAME DT_NORDIC_NRF_I2C_40003000_SEMTECH_SX1509B_3E_BUS_NAME
#define CONFIG_HTS221_NAME NORDIC_NRF_I2C_40003000_ST_HTS221_5F_LABEL #define CONFIG_HTS221_NAME DT_NORDIC_NRF_I2C_40003000_ST_HTS221_5F_LABEL
#define CONFIG_HTS221_I2C_MASTER_DEV_NAME NORDIC_NRF_I2C_40003000_ST_HTS221_5F_BUS_NAME #define CONFIG_HTS221_I2C_MASTER_DEV_NAME DT_NORDIC_NRF_I2C_40003000_ST_HTS221_5F_BUS_NAME
#define CONFIG_HTS221_I2C_ADDR NORDIC_NRF_I2C_40003000_ST_HTS221_5F_BASE_ADDRESS #define CONFIG_HTS221_I2C_ADDR DT_NORDIC_NRF_I2C_40003000_ST_HTS221_5F_BASE_ADDRESS
#define CONFIG_CCS811_NAME NORDIC_NRF_I2C_40003000_AMS_CCS811_5A_LABEL #define CONFIG_CCS811_NAME DT_NORDIC_NRF_I2C_40003000_AMS_CCS811_5A_LABEL
#define CONFIG_CCS811_I2C_MASTER_DEV_NAME NORDIC_NRF_I2C_40003000_AMS_CCS811_5A_BUS_NAME #define CONFIG_CCS811_I2C_MASTER_DEV_NAME DT_NORDIC_NRF_I2C_40003000_AMS_CCS811_5A_BUS_NAME
#define CONFIG_CCS811_I2C_ADDR NORDIC_NRF_I2C_40003000_AMS_CCS811_5A_BASE_ADDRESS #define CONFIG_CCS811_I2C_ADDR DT_NORDIC_NRF_I2C_40003000_AMS_CCS811_5A_BASE_ADDRESS
#define CONFIG_LPS22HB_DEV_NAME NORDIC_NRF_I2C_40003000_ST_LPS22HB_PRESS_5C_LABEL #define CONFIG_LPS22HB_DEV_NAME DT_NORDIC_NRF_I2C_40003000_ST_LPS22HB_PRESS_5C_LABEL
#define CONFIG_LPS22HB_I2C_MASTER_DEV_NAME NORDIC_NRF_I2C_40003000_ST_LPS22HB_PRESS_5C_BUS_NAME #define CONFIG_LPS22HB_I2C_MASTER_DEV_NAME DT_NORDIC_NRF_I2C_40003000_ST_LPS22HB_PRESS_5C_BUS_NAME
#define CONFIG_LPS22HB_I2C_ADDR NORDIC_NRF_I2C_40003000_ST_LPS22HB_PRESS_5C_BASE_ADDRESS #define CONFIG_LPS22HB_I2C_ADDR DT_NORDIC_NRF_I2C_40003000_ST_LPS22HB_PRESS_5C_BASE_ADDRESS

6
boards/arm/olimexino_stm32/dts_fixup.h
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@ -3,6 +3,6 @@
* are modified to handle the generated information, or the mapping of * are modified to handle the generated information, or the mapping of
* generated data matches the driver definitions. * generated data matches the driver definitions.
*/ */
#define CONFIG_USB_DC_STM32_DISCONN_GPIO_PORT_NAME ST_STM32_USB_40005C00_DISCONNECT_GPIOS_CONTROLLER #define CONFIG_USB_DC_STM32_DISCONN_GPIO_PORT_NAME DT_ST_STM32_USB_40005C00_DISCONNECT_GPIOS_CONTROLLER
#define CONFIG_USB_DC_STM32_DISCONN_PIN ST_STM32_USB_40005C00_DISCONNECT_GPIOS_PIN #define CONFIG_USB_DC_STM32_DISCONN_PIN DT_ST_STM32_USB_40005C00_DISCONNECT_GPIOS_PIN
#define CONFIG_USB_DC_STM32_DISCONN_PIN_LEVEL ST_STM32_USB_40005C00_DISCONNECT_GPIOS_FLAGS #define CONFIG_USB_DC_STM32_DISCONN_PIN_LEVEL DT_ST_STM32_USB_40005C00_DISCONNECT_GPIOS_FLAGS

56
boards/arm/reel_board/dts_fixup.h
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@ -1,33 +1,33 @@
#define CONFIG_FXOS8700_NAME NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_LABEL #define CONFIG_FXOS8700_NAME DT_NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_LABEL
#define CONFIG_FXOS8700_I2C_NAME NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_BUS_NAME #define CONFIG_FXOS8700_I2C_NAME DT_NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_BUS_NAME
#define CONFIG_FXOS8700_I2C_ADDRESS NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_BASE_ADDRESS #define CONFIG_FXOS8700_I2C_ADDRESS DT_NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_BASE_ADDRESS
#define CONFIG_FXOS8700_GPIO_NAME NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_INT1_GPIOS_CONTROLLER #define CONFIG_FXOS8700_GPIO_NAME DT_NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_INT1_GPIOS_CONTROLLER
#define CONFIG_FXOS8700_GPIO_PIN NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_INT1_GPIOS_PIN #define CONFIG_FXOS8700_GPIO_PIN DT_NORDIC_NRF_I2C_40003000_NXP_FXOS8700_1D_INT1_GPIOS_PIN
#define CONFIG_HDC1008_NAME NORDIC_NRF_I2C_40003000_TI_HDC1008_43_LABEL #define CONFIG_HDC1008_NAME DT_NORDIC_NRF_I2C_40003000_TI_HDC1008_43_LABEL
#define CONFIG_HDC1008_I2C_MASTER_DEV_NAME NORDIC_NRF_I2C_40003000_TI_HDC1008_43_BUS_NAME #define CONFIG_HDC1008_I2C_MASTER_DEV_NAME DT_NORDIC_NRF_I2C_40003000_TI_HDC1008_43_BUS_NAME
#define CONFIG_HDC1008_I2C_ADDR NORDIC_NRF_I2C_40003000_TI_HDC1008_43_BASE_ADDRESS #define CONFIG_HDC1008_I2C_ADDR DT_NORDIC_NRF_I2C_40003000_TI_HDC1008_43_BASE_ADDRESS
#define CONFIG_HDC1008_GPIO_DEV_NAME NORDIC_NRF_I2C_40003000_TI_HDC1008_43_DRDY_GPIOS_CONTROLLER #define CONFIG_HDC1008_GPIO_DEV_NAME DT_NORDIC_NRF_I2C_40003000_TI_HDC1008_43_DRDY_GPIOS_CONTROLLER
#define CONFIG_HDC1008_GPIO_PIN_NUM NORDIC_NRF_I2C_40003000_TI_HDC1008_43_DRDY_GPIOS_PIN #define CONFIG_HDC1008_GPIO_PIN_NUM DT_NORDIC_NRF_I2C_40003000_TI_HDC1008_43_DRDY_GPIOS_PIN
#define CONFIG_HDC1008_GPIO_FLAGS NORDIC_NRF_I2C_40003000_TI_HDC1008_43_DRDY_GPIOS_FLAGS #define CONFIG_HDC1008_GPIO_FLAGS DT_NORDIC_NRF_I2C_40003000_TI_HDC1008_43_DRDY_GPIOS_FLAGS
#define CONFIG_APDS9960_DRV_NAME NORDIC_NRF_I2C_40003000_AVAGO_APDS9960_29_LABEL #define CONFIG_APDS9960_DRV_NAME DT_NORDIC_NRF_I2C_40003000_AVAGO_APDS9960_29_LABEL
#define CONFIG_APDS9960_I2C_DEV_NAME NORDIC_NRF_I2C_40003000_AVAGO_APDS9960_29_BUS_NAME #define CONFIG_APDS9960_I2C_DEV_NAME DT_NORDIC_NRF_I2C_40003000_AVAGO_APDS9960_29_BUS_NAME
#define CONFIG_APDS9960_GPIO_DEV_NAME NORDIC_NRF_I2C_40003000_AVAGO_APDS9960_29_INT_GPIOS_CONTROLLER #define CONFIG_APDS9960_GPIO_DEV_NAME DT_NORDIC_NRF_I2C_40003000_AVAGO_APDS9960_29_INT_GPIOS_CONTROLLER
#define CONFIG_APDS9960_GPIO_PIN_NUM NORDIC_NRF_I2C_40003000_AVAGO_APDS9960_29_INT_GPIOS_PIN #define CONFIG_APDS9960_GPIO_PIN_NUM DT_NORDIC_NRF_I2C_40003000_AVAGO_APDS9960_29_INT_GPIOS_PIN
#define CONFIG_SSD1673_DEV_NAME NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_LABEL #define CONFIG_SSD1673_DEV_NAME DT_NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_LABEL
#define CONFIG_SSD1673_SPI_FREQ NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_SPI_MAX_FREQUENCY #define CONFIG_SSD1673_SPI_FREQ DT_NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_SPI_MAX_FREQUENCY
#define CONFIG_SSD1673_SPI_DEV_NAME NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_BUS_NAME #define CONFIG_SSD1673_SPI_DEV_NAME DT_NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_BUS_NAME
#define CONFIG_SSD1673_SPI_SLAVE_NUMBER NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_BASE_ADDRESS #define CONFIG_SSD1673_SPI_SLAVE_NUMBER DT_NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_BASE_ADDRESS
#define CONFIG_SSD1673_SPI_GPIO_CS y #define CONFIG_SSD1673_SPI_GPIO_CS y
#define CONFIG_SSD1673_SPI_GPIO_CS_DRV_NAME NORDIC_NRF_SPI_4002B000_CS_GPIOS_CONTROLLER #define CONFIG_SSD1673_SPI_GPIO_CS_DRV_NAME DT_NORDIC_NRF_SPI_4002B000_CS_GPIOS_CONTROLLER
#define CONFIG_SSD1673_SPI_GPIO_CS_PIN NORDIC_NRF_SPI_4002B000_CS_GPIOS_PIN #define CONFIG_SSD1673_SPI_GPIO_CS_PIN DT_NORDIC_NRF_SPI_4002B000_CS_GPIOS_PIN
#define CONFIG_SSD1673_RESET_GPIO_PORT_NAME NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_RESET_GPIOS_CONTROLLER #define CONFIG_SSD1673_RESET_GPIO_PORT_NAME DT_NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_RESET_GPIOS_CONTROLLER
#define CONFIG_SSD1673_RESET_PIN NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_RESET_GPIOS_PIN #define CONFIG_SSD1673_RESET_PIN DT_NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_RESET_GPIOS_PIN
#define CONFIG_SSD1673_DC_GPIO_PORT_NAME NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_DC_GPIOS_CONTROLLER #define CONFIG_SSD1673_DC_GPIO_PORT_NAME DT_NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_DC_GPIOS_CONTROLLER
#define CONFIG_SSD1673_DC_PIN NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_DC_GPIOS_PIN #define CONFIG_SSD1673_DC_PIN DT_NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_DC_GPIOS_PIN
#define CONFIG_SSD1673_BUSY_GPIO_PORT_NAME NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_BUSY_GPIOS_CONTROLLER #define CONFIG_SSD1673_BUSY_GPIO_PORT_NAME DT_NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_BUSY_GPIOS_CONTROLLER
#define CONFIG_SSD1673_BUSY_PIN NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_BUSY_GPIOS_PIN #define CONFIG_SSD1673_BUSY_PIN DT_NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_BUSY_GPIOS_PIN
#define CONFIG_SSD1673_ORIENTATION_FLIPPED NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_ORIENTATION_FLIPPED #define CONFIG_SSD1673_ORIENTATION_FLIPPED DT_NORDIC_NRF_SPI_4002B000_SOLOMON_SSD1673FB_SPI_0_ORIENTATION_FLIPPED

12
boards/arm/stm32f3_disco/dts_fixup.h
View file

@ -4,10 +4,10 @@
* generated data matches the driver definitions. * generated data matches the driver definitions.
*/ */
#define CONFIG_LSM303DLHC_ACCEL_NAME ST_STM32_I2C_V2_40005400_ST_LSM303DLHC_ACCEL_19_LABEL #define CONFIG_LSM303DLHC_ACCEL_NAME DT_ST_STM32_I2C_V2_40005400_ST_LSM303DLHC_ACCEL_19_LABEL
#define CONFIG_LSM303DLHC_ACCEL_I2C_ADDR ST_STM32_I2C_V2_40005400_ST_LSM303DLHC_ACCEL_19_BASE_ADDRESS #define CONFIG_LSM303DLHC_ACCEL_I2C_ADDR DT_ST_STM32_I2C_V2_40005400_ST_LSM303DLHC_ACCEL_19_BASE_ADDRESS
#define CONFIG_LSM303DLHC_ACCEL_I2C_MASTER_DEV ST_STM32_I2C_V2_40005400_ST_LSM303DLHC_ACCEL_19_BUS_NAME #define CONFIG_LSM303DLHC_ACCEL_I2C_MASTER_DEV DT_ST_STM32_I2C_V2_40005400_ST_LSM303DLHC_ACCEL_19_BUS_NAME
#define CONFIG_LSM303DLHC_MAGN_NAME ST_STM32_I2C_V2_40005400_ST_LSM303DLHC_MAGN_1E_LABEL #define CONFIG_LSM303DLHC_MAGN_NAME DT_ST_STM32_I2C_V2_40005400_ST_LSM303DLHC_MAGN_1E_LABEL
#define CONFIG_LSM303DLHC_MAGN_I2C_ADDR ST_STM32_I2C_V2_40005400_ST_LSM303DLHC_MAGN_1E_BASE_ADDRESS #define CONFIG_LSM303DLHC_MAGN_I2C_ADDR DT_ST_STM32_I2C_V2_40005400_ST_LSM303DLHC_MAGN_1E_BASE_ADDRESS
#define CONFIG_LSM303DLHC_MAGN_I2C_MASTER_DEV ST_STM32_I2C_V2_40005400_ST_LSM303DLHC_MAGN_1E_BUS_NAME #define CONFIG_LSM303DLHC_MAGN_I2C_MASTER_DEV DT_ST_STM32_I2C_V2_40005400_ST_LSM303DLHC_MAGN_1E_BUS_NAME

20
boards/arm/warp7_m4/dts_fixup.h
View file

@ -1,11 +1,11 @@
#define CONFIG_FXOS8700_NAME FSL_IMX7D_I2C_30A50000_NXP_FXOS8700_1E_LABEL #define CONFIG_FXOS8700_NAME DT_FSL_IMX7D_I2C_30A50000_NXP_FXOS8700_1E_LABEL
#define CONFIG_FXOS8700_I2C_NAME FSL_IMX7D_I2C_30A50000_NXP_FXOS8700_1E_BUS_NAME #define CONFIG_FXOS8700_I2C_NAME DT_FSL_IMX7D_I2C_30A50000_NXP_FXOS8700_1E_BUS_NAME
#define CONFIG_FXOS8700_I2C_ADDRESS FSL_IMX7D_I2C_30A50000_NXP_FXOS8700_1E_BASE_ADDRESS #define CONFIG_FXOS8700_I2C_ADDRESS DT_FSL_IMX7D_I2C_30A50000_NXP_FXOS8700_1E_BASE_ADDRESS
#define CONFIG_FXOS8700_GPIO_NAME FSL_IMX7D_I2C_30A50000_NXP_FXOS8700_1E_INT1_GPIOS_CONTROLLER #define CONFIG_FXOS8700_GPIO_NAME DT_FSL_IMX7D_I2C_30A50000_NXP_FXOS8700_1E_INT1_GPIOS_CONTROLLER
#define CONFIG_FXOS8700_GPIO_PIN FSL_IMX7D_I2C_30A50000_NXP_FXOS8700_1E_INT1_GPIOS_PIN #define CONFIG_FXOS8700_GPIO_PIN DT_FSL_IMX7D_I2C_30A50000_NXP_FXOS8700_1E_INT1_GPIOS_PIN
#define CONFIG_FXAS21002_NAME FSL_IMX7D_I2C_30A50000_NXP_FXAS21002_20_LABEL #define CONFIG_FXAS21002_NAME DT_FSL_IMX7D_I2C_30A50000_NXP_FXAS21002_20_LABEL
#define CONFIG_FXAS21002_I2C_NAME FSL_IMX7D_I2C_30A50000_NXP_FXAS21002_20_BUS_NAME #define CONFIG_FXAS21002_I2C_NAME DT_FSL_IMX7D_I2C_30A50000_NXP_FXAS21002_20_BUS_NAME
#define CONFIG_FXAS21002_I2C_ADDRESS FSL_IMX7D_I2C_30A50000_NXP_FXAS21002_20_BASE_ADDRESS #define CONFIG_FXAS21002_I2C_ADDRESS DT_FSL_IMX7D_I2C_30A50000_NXP_FXAS21002_20_BASE_ADDRESS
#define CONFIG_FXAS21002_GPIO_NAME FSL_IMX7D_I2C_30A50000_NXP_FXAS21002_20_INT1_GPIOS_CONTROLLER #define CONFIG_FXAS21002_GPIO_NAME DT_FSL_IMX7D_I2C_30A50000_NXP_FXAS21002_20_INT1_GPIOS_CONTROLLER
#define CONFIG_FXAS21002_GPIO_PIN FSL_IMX7D_I2C_30A50000_NXP_FXAS21002_20_INT1_GPIOS_PIN #define CONFIG_FXAS21002_GPIO_PIN DT_FSL_IMX7D_I2C_30A50000_NXP_FXAS21002_20_INT1_GPIOS_PIN

8
boards/x86/qemu_x86/dts_fixup.h
View file

@ -1,8 +1,8 @@
/* Board level DTS fixup file */ /* Board level DTS fixup file */
#define CONFIG_ETH_E1000_BASE_ADDRESS INTEL_E1000_FEBC0000_BASE_ADDRESS #define CONFIG_ETH_E1000_BASE_ADDRESS DT_INTEL_E1000_FEBC0000_BASE_ADDRESS
#define CONFIG_ETH_E1000_IRQ INTEL_E1000_FEBC0000_IRQ_0 #define CONFIG_ETH_E1000_IRQ DT_INTEL_E1000_FEBC0000_IRQ_0
#define CONFIG_ETH_E1000_IRQ_PRIORITY INTEL_E1000_FEBC0000_IRQ_0_PRIORITY #define CONFIG_ETH_E1000_IRQ_PRIORITY DT_INTEL_E1000_FEBC0000_IRQ_0_PRIORITY
#define CONFIG_ETH_E1000_IRQ_FLAGS INTEL_E1000_FEBC0000_IRQ_0_SENSE #define CONFIG_ETH_E1000_IRQ_FLAGS DT_INTEL_E1000_FEBC0000_IRQ_0_SENSE
/* End of Board Level DTS fixup file */ /* End of Board Level DTS fixup file */

124
boards/x86/up_squared/dts_fixup.h
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@ -6,76 +6,76 @@
/* Board level DTS fixup file */ /* Board level DTS fixup file */
#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_91524000_BASE_ADDRESS #define CONFIG_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_91524000_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_91524000_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_91524000_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_91524000_LABEL #define CONFIG_UART_NS16550_PORT_0_NAME DT_NS16550_91524000_LABEL
#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_91524000_IRQ_0 #define CONFIG_UART_NS16550_PORT_0_IRQ DT_NS16550_91524000_IRQ_0
#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_91524000_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_91524000_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS NS16550_91524000_IRQ_0_SENSE #define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS DT_NS16550_91524000_IRQ_0_SENSE
#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_91524000_CLOCK_FREQUENCY #define CONFIG_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_91524000_CLOCK_FREQUENCY
#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_91522000_BASE_ADDRESS #define CONFIG_UART_NS16550_PORT_1_BASE_ADDR DT_NS16550_91522000_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_91522000_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_1_BAUD_RATE DT_NS16550_91522000_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_91522000_LABEL #define CONFIG_UART_NS16550_PORT_1_NAME DT_NS16550_91522000_LABEL
#define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_91522000_IRQ_0 #define CONFIG_UART_NS16550_PORT_1_IRQ DT_NS16550_91522000_IRQ_0
#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_91522000_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_91522000_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS NS16550_91522000_IRQ_0_SENSE #define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS DT_NS16550_91522000_IRQ_0_SENSE
#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ NS16550_91522000_CLOCK_FREQUENCY #define CONFIG_UART_NS16550_PORT_1_CLK_FREQ DT_NS16550_91522000_CLOCK_FREQUENCY
#define CONFIG_I2C_0_NAME SNPS_DESIGNWARE_I2C_91534000_LABEL #define CONFIG_I2C_0_NAME DT_SNPS_DESIGNWARE_I2C_91534000_LABEL
#define CONFIG_I2C_0_BASE_ADDR SNPS_DESIGNWARE_I2C_91534000_BASE_ADDRESS #define CONFIG_I2C_0_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_91534000_BASE_ADDRESS
#define CONFIG_I2C_0_IRQ SNPS_DESIGNWARE_I2C_91534000_IRQ_0 #define CONFIG_I2C_0_IRQ DT_SNPS_DESIGNWARE_I2C_91534000_IRQ_0
#define CONFIG_I2C_0_IRQ_PRI SNPS_DESIGNWARE_I2C_91534000_IRQ_0_PRIORITY #define CONFIG_I2C_0_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91534000_IRQ_0_PRIORITY
#define CONFIG_I2C_0_IRQ_FLAGS SNPS_DESIGNWARE_I2C_91534000_IRQ_0_SENSE #define CONFIG_I2C_0_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_91534000_IRQ_0_SENSE
#define CONFIG_I2C_0_BITRATE SNPS_DESIGNWARE_I2C_91534000_CLOCK_FREQUENCY #define CONFIG_I2C_0_BITRATE DT_SNPS_DESIGNWARE_I2C_91534000_CLOCK_FREQUENCY
#define CONFIG_I2C_1_NAME SNPS_DESIGNWARE_I2C_91532000_LABEL #define CONFIG_I2C_1_NAME DT_SNPS_DESIGNWARE_I2C_91532000_LABEL
#define CONFIG_I2C_1_BASE_ADDR SNPS_DESIGNWARE_I2C_91532000_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_91532000_BASE_ADDRESS
#define CONFIG_I2C_1_IRQ SNPS_DESIGNWARE_I2C_91532000_IRQ_0 #define CONFIG_I2C_1_IRQ DT_SNPS_DESIGNWARE_I2C_91532000_IRQ_0
#define CONFIG_I2C_1_IRQ_PRI SNPS_DESIGNWARE_I2C_91532000_IRQ_0_PRIORITY #define CONFIG_I2C_1_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91532000_IRQ_0_PRIORITY
#define CONFIG_I2C_1_IRQ_FLAGS SNPS_DESIGNWARE_I2C_91532000_IRQ_0_SENSE #define CONFIG_I2C_1_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_91532000_IRQ_0_SENSE
#define CONFIG_I2C_1_BITRATE SNPS_DESIGNWARE_I2C_91532000_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_SNPS_DESIGNWARE_I2C_91532000_CLOCK_FREQUENCY
#define CONFIG_I2C_2_NAME SNPS_DESIGNWARE_I2C_91530000_LABEL #define CONFIG_I2C_2_NAME DT_SNPS_DESIGNWARE_I2C_91530000_LABEL
#define CONFIG_I2C_2_BASE_ADDR SNPS_DESIGNWARE_I2C_91530000_BASE_ADDRESS #define CONFIG_I2C_2_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_91530000_BASE_ADDRESS
#define CONFIG_I2C_2_IRQ SNPS_DESIGNWARE_I2C_91530000_IRQ_0 #define CONFIG_I2C_2_IRQ DT_SNPS_DESIGNWARE_I2C_91530000_IRQ_0
#define CONFIG_I2C_2_IRQ_PRI SNPS_DESIGNWARE_I2C_91530000_IRQ_0_PRIORITY #define CONFIG_I2C_2_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91530000_IRQ_0_PRIORITY
#define CONFIG_I2C_2_IRQ_FLAGS SNPS_DESIGNWARE_I2C_91530000_IRQ_0_SENSE #define CONFIG_I2C_2_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_91530000_IRQ_0_SENSE
#define CONFIG_I2C_2_BITRATE SNPS_DESIGNWARE_I2C_91530000_CLOCK_FREQUENCY #define CONFIG_I2C_2_BITRATE DT_SNPS_DESIGNWARE_I2C_91530000_CLOCK_FREQUENCY
#define CONFIG_I2C_3_NAME SNPS_DESIGNWARE_I2C_9152E000_LABEL #define CONFIG_I2C_3_NAME DT_SNPS_DESIGNWARE_I2C_9152E000_LABEL
#define CONFIG_I2C_3_BASE_ADDR SNPS_DESIGNWARE_I2C_9152E000_BASE_ADDRESS #define CONFIG_I2C_3_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_9152E000_BASE_ADDRESS
#define CONFIG_I2C_3_IRQ SNPS_DESIGNWARE_I2C_9152E000_IRQ_0 #define CONFIG_I2C_3_IRQ DT_SNPS_DESIGNWARE_I2C_9152E000_IRQ_0
#define CONFIG_I2C_3_IRQ_PRI SNPS_DESIGNWARE_I2C_9152E000_IRQ_0_PRIORITY #define CONFIG_I2C_3_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_9152E000_IRQ_0_PRIORITY
#define CONFIG_I2C_3_IRQ_FLAGS SNPS_DESIGNWARE_I2C_9152E000_IRQ_0_SENSE #define CONFIG_I2C_3_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_9152E000_IRQ_0_SENSE
#define CONFIG_I2C_3_BITRATE SNPS_DESIGNWARE_I2C_9152E000_CLOCK_FREQUENCY #define CONFIG_I2C_3_BITRATE DT_SNPS_DESIGNWARE_I2C_9152E000_CLOCK_FREQUENCY
#define CONFIG_I2C_4_NAME SNPS_DESIGNWARE_I2C_9152C000_LABEL #define CONFIG_I2C_4_NAME DT_SNPS_DESIGNWARE_I2C_9152C000_LABEL
#define CONFIG_I2C_4_BASE_ADDR SNPS_DESIGNWARE_I2C_9152C000_BASE_ADDRESS #define CONFIG_I2C_4_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_9152C000_BASE_ADDRESS
#define CONFIG_I2C_4_IRQ SNPS_DESIGNWARE_I2C_9152C000_IRQ_0 #define CONFIG_I2C_4_IRQ DT_SNPS_DESIGNWARE_I2C_9152C000_IRQ_0
#define CONFIG_I2C_4_IRQ_PRI SNPS_DESIGNWARE_I2C_9152C000_IRQ_0_PRIORITY #define CONFIG_I2C_4_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_9152C000_IRQ_0_PRIORITY
#define CONFIG_I2C_4_IRQ_FLAGS SNPS_DESIGNWARE_I2C_9152C000_IRQ_0_SENSE #define CONFIG_I2C_4_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_9152C000_IRQ_0_SENSE
#define CONFIG_I2C_4_BITRATE SNPS_DESIGNWARE_I2C_9152C000_CLOCK_FREQUENCY #define CONFIG_I2C_4_BITRATE DT_SNPS_DESIGNWARE_I2C_9152C000_CLOCK_FREQUENCY
#define CONFIG_I2C_5_NAME SNPS_DESIGNWARE_I2C_9152A000_LABEL #define CONFIG_I2C_5_NAME DT_SNPS_DESIGNWARE_I2C_9152A000_LABEL
#define CONFIG_I2C_5_BASE_ADDR SNPS_DESIGNWARE_I2C_9152A000_BASE_ADDRESS #define CONFIG_I2C_5_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_9152A000_BASE_ADDRESS
#define CONFIG_I2C_5_IRQ SNPS_DESIGNWARE_I2C_9152A000_IRQ_0 #define CONFIG_I2C_5_IRQ DT_SNPS_DESIGNWARE_I2C_9152A000_IRQ_0
#define CONFIG_I2C_5_IRQ_PRI SNPS_DESIGNWARE_I2C_9152A000_IRQ_0_PRIORITY #define CONFIG_I2C_5_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_9152A000_IRQ_0_PRIORITY
#define CONFIG_I2C_5_IRQ_FLAGS SNPS_DESIGNWARE_I2C_9152A000_IRQ_0_SENSE #define CONFIG_I2C_5_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_9152A000_IRQ_0_SENSE
#define CONFIG_I2C_5_BITRATE SNPS_DESIGNWARE_I2C_9152A000_CLOCK_FREQUENCY #define CONFIG_I2C_5_BITRATE DT_SNPS_DESIGNWARE_I2C_9152A000_CLOCK_FREQUENCY
#define CONFIG_I2C_6_NAME SNPS_DESIGNWARE_I2C_91528000_LABEL #define CONFIG_I2C_6_NAME DT_SNPS_DESIGNWARE_I2C_91528000_LABEL
#define CONFIG_I2C_6_BASE_ADDR SNPS_DESIGNWARE_I2C_91528000_BASE_ADDRESS #define CONFIG_I2C_6_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_91528000_BASE_ADDRESS
#define CONFIG_I2C_6_IRQ SNPS_DESIGNWARE_I2C_91528000_IRQ_0 #define CONFIG_I2C_6_IRQ DT_SNPS_DESIGNWARE_I2C_91528000_IRQ_0
#define CONFIG_I2C_6_IRQ_PRI SNPS_DESIGNWARE_I2C_91528000_IRQ_0_PRIORITY #define CONFIG_I2C_6_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91528000_IRQ_0_PRIORITY
#define CONFIG_I2C_6_IRQ_FLAGS SNPS_DESIGNWARE_I2C_91528000_IRQ_0_SENSE #define CONFIG_I2C_6_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_91528000_IRQ_0_SENSE
#define CONFIG_I2C_6_BITRATE SNPS_DESIGNWARE_I2C_91528000_CLOCK_FREQUENCY #define CONFIG_I2C_6_BITRATE DT_SNPS_DESIGNWARE_I2C_91528000_CLOCK_FREQUENCY
#define CONFIG_I2C_7_NAME SNPS_DESIGNWARE_I2C_91526000_LABEL #define CONFIG_I2C_7_NAME DT_SNPS_DESIGNWARE_I2C_91526000_LABEL
#define CONFIG_I2C_7_BASE_ADDR SNPS_DESIGNWARE_I2C_91526000_BASE_ADDRESS #define CONFIG_I2C_7_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_91526000_BASE_ADDRESS
#define CONFIG_I2C_7_IRQ SNPS_DESIGNWARE_I2C_91526000_IRQ_0 #define CONFIG_I2C_7_IRQ DT_SNPS_DESIGNWARE_I2C_91526000_IRQ_0
#define CONFIG_I2C_7_IRQ_PRI SNPS_DESIGNWARE_I2C_91526000_IRQ_0_PRIORITY #define CONFIG_I2C_7_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_91526000_IRQ_0_PRIORITY
#define CONFIG_I2C_7_IRQ_FLAGS SNPS_DESIGNWARE_I2C_91526000_IRQ_0_SENSE #define CONFIG_I2C_7_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_91526000_IRQ_0_SENSE
#define CONFIG_I2C_7_BITRATE SNPS_DESIGNWARE_I2C_91526000_CLOCK_FREQUENCY #define CONFIG_I2C_7_BITRATE DT_SNPS_DESIGNWARE_I2C_91526000_CLOCK_FREQUENCY
/* End of Board Level DTS fixup file */ /* End of Board Level DTS fixup file */

10
samples/boards/arduino_101/environmental_sensing/sensor/dts_fixup.h
View file

@ -6,15 +6,15 @@
#if defined(CONFIG_HAS_DTS_I2C) #if defined(CONFIG_HAS_DTS_I2C)
#define CONFIG_HDC1008_NAME INTEL_QMSI_SS_I2C_80012000_TI_HDC1008_40_LABEL #define CONFIG_HDC1008_NAME DT_INTEL_QMSI_SS_I2C_80012000_TI_HDC1008_40_LABEL
#define CONFIG_HDC1008_I2C_MASTER_DEV_NAME INTEL_QMSI_SS_I2C_80012000_TI_HDC1008_40_BUS_NAME #define CONFIG_HDC1008_I2C_MASTER_DEV_NAME DT_INTEL_QMSI_SS_I2C_80012000_TI_HDC1008_40_BUS_NAME
#define CONFIG_HDC1008_I2C_ADDR INTEL_QMSI_SS_I2C_80012000_TI_HDC1008_40_BASE_ADDRESS #define CONFIG_HDC1008_I2C_ADDR DT_INTEL_QMSI_SS_I2C_80012000_TI_HDC1008_40_BASE_ADDRESS
#endif /* CONFIG_HAS_DTS_I2C */ #endif /* CONFIG_HAS_DTS_I2C */
#if defined(CONFIG_HAS_DTS_GPIO) #if defined(CONFIG_HAS_DTS_GPIO)
#define CONFIG_HDC1008_GPIO_DEV_NAME INTEL_QMSI_SS_I2C_80012000_TI_HDC1008_40_DRDY_GPIOS_CONTROLLER #define CONFIG_HDC1008_GPIO_DEV_NAME DT_INTEL_QMSI_SS_I2C_80012000_TI_HDC1008_40_DRDY_GPIOS_CONTROLLER
#define CONFIG_HDC1008_GPIO_PIN_NUM INTEL_QMSI_SS_I2C_80012000_TI_HDC1008_40_DRDY_GPIOS_PIN #define CONFIG_HDC1008_GPIO_PIN_NUM DT_INTEL_QMSI_SS_I2C_80012000_TI_HDC1008_40_DRDY_GPIOS_PIN
#endif /* CONFIG_HAS_DTS_GPIO */ #endif /* CONFIG_HAS_DTS_GPIO */

22
samples/display/cfb/dts_fixup.h
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@ -1,15 +1,15 @@
#if defined(CONFIG_HAS_DTS_I2C) && defined(CONFIG_SSD1306) #if defined(CONFIG_HAS_DTS_I2C) && defined(CONFIG_SSD1306)
#define CONFIG_SSD1306_I2C_ADDR NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_BASE_ADDRESS #define CONFIG_SSD1306_I2C_ADDR DT_NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_BASE_ADDRESS
#define CONFIG_SSD1306_I2C_MASTER_DEV_NAME NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_BUS_NAME #define CONFIG_SSD1306_I2C_MASTER_DEV_NAME DT_NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_BUS_NAME
#define CONFIG_SSD1306_DEV_NAME NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_LABEL #define CONFIG_SSD1306_DEV_NAME DT_NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_LABEL
#define CONFIG_SSD1306_PANEL_COM_INVDIR NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_COM_INVDIR #define CONFIG_SSD1306_PANEL_COM_INVDIR DT_NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_COM_INVDIR
#define SSD1306_PANEL_DISPLAY_OFFSET NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_DISPLAY_OFFSET #define SSD1306_PANEL_DISPLAY_OFFSET DT_NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_DISPLAY_OFFSET
#define SSD1306_PANEL_HEIGHT NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_HEIGHT #define SSD1306_PANEL_HEIGHT DT_NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_HEIGHT
#define SSD1306_PANEL_PAGE_OFFSET NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_PAGE_OFFSET #define SSD1306_PANEL_PAGE_OFFSET DT_NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_PAGE_OFFSET
#define SSD1306_PANEL_PRECHARGE_PERIOD NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_PRECHARGEP #define SSD1306_PANEL_PRECHARGE_PERIOD DT_NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_PRECHARGEP
#define SSD1306_PANEL_FIRST_SEG NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_SEGMENT_OFFSET #define SSD1306_PANEL_FIRST_SEG DT_NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_SEGMENT_OFFSET
#define CONFIG_SSD1306_PANEL_SEGMENT_REMAP NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_SEGMENT_REMAP #define CONFIG_SSD1306_PANEL_SEGMENT_REMAP DT_NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_SEGMENT_REMAP
#define SSD1306_PANEL_WIDTH NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_WIDTH #define SSD1306_PANEL_WIDTH DT_NXP_KINETIS_I2C_40066000_SOLOMON_SSD1306FB_I2C_3C_WIDTH
#endif #endif

16
samples/display/ili9340/dts_fixup.h
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@ -7,28 +7,28 @@
#if defined(CONFIG_SPI_STM32) && defined(CONFIG_ILI9340) #if defined(CONFIG_SPI_STM32) && defined(CONFIG_ILI9340)
#define CONFIG_ILI9340_SPI_DEV_NAME \ #define CONFIG_ILI9340_SPI_DEV_NAME \
ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_BUS_NAME DT_ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_BUS_NAME
#define CONFIG_ILI9340_SPI_SLAVE_NUMBER \ #define CONFIG_ILI9340_SPI_SLAVE_NUMBER \
ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_BASE_ADDRESS
#define CONFIG_ILI9340_CMD_DATA_GPIO_PORT_NAME \ #define CONFIG_ILI9340_CMD_DATA_GPIO_PORT_NAME \
ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_CMD_DATA_GPIOS_CONTROLLER DT_ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_CMD_DATA_GPIOS_CONTROLLER
#define CONFIG_ILI9340_CMD_DATA_PIN \ #define CONFIG_ILI9340_CMD_DATA_PIN \
ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_CMD_DATA_GPIOS_PIN DT_ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_CMD_DATA_GPIOS_PIN
#define CONFIG_ILI9340_DEV_NAME \ #define CONFIG_ILI9340_DEV_NAME \
ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_LABEL DT_ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_LABEL
#define CONFIG_ILI9340_RESET_GPIO_PORT_NAME \ #define CONFIG_ILI9340_RESET_GPIO_PORT_NAME \
ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_RESET_GPIOS_CONTROLLER DT_ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_RESET_GPIOS_CONTROLLER
#define CONFIG_ILI9340_RESET_PIN \ #define CONFIG_ILI9340_RESET_PIN \
ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_RESET_GPIOS_PIN DT_ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_RESET_GPIOS_PIN
#define CONFIG_ILI9340_SPI_FREQ \ #define CONFIG_ILI9340_SPI_FREQ \
ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_SPI_MAX_FREQUENCY DT_ST_STM32_SPI_FIFO_40013000_ILITEK_ILI9340_0_SPI_MAX_FREQUENCY
#endif #endif

6
samples/drivers/led_lp5562/dts_fixup.h
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@ -1,9 +1,9 @@
#if defined(CONFIG_HAS_DTS_I2C) #if defined(CONFIG_HAS_DTS_I2C)
#ifndef CONFIG_LP5562_DEV_NAME #ifndef CONFIG_LP5562_DEV_NAME
#define CONFIG_LP5562_DEV_NAME NORDIC_NRF_I2C_40003000_TI_LP5562_30_LABEL #define CONFIG_LP5562_DEV_NAME DT_NORDIC_NRF_I2C_40003000_TI_LP5562_30_LABEL
#define CONFIG_LP5562_I2C_ADDRESS NORDIC_NRF_I2C_40003000_TI_LP5562_30_BASE_ADDRESS #define CONFIG_LP5562_I2C_ADDRESS DT_NORDIC_NRF_I2C_40003000_TI_LP5562_30_BASE_ADDRESS
#define CONFIG_LP5562_I2C_MASTER_DEV_NAME NORDIC_NRF_I2C_40003000_TI_LP5562_30_BUS_NAME #define CONFIG_LP5562_I2C_MASTER_DEV_NAME DT_NORDIC_NRF_I2C_40003000_TI_LP5562_30_BUS_NAME
#endif #endif
#endif #endif

6
samples/drivers/led_pca9633/dts_fixup.h
View file

@ -1,9 +1,9 @@
#if defined(CONFIG_HAS_DTS_I2C) #if defined(CONFIG_HAS_DTS_I2C)
#ifndef CONFIG_PCA9633_DEV_NAME #ifndef CONFIG_PCA9633_DEV_NAME
#define CONFIG_PCA9633_DEV_NAME ST_STM32_I2C_V2_40005400_NXP_PCA9633_62_LABEL #define CONFIG_PCA9633_DEV_NAME DT_ST_STM32_I2C_V2_40005400_NXP_PCA9633_62_LABEL
#define CONFIG_PCA9633_I2C_ADDRESS ST_STM32_I2C_V2_40005400_NXP_PCA9633_62_BASE_ADDRESS #define CONFIG_PCA9633_I2C_ADDRESS DT_ST_STM32_I2C_V2_40005400_NXP_PCA9633_62_BASE_ADDRESS
#define CONFIG_PCA9633_I2C_MASTER_DEV_NAME ST_STM32_I2C_V2_40005400_NXP_PCA9633_62_BUS_NAME #define CONFIG_PCA9633_I2C_MASTER_DEV_NAME DT_ST_STM32_I2C_V2_40005400_NXP_PCA9633_62_BUS_NAME
#endif #endif
#endif #endif

28
samples/net/lwm2m_client/dts_fixup.h
View file

@ -5,19 +5,19 @@
*/ */
#ifdef CONFIG_BOARD_FRDM_K64F #ifdef CONFIG_BOARD_FRDM_K64F
#define CONFIG_WNCM14A2A_UART_DRV_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_BUS_NAME #define CONFIG_WNCM14A2A_UART_DRV_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_BUS_NAME
#define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER #define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN #define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_POWER_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER #define CONFIG_WNCM14A2A_GPIO_MDM_POWER_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_POWER_PIN NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_POWER_GPIOS_PIN #define CONFIG_WNCM14A2A_GPIO_MDM_POWER_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_POWER_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER #define CONFIG_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN #define CONFIG_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_RESET_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER #define CONFIG_WNCM14A2A_GPIO_MDM_RESET_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_RESET_PIN NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_RESET_GPIOS_PIN #define CONFIG_WNCM14A2A_GPIO_MDM_RESET_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_RESET_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER #define CONFIG_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN #define CONFIG_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN
#ifdef NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN #ifdef DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_SEND_OK_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER #define CONFIG_WNCM14A2A_GPIO_MDM_SEND_OK_NAME DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_SEND_OK_PIN NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN #define CONFIG_WNCM14A2A_GPIO_MDM_SEND_OK_PIN DT_NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
#endif #endif
#endif #endif

4
samples/sensor/ms5837/dts_fixup.h
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@ -11,9 +11,9 @@
#ifndef CONFIG_MS5837_DEV_NAME #ifndef CONFIG_MS5837_DEV_NAME
#define CONFIG_MS5837_DEV_NAME \ #define CONFIG_MS5837_DEV_NAME \
NORDIC_NRF_I2C_40004000_MEAS_MS5837_76_LABEL DT_NORDIC_NRF_I2C_40004000_MEAS_MS5837_76_LABEL
#define CONFIG_MS5837_I2C_MASTER_DEV_NAME \ #define CONFIG_MS5837_I2C_MASTER_DEV_NAME \
NORDIC_NRF_I2C_40004000_MEAS_MS5837_76_BUS_NAME DT_NORDIC_NRF_I2C_40004000_MEAS_MS5837_76_BUS_NAME
#endif #endif
#else #else

154
soc/arc/quark_se_c1000_ss/dts_fixup.h
View file

@ -1,14 +1,14 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_UART_QMSI_0_BAUDRATE INTEL_QMSI_UART_B0002000_CURRENT_SPEED #define CONFIG_UART_QMSI_0_BAUDRATE DT_INTEL_QMSI_UART_B0002000_CURRENT_SPEED
#define CONFIG_UART_QMSI_0_NAME INTEL_QMSI_UART_B0002000_LABEL #define CONFIG_UART_QMSI_0_NAME DT_INTEL_QMSI_UART_B0002000_LABEL
#define CONFIG_UART_QMSI_0_IRQ INTEL_QMSI_UART_B0002000_IRQ_0 #define CONFIG_UART_QMSI_0_IRQ DT_INTEL_QMSI_UART_B0002000_IRQ_0
#define CONFIG_UART_QMSI_0_IRQ_PRI INTEL_QMSI_UART_B0002000_IRQ_0_PRIORITY #define CONFIG_UART_QMSI_0_IRQ_PRI DT_INTEL_QMSI_UART_B0002000_IRQ_0_PRIORITY
#define CONFIG_UART_QMSI_1_BAUDRATE INTEL_QMSI_UART_B0002400_CURRENT_SPEED #define CONFIG_UART_QMSI_1_BAUDRATE DT_INTEL_QMSI_UART_B0002400_CURRENT_SPEED
#define CONFIG_UART_QMSI_1_NAME INTEL_QMSI_UART_B0002400_LABEL #define CONFIG_UART_QMSI_1_NAME DT_INTEL_QMSI_UART_B0002400_LABEL
#define CONFIG_UART_QMSI_1_IRQ INTEL_QMSI_UART_B0002400_IRQ_0 #define CONFIG_UART_QMSI_1_IRQ DT_INTEL_QMSI_UART_B0002400_IRQ_0
#define CONFIG_UART_QMSI_1_IRQ_PRI INTEL_QMSI_UART_B0002400_IRQ_0_PRIORITY #define CONFIG_UART_QMSI_1_IRQ_PRI DT_INTEL_QMSI_UART_B0002400_IRQ_0_PRIORITY
#define SRAM_START CONFIG_SRAM_BASE_ADDRESS #define SRAM_START CONFIG_SRAM_BASE_ADDRESS
#define SRAM_SIZE CONFIG_SRAM_SIZE #define SRAM_SIZE CONFIG_SRAM_SIZE
@ -16,84 +16,84 @@
#define FLASH_START CONFIG_FLASH_BASE_ADDRESS #define FLASH_START CONFIG_FLASH_BASE_ADDRESS
#define FLASH_SIZE CONFIG_FLASH_SIZE #define FLASH_SIZE CONFIG_FLASH_SIZE
#define CONFIG_DCCM_BASE_ADDRESS ARC_DCCM_80000000_BASE_ADDRESS #define CONFIG_DCCM_BASE_ADDRESS DT_ARC_DCCM_80000000_BASE_ADDRESS
#define CONFIG_DCCM_SIZE (ARC_DCCM_80000000_SIZE >> 10) #define CONFIG_DCCM_SIZE (DT_ARC_DCCM_80000000_SIZE >> 10)
#define CONFIG_I2C_SS_0_NAME INTEL_QMSI_SS_I2C_80012000_LABEL #define CONFIG_I2C_SS_0_NAME DT_INTEL_QMSI_SS_I2C_80012000_LABEL
#define CONFIG_I2C_SS_0_ERR_IRQ INTEL_QMSI_SS_I2C_80012000_IRQ_ERROR #define CONFIG_I2C_SS_0_ERR_IRQ DT_INTEL_QMSI_SS_I2C_80012000_IRQ_ERROR
#define CONFIG_I2C_SS_0_ERR_IRQ_PRI INTEL_QMSI_SS_I2C_80012000_IRQ_ERROR_PRIORITY #define CONFIG_I2C_SS_0_ERR_IRQ_PRI DT_INTEL_QMSI_SS_I2C_80012000_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_SS_0_RX_IRQ INTEL_QMSI_SS_I2C_80012000_IRQ_RX #define CONFIG_I2C_SS_0_RX_IRQ DT_INTEL_QMSI_SS_I2C_80012000_IRQ_RX
#define CONFIG_I2C_SS_0_RX_IRQ_PRI INTEL_QMSI_SS_I2C_80012000_IRQ_RX_PRIORITY #define CONFIG_I2C_SS_0_RX_IRQ_PRI DT_INTEL_QMSI_SS_I2C_80012000_IRQ_RX_PRIORITY
#define CONFIG_I2C_SS_0_TX_IRQ INTEL_QMSI_SS_I2C_80012000_IRQ_TX #define CONFIG_I2C_SS_0_TX_IRQ DT_INTEL_QMSI_SS_I2C_80012000_IRQ_TX
#define CONFIG_I2C_SS_0_TX_IRQ_PRI INTEL_QMSI_SS_I2C_80012000_IRQ_TX_PRIORITY #define CONFIG_I2C_SS_0_TX_IRQ_PRI DT_INTEL_QMSI_SS_I2C_80012000_IRQ_TX_PRIORITY
#define CONFIG_I2C_SS_0_STOP_IRQ INTEL_QMSI_SS_I2C_80012000_IRQ_STOP #define CONFIG_I2C_SS_0_STOP_IRQ DT_INTEL_QMSI_SS_I2C_80012000_IRQ_STOP
#define CONFIG_I2C_SS_0_STOP_IRQ_PRI INTEL_QMSI_SS_I2C_80012000_IRQ_STOP_PRIORITY #define CONFIG_I2C_SS_0_STOP_IRQ_PRI DT_INTEL_QMSI_SS_I2C_80012000_IRQ_STOP_PRIORITY
#define CONFIG_I2C_SS_0_BITRATE INTEL_QMSI_SS_I2C_80012000_CLOCK_FREQUENCY #define CONFIG_I2C_SS_0_BITRATE DT_INTEL_QMSI_SS_I2C_80012000_CLOCK_FREQUENCY
#define CONFIG_I2C_SS_1_NAME INTEL_QMSI_SS_I2C_80012100_LABEL #define CONFIG_I2C_SS_1_NAME DT_INTEL_QMSI_SS_I2C_80012100_LABEL
#define CONFIG_I2C_SS_1_ERR_IRQ INTEL_QMSI_SS_I2C_80012100_IRQ_ERROR #define CONFIG_I2C_SS_1_ERR_IRQ DT_INTEL_QMSI_SS_I2C_80012100_IRQ_ERROR
#define CONFIG_I2C_SS_1_ERR_IRQ_PRI INTEL_QMSI_SS_I2C_80012100_IRQ_ERROR_PRIORITY #define CONFIG_I2C_SS_1_ERR_IRQ_PRI DT_INTEL_QMSI_SS_I2C_80012100_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_SS_1_RX_IRQ INTEL_QMSI_SS_I2C_80012100_IRQ_RX #define CONFIG_I2C_SS_1_RX_IRQ DT_INTEL_QMSI_SS_I2C_80012100_IRQ_RX
#define CONFIG_I2C_SS_1_RX_IRQ_PRI INTEL_QMSI_SS_I2C_80012100_IRQ_RX_PRIORITY #define CONFIG_I2C_SS_1_RX_IRQ_PRI DT_INTEL_QMSI_SS_I2C_80012100_IRQ_RX_PRIORITY
#define CONFIG_I2C_SS_1_TX_IRQ INTEL_QMSI_SS_I2C_80012100_IRQ_TX #define CONFIG_I2C_SS_1_TX_IRQ DT_INTEL_QMSI_SS_I2C_80012100_IRQ_TX
#define CONFIG_I2C_SS_1_TX_IRQ_PRI INTEL_QMSI_SS_I2C_80012100_IRQ_TX_PRIORITY #define CONFIG_I2C_SS_1_TX_IRQ_PRI DT_INTEL_QMSI_SS_I2C_80012100_IRQ_TX_PRIORITY
#define CONFIG_I2C_SS_1_STOP_IRQ INTEL_QMSI_SS_I2C_80012100_IRQ_STOP #define CONFIG_I2C_SS_1_STOP_IRQ DT_INTEL_QMSI_SS_I2C_80012100_IRQ_STOP
#define CONFIG_I2C_SS_1_STOP_IRQ_PRI INTEL_QMSI_SS_I2C_80012100_IRQ_STOP_PRIORITY #define CONFIG_I2C_SS_1_STOP_IRQ_PRI DT_INTEL_QMSI_SS_I2C_80012100_IRQ_STOP_PRIORITY
#define CONFIG_I2C_SS_1_BITRATE INTEL_QMSI_SS_I2C_80012100_CLOCK_FREQUENCY #define CONFIG_I2C_SS_1_BITRATE DT_INTEL_QMSI_SS_I2C_80012100_CLOCK_FREQUENCY
#define CONFIG_I2C_0_NAME INTEL_QMSI_I2C_B0002800_LABEL #define CONFIG_I2C_0_NAME DT_INTEL_QMSI_I2C_B0002800_LABEL
#define CONFIG_I2C_0_BITRATE INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY #define CONFIG_I2C_0_BITRATE DT_INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY
#define CONFIG_I2C_0_IRQ INTEL_QMSI_I2C_B0002800_IRQ_0 #define CONFIG_I2C_0_IRQ DT_INTEL_QMSI_I2C_B0002800_IRQ_0
#define CONFIG_I2C_0_IRQ_PRI INTEL_QMSI_I2C_B0002800_IRQ_0_PRIORITY #define CONFIG_I2C_0_IRQ_PRI DT_INTEL_QMSI_I2C_B0002800_IRQ_0_PRIORITY
#define CONFIG_I2C_1_NAME INTEL_QMSI_I2C_B0002C00_LABEL #define CONFIG_I2C_1_NAME DT_INTEL_QMSI_I2C_B0002C00_LABEL
#define CONFIG_I2C_1_BITRATE INTEL_QMSI_I2C_B0002C00_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_INTEL_QMSI_I2C_B0002C00_CLOCK_FREQUENCY
#define CONFIG_I2C_1_IRQ INTEL_QMSI_I2C_B0002C00_IRQ_0 #define CONFIG_I2C_1_IRQ DT_INTEL_QMSI_I2C_B0002C00_IRQ_0
#define CONFIG_I2C_1_IRQ_PRI INTEL_QMSI_I2C_B0002C00_IRQ_0_PRIORITY #define CONFIG_I2C_1_IRQ_PRI DT_INTEL_QMSI_I2C_B0002C00_IRQ_0_PRIORITY
#define CONFIG_RTC_0_NAME INTEL_QMSI_RTC_B0000400_LABEL #define CONFIG_RTC_0_NAME DT_INTEL_QMSI_RTC_B0000400_LABEL
#define CONFIG_RTC_0_IRQ INTEL_QMSI_RTC_B0000400_IRQ_0 #define CONFIG_RTC_0_IRQ DT_INTEL_QMSI_RTC_B0000400_IRQ_0
#define CONFIG_RTC_0_IRQ_PRI INTEL_QMSI_RTC_B0000400_IRQ_0_PRIORITY #define CONFIG_RTC_0_IRQ_PRI DT_INTEL_QMSI_RTC_B0000400_IRQ_0_PRIORITY
#define CONFIG_GPIO_QMSI_SS_0_NAME INTEL_QMSI_SS_GPIO_80017800_LABEL #define CONFIG_GPIO_QMSI_SS_0_NAME DT_INTEL_QMSI_SS_GPIO_80017800_LABEL
#define CONFIG_GPIO_QMSI_SS_0_IRQ INTEL_QMSI_SS_GPIO_80017800_IRQ_0 #define CONFIG_GPIO_QMSI_SS_0_IRQ DT_INTEL_QMSI_SS_GPIO_80017800_IRQ_0
#define CONFIG_GPIO_QMSI_SS_0_IRQ_PRI INTEL_QMSI_SS_GPIO_80017800_IRQ_0_PRIORITY #define CONFIG_GPIO_QMSI_SS_0_IRQ_PRI DT_INTEL_QMSI_SS_GPIO_80017800_IRQ_0_PRIORITY
#define CONFIG_GPIO_QMSI_SS_1_NAME INTEL_QMSI_SS_GPIO_80017900_LABEL #define CONFIG_GPIO_QMSI_SS_1_NAME DT_INTEL_QMSI_SS_GPIO_80017900_LABEL
#define CONFIG_GPIO_QMSI_SS_1_IRQ INTEL_QMSI_SS_GPIO_80017900_IRQ_0 #define CONFIG_GPIO_QMSI_SS_1_IRQ DT_INTEL_QMSI_SS_GPIO_80017900_IRQ_0
#define CONFIG_GPIO_QMSI_SS_1_IRQ_PRI INTEL_QMSI_SS_GPIO_80017900_IRQ_0_PRIORITY #define CONFIG_GPIO_QMSI_SS_1_IRQ_PRI DT_INTEL_QMSI_SS_GPIO_80017900_IRQ_0_PRIORITY
#define CONFIG_GPIO_QMSI_0_NAME INTEL_QMSI_GPIO_B0000C00_LABEL #define CONFIG_GPIO_QMSI_0_NAME DT_INTEL_QMSI_GPIO_B0000C00_LABEL
#define CONFIG_GPIO_QMSI_0_IRQ INTEL_QMSI_GPIO_B0000C00_IRQ_0 #define CONFIG_GPIO_QMSI_0_IRQ DT_INTEL_QMSI_GPIO_B0000C00_IRQ_0
#define CONFIG_GPIO_QMSI_0_IRQ_PRI INTEL_QMSI_GPIO_B0000C00_IRQ_0_PRIORITY #define CONFIG_GPIO_QMSI_0_IRQ_PRI DT_INTEL_QMSI_GPIO_B0000C00_IRQ_0_PRIORITY
#define CONFIG_GPIO_QMSI_1_NAME INTEL_QMSI_GPIO_B0800B00_LABEL #define CONFIG_GPIO_QMSI_1_NAME DT_INTEL_QMSI_GPIO_B0800B00_LABEL
#define CONFIG_GPIO_QMSI_1_IRQ INTEL_QMSI_GPIO_B0800B00_IRQ_0 #define CONFIG_GPIO_QMSI_1_IRQ DT_INTEL_QMSI_GPIO_B0800B00_IRQ_0
#define CONFIG_GPIO_QMSI_1_IRQ_PRI INTEL_QMSI_GPIO_B0800B00_IRQ_0_PRIORITY #define CONFIG_GPIO_QMSI_1_IRQ_PRI DT_INTEL_QMSI_GPIO_B0800B00_IRQ_0_PRIORITY
#define CONFIG_ADC_0_IRQ SNPS_DW_ADC_80015000_IRQ_NORMAL #define CONFIG_ADC_0_IRQ DT_SNPS_DW_ADC_80015000_IRQ_NORMAL
#define CONFIG_ADC_IRQ_ERR SNPS_DW_ADC_80015000_IRQ_ERROR #define CONFIG_ADC_IRQ_ERR DT_SNPS_DW_ADC_80015000_IRQ_ERROR
#define CONFIG_ADC_0_IRQ_PRI SNPS_DW_ADC_80015000_IRQ_0_PRIORITY #define CONFIG_ADC_0_IRQ_PRI DT_SNPS_DW_ADC_80015000_IRQ_0_PRIORITY
#define CONFIG_ADC_0_NAME SNPS_DW_ADC_80015000_LABEL #define CONFIG_ADC_0_NAME DT_SNPS_DW_ADC_80015000_LABEL
#define CONFIG_ADC_0_BASE_ADDRESS SNPS_DW_ADC_80015000_BASE_ADDRESS #define CONFIG_ADC_0_BASE_ADDRESS DT_SNPS_DW_ADC_80015000_BASE_ADDRESS
#define CONFIG_SPI_0_BASE_ADDRESS SNPS_DESIGNWARE_SPI_80010000_BASE_ADDRESS #define CONFIG_SPI_0_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_80010000_BASE_ADDRESS
#define CONFIG_SPI_0_NAME SNPS_DESIGNWARE_SPI_80010000_LABEL #define CONFIG_SPI_0_NAME DT_SNPS_DESIGNWARE_SPI_80010000_LABEL
#define CONFIG_SPI_0_IRQ_ERR_INT SNPS_DESIGNWARE_SPI_80010000_IRQ_ERR_INT #define CONFIG_SPI_0_IRQ_ERR_INT DT_SNPS_DESIGNWARE_SPI_80010000_IRQ_ERR_INT
#define CONFIG_SPI_0_IRQ_ERR_INT_PRI SNPS_DESIGNWARE_SPI_80010000_IRQ_ERR_INT_PRIORITY #define CONFIG_SPI_0_IRQ_ERR_INT_PRI DT_SNPS_DESIGNWARE_SPI_80010000_IRQ_ERR_INT_PRIORITY
#define CONFIG_SPI_0_IRQ_RX_AVAIL SNPS_DESIGNWARE_SPI_80010000_IRQ_RX_AVAIL #define CONFIG_SPI_0_IRQ_RX_AVAIL DT_SNPS_DESIGNWARE_SPI_80010000_IRQ_RX_AVAIL
#define CONFIG_SPI_0_IRQ_RX_AVAIL_PRI SNPS_DESIGNWARE_SPI_80010000_IRQ_RX_AVAIL_PRIORITY #define CONFIG_SPI_0_IRQ_RX_AVAIL_PRI DT_SNPS_DESIGNWARE_SPI_80010000_IRQ_RX_AVAIL_PRIORITY
#define CONFIG_SPI_0_IRQ_TX_REQ SNPS_DESIGNWARE_SPI_80010000_IRQ_TX_REQ #define CONFIG_SPI_0_IRQ_TX_REQ DT_SNPS_DESIGNWARE_SPI_80010000_IRQ_TX_REQ
#define CONFIG_SPI_0_IRQ_TX_REQ_PRI SNPS_DESIGNWARE_SPI_80010000_IRQ_TX_REQ_PRIORITY #define CONFIG_SPI_0_IRQ_TX_REQ_PRI DT_SNPS_DESIGNWARE_SPI_80010000_IRQ_TX_REQ_PRIORITY
#define CONFIG_SPI_1_BASE_ADDRESS SNPS_DESIGNWARE_SPI_80010100_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_80010100_BASE_ADDRESS
#define CONFIG_SPI_1_NAME SNPS_DESIGNWARE_SPI_80010100_LABEL #define CONFIG_SPI_1_NAME DT_SNPS_DESIGNWARE_SPI_80010100_LABEL
#define CONFIG_SPI_1_IRQ_ERR_INT SNPS_DESIGNWARE_SPI_80010100_IRQ_ERR_INT #define CONFIG_SPI_1_IRQ_ERR_INT DT_SNPS_DESIGNWARE_SPI_80010100_IRQ_ERR_INT
#define CONFIG_SPI_1_IRQ_ERR_INT_PRI SNPS_DESIGNWARE_SPI_80010100_IRQ_ERR_INT_PRIORITY #define CONFIG_SPI_1_IRQ_ERR_INT_PRI DT_SNPS_DESIGNWARE_SPI_80010100_IRQ_ERR_INT_PRIORITY
#define CONFIG_SPI_1_IRQ_RX_AVAIL SNPS_DESIGNWARE_SPI_80010100_IRQ_RX_AVAIL #define CONFIG_SPI_1_IRQ_RX_AVAIL DT_SNPS_DESIGNWARE_SPI_80010100_IRQ_RX_AVAIL
#define CONFIG_SPI_1_IRQ_RX_AVAIL_PRI SNPS_DESIGNWARE_SPI_80010100_IRQ_RX_AVAIL_PRIORITY #define CONFIG_SPI_1_IRQ_RX_AVAIL_PRI DT_SNPS_DESIGNWARE_SPI_80010100_IRQ_RX_AVAIL_PRIORITY
#define CONFIG_SPI_1_IRQ_TX_REQ SNPS_DESIGNWARE_SPI_80010100_IRQ_TX_REQ #define CONFIG_SPI_1_IRQ_TX_REQ DT_SNPS_DESIGNWARE_SPI_80010100_IRQ_TX_REQ
#define CONFIG_SPI_1_IRQ_TX_REQ_PRI SNPS_DESIGNWARE_SPI_80010100_IRQ_TX_REQ_PRIORITY #define CONFIG_SPI_1_IRQ_TX_REQ_PRI DT_SNPS_DESIGNWARE_SPI_80010100_IRQ_TX_REQ_PRIORITY
#define CONFIG_WDT_0_NAME INTEL_QMSI_WATCHDOG_B0000000_LABEL #define CONFIG_WDT_0_NAME DT_INTEL_QMSI_WATCHDOG_B0000000_LABEL
#define CONFIG_WDT_0_IRQ INTEL_QMSI_WATCHDOG_B0000000_IRQ_0 #define CONFIG_WDT_0_IRQ DT_INTEL_QMSI_WATCHDOG_B0000000_IRQ_0
#define CONFIG_WDT_0_IRQ_PRI INTEL_QMSI_WATCHDOG_B0000000_IRQ_0_PRIORITY #define CONFIG_WDT_0_IRQ_PRI DT_INTEL_QMSI_WATCHDOG_B0000000_IRQ_0_PRIORITY
#define CONFIG_WDT_0_IRQ_FLAGS 0 #define CONFIG_WDT_0_IRQ_FLAGS 0
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

118
soc/arc/snps_emsk/dts_fixup.h
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@ -1,8 +1,8 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
/* CCM configuration */ /* CCM configuration */
#define CONFIG_DCCM_BASE_ADDRESS ARC_DCCM_80000000_BASE_ADDRESS #define CONFIG_DCCM_BASE_ADDRESS DT_ARC_DCCM_80000000_BASE_ADDRESS
#define CONFIG_DCCM_SIZE (ARC_DCCM_80000000_SIZE >> 10) #define CONFIG_DCCM_SIZE (DT_ARC_DCCM_80000000_SIZE >> 10)
#define CONFIG_ICCM_BASE_ADDRESS ARC_ICCM_0_BASE_ADDRESS #define CONFIG_ICCM_BASE_ADDRESS ARC_ICCM_0_BASE_ADDRESS
#define CONFIG_ICCM_SIZE (ARC_ICCM_0_SIZE >> 10) #define CONFIG_ICCM_SIZE (ARC_ICCM_0_SIZE >> 10)
@ -10,92 +10,92 @@
/* /*
* UART configuration * UART configuration
*/ */
#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_F0008000_BASE_ADDRESS #define CONFIG_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_F0008000_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_F0008000_IRQ_0 #define CONFIG_UART_NS16550_PORT_0_IRQ DT_NS16550_F0008000_IRQ_0
#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_F0008000_CLOCK_FREQUENCY #define CONFIG_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_F0008000_CLOCK_FREQUENCY
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_F0008000_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_F0008000_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_F0008000_LABEL #define CONFIG_UART_NS16550_PORT_0_NAME DT_NS16550_F0008000_LABEL
#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_F0008000_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_F0008000_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_F0009000_BASE_ADDRESS #define CONFIG_UART_NS16550_PORT_1_BASE_ADDR DT_NS16550_F0009000_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_F0009000_IRQ_0 #define CONFIG_UART_NS16550_PORT_1_IRQ DT_NS16550_F0009000_IRQ_0
#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ NS16550_F0009000_CLOCK_FREQUENCY #define CONFIG_UART_NS16550_PORT_1_CLK_FREQ DT_NS16550_F0009000_CLOCK_FREQUENCY
#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_F0009000_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_1_BAUD_RATE DT_NS16550_F0009000_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_F0009000_LABEL #define CONFIG_UART_NS16550_PORT_1_NAME DT_NS16550_F0009000_LABEL
#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_F0009000_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_F0009000_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_2_BASE_ADDR NS16550_F000A000_BASE_ADDRESS #define CONFIG_UART_NS16550_PORT_2_BASE_ADDR DT_NS16550_F000A000_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_2_IRQ NS16550_F000A000_IRQ_0 #define CONFIG_UART_NS16550_PORT_2_IRQ DT_NS16550_F000A000_IRQ_0
#define CONFIG_UART_NS16550_PORT_2_CLK_FREQ NS16550_F000A000_CLOCK_FREQUENCY #define CONFIG_UART_NS16550_PORT_2_CLK_FREQ DT_NS16550_F000A000_CLOCK_FREQUENCY
#define CONFIG_UART_NS16550_PORT_2_BAUD_RATE NS16550_F000A000_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_2_BAUD_RATE DT_NS16550_F000A000_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_2_NAME NS16550_F000A000_LABEL #define CONFIG_UART_NS16550_PORT_2_NAME DT_NS16550_F000A000_LABEL
#define CONFIG_UART_NS16550_PORT_2_IRQ_PRI NS16550_F000A000_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_2_IRQ_PRI DT_NS16550_F000A000_IRQ_0_PRIORITY
/* /*
* I2C configuration * I2C configuration
*/ */
/* I2C_0 is on Pmod2 connector */ /* I2C_0 is on Pmod2 connector */
#define CONFIG_I2C_0_BASE_ADDR SNPS_DESIGNWARE_I2C_F0004000_BASE_ADDRESS #define CONFIG_I2C_0_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_F0004000_BASE_ADDRESS
#define CONFIG_I2C_0_BITRATE SNPS_DESIGNWARE_I2C_F0004000_CLOCK_FREQUENCY #define CONFIG_I2C_0_BITRATE DT_SNPS_DESIGNWARE_I2C_F0004000_CLOCK_FREQUENCY
#define CONFIG_I2C_0_IRQ SNPS_DESIGNWARE_I2C_F0004000_IRQ_0 #define CONFIG_I2C_0_IRQ DT_SNPS_DESIGNWARE_I2C_F0004000_IRQ_0
#define CONFIG_I2C_0_IRQ_PRI SNPS_DESIGNWARE_I2C_F0004000_IRQ_0_PRIORITY #define CONFIG_I2C_0_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_F0004000_IRQ_0_PRIORITY
#define CONFIG_I2C_0_NAME SNPS_DESIGNWARE_I2C_F0004000_LABEL #define CONFIG_I2C_0_NAME DT_SNPS_DESIGNWARE_I2C_F0004000_LABEL
#define CONFIG_I2C_0_IRQ_FLAGS 0 #define CONFIG_I2C_0_IRQ_FLAGS 0
/* I2C_1 is on Pmod4 connector */ /* I2C_1 is on Pmod4 connector */
#define CONFIG_I2C_1_BASE_ADDR SNPS_DESIGNWARE_I2C_F0005000_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_F0005000_BASE_ADDRESS
#define CONFIG_I2C_1_BITRATE SNPS_DESIGNWARE_I2C_F0005000_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_SNPS_DESIGNWARE_I2C_F0005000_CLOCK_FREQUENCY
#define CONFIG_I2C_1_IRQ SNPS_DESIGNWARE_I2C_F0005000_IRQ_0 #define CONFIG_I2C_1_IRQ DT_SNPS_DESIGNWARE_I2C_F0005000_IRQ_0
#define CONFIG_I2C_1_IRQ_PRI SNPS_DESIGNWARE_I2C_F0005000_IRQ_0_PRIORITY #define CONFIG_I2C_1_IRQ_PRI DT_SNPS_DESIGNWARE_I2C_F0005000_IRQ_0_PRIORITY
#define CONFIG_I2C_1_NAME SNPS_DESIGNWARE_I2C_F0005000_LABEL #define CONFIG_I2C_1_NAME DT_SNPS_DESIGNWARE_I2C_F0005000_LABEL
#define CONFIG_I2C_1_IRQ_FLAGS 0 #define CONFIG_I2C_1_IRQ_FLAGS 0
/* /*
* GPIO configuration * GPIO configuration
*/ */
#define GPIO_DW_0_BASE_ADDR SNPS_DESIGNWARE_GPIO_F0002000_BASE_ADDRESS #define GPIO_DW_0_BASE_ADDR DT_SNPS_DESIGNWARE_GPIO_F0002000_BASE_ADDRESS
#define GPIO_DW_0_BITS SNPS_DESIGNWARE_GPIO_F0002000_BITS #define GPIO_DW_0_BITS DT_SNPS_DESIGNWARE_GPIO_F0002000_BITS
#define CONFIG_GPIO_DW_0_NAME SNPS_DESIGNWARE_GPIO_F0002000_LABEL #define CONFIG_GPIO_DW_0_NAME DT_SNPS_DESIGNWARE_GPIO_F0002000_LABEL
#define GPIO_DW_0_IRQ SNPS_DESIGNWARE_GPIO_F0002000_IRQ_0 #define GPIO_DW_0_IRQ DT_SNPS_DESIGNWARE_GPIO_F0002000_IRQ_0
#define CONFIG_GPIO_DW_0_IRQ_PRI SNPS_DESIGNWARE_GPIO_F0002000_IRQ_0_PRIORITY #define CONFIG_GPIO_DW_0_IRQ_PRI DT_SNPS_DESIGNWARE_GPIO_F0002000_IRQ_0_PRIORITY
#define GPIO_DW_0_IRQ_FLAGS 0 #define GPIO_DW_0_IRQ_FLAGS 0
#define GPIO_DW_1_BASE_ADDR SNPS_DESIGNWARE_GPIO_F000200C_BASE_ADDRESS #define GPIO_DW_1_BASE_ADDR DT_SNPS_DESIGNWARE_GPIO_F000200C_BASE_ADDRESS
#define GPIO_DW_1_BITS SNPS_DESIGNWARE_GPIO_F000200C_BITS #define GPIO_DW_1_BITS DT_SNPS_DESIGNWARE_GPIO_F000200C_BITS
#define CONFIG_GPIO_DW_1_NAME SNPS_DESIGNWARE_GPIO_F000200C_LABEL #define CONFIG_GPIO_DW_1_NAME DT_SNPS_DESIGNWARE_GPIO_F000200C_LABEL
#define GPIO_DW_1_IRQ SNPS_DESIGNWARE_GPIO_F000200C_IRQ_0 #define GPIO_DW_1_IRQ DT_SNPS_DESIGNWARE_GPIO_F000200C_IRQ_0
#define CONFIG_GPIO_DW_1_IRQ_PRI SNPS_DESIGNWARE_GPIO_F000200C_IRQ_0_PRIORITY #define CONFIG_GPIO_DW_1_IRQ_PRI DT_SNPS_DESIGNWARE_GPIO_F000200C_IRQ_0_PRIORITY
#define GPIO_DW_2_BASE_ADDR SNPS_DESIGNWARE_GPIO_F0002018_BASE_ADDRESS #define GPIO_DW_2_BASE_ADDR DT_SNPS_DESIGNWARE_GPIO_F0002018_BASE_ADDRESS
#define GPIO_DW_2_BITS SNPS_DESIGNWARE_GPIO_F0002018_BITS #define GPIO_DW_2_BITS DT_SNPS_DESIGNWARE_GPIO_F0002018_BITS
#define CONFIG_GPIO_DW_2_NAME SNPS_DESIGNWARE_GPIO_F0002018_LABEL #define CONFIG_GPIO_DW_2_NAME DT_SNPS_DESIGNWARE_GPIO_F0002018_LABEL
#define GPIO_DW_2_IRQ SNPS_DESIGNWARE_GPIO_F0002018_IRQ_0 #define GPIO_DW_2_IRQ DT_SNPS_DESIGNWARE_GPIO_F0002018_IRQ_0
#define CONFIG_GPIO_DW_2_IRQ_PRI SNPS_DESIGNWARE_GPIO_F0002018_IRQ_0_PRIORITY #define CONFIG_GPIO_DW_2_IRQ_PRI DT_SNPS_DESIGNWARE_GPIO_F0002018_IRQ_0_PRIORITY
#define GPIO_DW_3_BASE_ADDR SNPS_DESIGNWARE_GPIO_F0002024_BASE_ADDRESS #define GPIO_DW_3_BASE_ADDR DT_SNPS_DESIGNWARE_GPIO_F0002024_BASE_ADDRESS
#define GPIO_DW_3_BITS SNPS_DESIGNWARE_GPIO_F0002024_BITS #define GPIO_DW_3_BITS DT_SNPS_DESIGNWARE_GPIO_F0002024_BITS
#define CONFIG_GPIO_DW_3_NAME SNPS_DESIGNWARE_GPIO_F0002024_LABEL #define CONFIG_GPIO_DW_3_NAME DT_SNPS_DESIGNWARE_GPIO_F0002024_LABEL
#define GPIO_DW_3_IRQ SNPS_DESIGNWARE_GPIO_F0002024_IRQ_0 #define GPIO_DW_3_IRQ DT_SNPS_DESIGNWARE_GPIO_F0002024_IRQ_0
#define CONFIG_GPIO_DW_3_IRQ_PRI SNPS_DESIGNWARE_GPIO_F0002024_IRQ_0_PRIORITY #define CONFIG_GPIO_DW_3_IRQ_PRI DT_SNPS_DESIGNWARE_GPIO_F0002024_IRQ_0_PRIORITY
/* /*
* SPI configuration * SPI configuration
*/ */
#define CONFIG_SPI_0_BASE_ADDRESS SNPS_DESIGNWARE_SPI_F0006000_BASE_ADDRESS #define CONFIG_SPI_0_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_F0006000_BASE_ADDRESS
#define CONFIG_SPI_0_NAME SNPS_DESIGNWARE_SPI_F0006000_LABEL #define CONFIG_SPI_0_NAME DT_SNPS_DESIGNWARE_SPI_F0006000_LABEL
#define CONFIG_SPI_0_IRQ SNPS_DESIGNWARE_SPI_F0006000_IRQ_0 #define CONFIG_SPI_0_IRQ DT_SNPS_DESIGNWARE_SPI_F0006000_IRQ_0
#define CONFIG_SPI_0_IRQ_PRI SNPS_DESIGNWARE_SPI_F0006000_IRQ_0_PRIORITY #define CONFIG_SPI_0_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_F0006000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_BASE_ADDRESS SNPS_DESIGNWARE_SPI_F0007000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_F0007000_BASE_ADDRESS
#define CONFIG_SPI_1_NAME SNPS_DESIGNWARE_SPI_F0007000_LABEL #define CONFIG_SPI_1_NAME DT_SNPS_DESIGNWARE_SPI_F0007000_LABEL
#define CONFIG_SPI_1_IRQ SNPS_DESIGNWARE_SPI_F0007000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_SNPS_DESIGNWARE_SPI_F0007000_IRQ_0
#define CONFIG_SPI_1_IRQ_PRI SNPS_DESIGNWARE_SPI_F0007000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_F0007000_IRQ_0_PRIORITY
#define SPI_DW_IRQ_FLAGS 0 #define SPI_DW_IRQ_FLAGS 0
#define SPI_DW_SPI_CLOCK NS16550_F0009000_CLOCK_FREQUENCY #define SPI_DW_SPI_CLOCK DT_NS16550_F0009000_CLOCK_FREQUENCY
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

4
soc/arc/snps_nsim/dts_fixup.h
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@ -1,8 +1,8 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
/* CCM configuration */ /* CCM configuration */
#define CONFIG_DCCM_BASE_ADDRESS ARC_DCCM_80000000_BASE_ADDRESS #define CONFIG_DCCM_BASE_ADDRESS DT_ARC_DCCM_80000000_BASE_ADDRESS
#define CONFIG_DCCM_SIZE (ARC_DCCM_80000000_SIZE >> 10) #define CONFIG_DCCM_SIZE (DT_ARC_DCCM_80000000_SIZE >> 10)
#define CONFIG_ICCM_BASE_ADDRESS ARC_ICCM_0_BASE_ADDRESS #define CONFIG_ICCM_BASE_ADDRESS ARC_ICCM_0_BASE_ADDRESS
#define CONFIG_ICCM_SIZE (ARC_ICCM_0_SIZE >> 10) #define CONFIG_ICCM_SIZE (ARC_ICCM_0_SIZE >> 10)

52
soc/arm/arm/beetle/dts_fixup.h
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@ -1,45 +1,45 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
/* CMSDK APB Timers */ /* CMSDK APB Timers */
#define CMSDK_APB_TIMER0 ARM_CMSDK_TIMER_40000000_BASE_ADDRESS #define CMSDK_APB_TIMER0 DT_ARM_CMSDK_TIMER_40000000_BASE_ADDRESS
#define CMSDK_APB_TIMER_0_IRQ ARM_CMSDK_TIMER_40000000_IRQ_0 #define CMSDK_APB_TIMER_0_IRQ DT_ARM_CMSDK_TIMER_40000000_IRQ_0
#define CMSDK_APB_TIMER1 ARM_CMSDK_TIMER_40001000_BASE_ADDRESS #define CMSDK_APB_TIMER1 DT_ARM_CMSDK_TIMER_40001000_BASE_ADDRESS
#define CMSDK_APB_TIMER_1_IRQ IRQ_TIMER1 ARM_CMSDK_TIMER_40001000_IRQ_0 #define CMSDK_APB_TIMER_1_IRQ IRQ_TIMER1 DT_ARM_CMSDK_TIMER_40001000_IRQ_0
/* CMSDK APB Dual Timer */ /* CMSDK APB Dual Timer */
#define CMSDK_APB_DTIMER ARM_CMSDK_DTIMER_40002000_BASE_ADDRESS #define CMSDK_APB_DTIMER DT_ARM_CMSDK_DTIMER_40002000_BASE_ADDRESS
#define CMSDK_APB_DUALTIMER_IRQ ARM_CMSDK_DTIMER_40002000_IRQ_0 #define CMSDK_APB_DUALTIMER_IRQ DT_ARM_CMSDK_DTIMER_40002000_IRQ_0
/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */ /* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */
#define CMSDK_APB_UART0 ARM_CMSDK_UART_40004000_BASE_ADDRESS #define CMSDK_APB_UART0 DT_ARM_CMSDK_UART_40004000_BASE_ADDRESS
#define CMSDK_APB_UART_0_IRQ ARM_CMSDK_UART_40004000_IRQ_0 #define CMSDK_APB_UART_0_IRQ DT_ARM_CMSDK_UART_40004000_IRQ_0
#define CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI ARM_CMSDK_UART_40004000_IRQ_0_PRIORITY #define CONFIG_UART_CMSDK_APB_PORT0_IRQ_PRI DT_ARM_CMSDK_UART_40004000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT0_BAUD_RATE ARM_CMSDK_UART_40004000_CURRENT_SPEED #define CONFIG_UART_CMSDK_APB_PORT0_BAUD_RATE DT_ARM_CMSDK_UART_40004000_CURRENT_SPEED
#define CONFIG_UART_CMSDK_APB_PORT0_NAME ARM_CMSDK_UART_40004000_LABEL #define CONFIG_UART_CMSDK_APB_PORT0_NAME DT_ARM_CMSDK_UART_40004000_LABEL
#define CMSDK_APB_UART1 ARM_CMSDK_UART_40005000_BASE_ADDRESS #define CMSDK_APB_UART1 DT_ARM_CMSDK_UART_40005000_BASE_ADDRESS
#define CMSDK_APB_UART_1_IRQ ARM_CMSDK_UART_40005000_IRQ_0 #define CMSDK_APB_UART_1_IRQ DT_ARM_CMSDK_UART_40005000_IRQ_0
#define CONFIG_UART_CMSDK_APB_PORT1_IRQ_PRI ARM_CMSDK_UART_40005000_IRQ_0_PRIORITY #define CONFIG_UART_CMSDK_APB_PORT1_IRQ_PRI DT_ARM_CMSDK_UART_40005000_IRQ_0_PRIORITY
#define CONFIG_UART_CMSDK_APB_PORT1_BAUD_RATE ARM_CMSDK_UART_40005000_CURRENT_SPEED #define CONFIG_UART_CMSDK_APB_PORT1_BAUD_RATE DT_ARM_CMSDK_UART_40005000_CURRENT_SPEED
#define CONFIG_UART_CMSDK_APB_PORT1_NAME ARM_CMSDK_UART_40005000_LABEL #define CONFIG_UART_CMSDK_APB_PORT1_NAME DT_ARM_CMSDK_UART_40005000_LABEL
/* CMSDK APB Watchdog */ /* CMSDK APB Watchdog */
#define CMSDK_APB_WDOG ARM_CMSDK_WATCHDOG_40008000_BASE_ADDRESS #define CMSDK_APB_WDOG DT_ARM_CMSDK_WATCHDOG_40008000_BASE_ADDRESS
/* CMSDK AHB General Purpose Input/Output (GPIO) */ /* CMSDK AHB General Purpose Input/Output (GPIO) */
#define CMSDK_AHB_GPIO0 ARM_CMSDK_GPIO_40010000_BASE_ADDRESS #define CMSDK_AHB_GPIO0 DT_ARM_CMSDK_GPIO_40010000_BASE_ADDRESS
#define IRQ_PORT0_ALL ARM_CMSDK_GPIO_40010000_IRQ_0 #define IRQ_PORT0_ALL DT_ARM_CMSDK_GPIO_40010000_IRQ_0
#define CMSDK_AHB_GPIO1 ARM_CMSDK_GPIO_40011000_BASE_ADDRESS #define CMSDK_AHB_GPIO1 DT_ARM_CMSDK_GPIO_40011000_BASE_ADDRESS
#define IRQ_PORT1_ALL ARM_CMSDK_GPIO_40011000_IRQ_0 #define IRQ_PORT1_ALL DT_ARM_CMSDK_GPIO_40011000_IRQ_0
#define CMSDK_AHB_GPIO2 ARM_CMSDK_GPIO_40012000_BASE_ADDRESS #define CMSDK_AHB_GPIO2 DT_ARM_CMSDK_GPIO_40012000_BASE_ADDRESS
#define IRQ_PORT2_ALL ARM_CMSDK_GPIO_40012000_IRQ_0 #define IRQ_PORT2_ALL DT_ARM_CMSDK_GPIO_40012000_IRQ_0
#define CMSDK_AHB_GPIO3 ARM_CMSDK_GPIO_40013000_BASE_ADDRESS #define CMSDK_AHB_GPIO3 DT_ARM_CMSDK_GPIO_40013000_BASE_ADDRESS
#define IRQ_PORT3_ALL ARM_CMSDK_GPIO_40013000_IRQ_0 #define IRQ_PORT3_ALL DT_ARM_CMSDK_GPIO_40013000_IRQ_0
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

58
soc/arm/atmel_sam/sam3x/dts_fixup.h
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@ -6,38 +6,38 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_I2C_0_BASE_ADDRESS ATMEL_SAM_I2C_TWI_4008C000_BASE_ADDRESS #define CONFIG_I2C_0_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_4008C000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME ATMEL_SAM_I2C_TWI_4008C000_LABEL #define CONFIG_I2C_0_NAME DT_ATMEL_SAM_I2C_TWI_4008C000_LABEL
#define CONFIG_I2C_0_BITRATE ATMEL_SAM_I2C_TWI_4008C000_CLOCK_FREQUENCY #define CONFIG_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWI_4008C000_CLOCK_FREQUENCY
#define CONFIG_I2C_0_IRQ ATMEL_SAM_I2C_TWI_4008C000_IRQ_0 #define CONFIG_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWI_4008C000_IRQ_0
#define CONFIG_I2C_0_IRQ_PRI ATMEL_SAM_I2C_TWI_4008C000_IRQ_0_PRIORITY #define CONFIG_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_4008C000_IRQ_0_PRIORITY
#define CONFIG_I2C_0_PERIPHERAL_ID ATMEL_SAM_I2C_TWI_4008C000_PERIPHERAL_ID #define CONFIG_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWI_4008C000_PERIPHERAL_ID
#define CONFIG_I2C_1_BASE_ADDRESS ATMEL_SAM_I2C_TWI_40090000_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_40090000_BASE_ADDRESS
#define CONFIG_I2C_1_NAME ATMEL_SAM_I2C_TWI_40090000_LABEL #define CONFIG_I2C_1_NAME DT_ATMEL_SAM_I2C_TWI_40090000_LABEL
#define CONFIG_I2C_1_BITRATE ATMEL_SAM_I2C_TWI_40090000_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWI_40090000_CLOCK_FREQUENCY
#define CONFIG_I2C_1_IRQ ATMEL_SAM_I2C_TWI_40090000_IRQ_0 #define CONFIG_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWI_40090000_IRQ_0
#define CONFIG_I2C_1_IRQ_PRI ATMEL_SAM_I2C_TWI_40090000_IRQ_0_PRIORITY #define CONFIG_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_40090000_IRQ_0_PRIORITY
#define CONFIG_I2C_1_PERIPHERAL_ID ATMEL_SAM_I2C_TWI_40090000_PERIPHERAL_ID #define CONFIG_I2C_1_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWI_40090000_PERIPHERAL_ID
#define CONFIG_UART_SAM_PORT_0_NAME ATMEL_SAM_UART_400E0800_LABEL #define CONFIG_UART_SAM_PORT_0_NAME DT_ATMEL_SAM_UART_400E0800_LABEL
#define CONFIG_UART_SAM_PORT_0_BAUD_RATE ATMEL_SAM_UART_400E0800_CURRENT_SPEED #define CONFIG_UART_SAM_PORT_0_BAUD_RATE DT_ATMEL_SAM_UART_400E0800_CURRENT_SPEED
#define CONFIG_UART_SAM_PORT_0_IRQ ATMEL_SAM_UART_400E0800_IRQ_0 #define CONFIG_UART_SAM_PORT_0_IRQ DT_ATMEL_SAM_UART_400E0800_IRQ_0
#define CONFIG_UART_SAM_PORT_0_IRQ_PRIO ATMEL_SAM_UART_400E0800_IRQ_0_PRIORITY #define CONFIG_UART_SAM_PORT_0_IRQ_PRIO DT_ATMEL_SAM_UART_400E0800_IRQ_0_PRIORITY
#define CONFIG_USART_SAM_PORT_0_NAME ATMEL_SAM_USART_40098000_LABEL #define CONFIG_USART_SAM_PORT_0_NAME DT_ATMEL_SAM_USART_40098000_LABEL
#define CONFIG_USART_SAM_PORT_0_BAUD_RATE ATMEL_SAM_USART_40098000_CURRENT_SPEED #define CONFIG_USART_SAM_PORT_0_BAUD_RATE DT_ATMEL_SAM_USART_40098000_CURRENT_SPEED
#define CONFIG_USART_SAM_PORT_1_NAME ATMEL_SAM_USART_4009C000_LABEL #define CONFIG_USART_SAM_PORT_1_NAME DT_ATMEL_SAM_USART_4009C000_LABEL
#define CONFIG_USART_SAM_PORT_1_BAUD_RATE ATMEL_SAM_USART_4009C000_CURRENT_SPEED #define CONFIG_USART_SAM_PORT_1_BAUD_RATE DT_ATMEL_SAM_USART_4009C000_CURRENT_SPEED
#define CONFIG_USART_SAM_PORT_2_NAME ATMEL_SAM_USART_400A0000_LABEL #define CONFIG_USART_SAM_PORT_2_NAME DT_ATMEL_SAM_USART_400A0000_LABEL
#define CONFIG_USART_SAM_PORT_2_BAUD_RATE ATMEL_SAM_USART_400A0000_CURRENT_SPEED #define CONFIG_USART_SAM_PORT_2_BAUD_RATE DT_ATMEL_SAM_USART_400A0000_CURRENT_SPEED
#define CONFIG_USART_SAM_PORT_3_NAME ATMEL_SAM_USART_400A4000_LABEL #define CONFIG_USART_SAM_PORT_3_NAME DT_ATMEL_SAM_USART_400A4000_LABEL
#define CONFIG_USART_SAM_PORT_3_BAUD_RATE ATMEL_SAM_USART_400A4000_CURRENT_SPEED #define CONFIG_USART_SAM_PORT_3_BAUD_RATE DT_ATMEL_SAM_USART_400A4000_CURRENT_SPEED
#define CONFIG_WDT_SAM_IRQ ATMEL_SAM_WATCHDOG_400E1A50_IRQ_0 #define CONFIG_WDT_SAM_IRQ DT_ATMEL_SAM_WATCHDOG_400E1A50_IRQ_0
#define CONFIG_WDT_SAM_IRQ_PRIORITY ATMEL_SAM_WATCHDOG_400E1A50_IRQ_0_PRIORITY #define CONFIG_WDT_SAM_IRQ_PRIORITY DT_ATMEL_SAM_WATCHDOG_400E1A50_IRQ_0_PRIORITY
#define CONFIG_WDT_SAM_LABEL ATMEL_SAM_WATCHDOG_400E1A50_LABEL #define CONFIG_WDT_SAM_LABEL DT_ATMEL_SAM_WATCHDOG_400E1A50_LABEL
#define CONFIG_WDT_SAM_BASE_ADDRESS ATMEL_SAM_WATCHDOG_400E1A50_BASE_ADDRESS #define CONFIG_WDT_SAM_BASE_ADDRESS DT_ATMEL_SAM_WATCHDOG_400E1A50_BASE_ADDRESS
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

88
soc/arm/atmel_sam/sam4s/dts_fixup.h
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@ -6,52 +6,52 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_GPIO_SAM_PORTA_LABEL ATMEL_SAM_GPIO_400E0E00_LABEL #define CONFIG_GPIO_SAM_PORTA_LABEL DT_ATMEL_SAM_GPIO_400E0E00_LABEL
#define CONFIG_GPIO_SAM_PORTA_BASE_ADDRESS ATMEL_SAM_GPIO_400E0E00_BASE_ADDRESS #define CONFIG_GPIO_SAM_PORTA_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E0E00_BASE_ADDRESS
#define CONFIG_GPIO_SAM_PORTA_IRQ ATMEL_SAM_GPIO_400E0E00_IRQ_0 #define CONFIG_GPIO_SAM_PORTA_IRQ DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0
#define CONFIG_GPIO_SAM_PORTA_IRQ_PRIO ATMEL_SAM_GPIO_400E0E00_IRQ_0_PRIORITY #define CONFIG_GPIO_SAM_PORTA_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0_PRIORITY
#define CONFIG_GPIO_SAM_PORTA_PERIPHERAL_ID ATMEL_SAM_GPIO_400E0E00_PERIPHERAL_ID #define CONFIG_GPIO_SAM_PORTA_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E0E00_PERIPHERAL_ID
#define CONFIG_GPIO_SAM_PORTB_LABEL ATMEL_SAM_GPIO_400E1000_LABEL #define CONFIG_GPIO_SAM_PORTB_LABEL DT_ATMEL_SAM_GPIO_400E1000_LABEL
#define CONFIG_GPIO_SAM_PORTB_BASE_ADDRESS ATMEL_SAM_GPIO_400E1000_BASE_ADDRESS #define CONFIG_GPIO_SAM_PORTB_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1000_BASE_ADDRESS
#define CONFIG_GPIO_SAM_PORTB_IRQ ATMEL_SAM_GPIO_400E1000_IRQ_0 #define CONFIG_GPIO_SAM_PORTB_IRQ DT_ATMEL_SAM_GPIO_400E1000_IRQ_0
#define CONFIG_GPIO_SAM_PORTB_IRQ_PRIO ATMEL_SAM_GPIO_400E1000_IRQ_0_PRIORITY #define CONFIG_GPIO_SAM_PORTB_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1000_IRQ_0_PRIORITY
#define CONFIG_GPIO_SAM_PORTB_PERIPHERAL_ID ATMEL_SAM_GPIO_400E1000_PERIPHERAL_ID #define CONFIG_GPIO_SAM_PORTB_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1000_PERIPHERAL_ID
#define CONFIG_GPIO_SAM_PORTC_LABEL ATMEL_SAM_GPIO_400E1200_LABEL #define CONFIG_GPIO_SAM_PORTC_LABEL DT_ATMEL_SAM_GPIO_400E1200_LABEL
#define CONFIG_GPIO_SAM_PORTC_BASE_ADDRESS ATMEL_SAM_GPIO_400E1200_BASE_ADDRESS #define CONFIG_GPIO_SAM_PORTC_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1200_BASE_ADDRESS
#define CONFIG_GPIO_SAM_PORTC_IRQ ATMEL_SAM_GPIO_400E1200_IRQ_0 #define CONFIG_GPIO_SAM_PORTC_IRQ DT_ATMEL_SAM_GPIO_400E1200_IRQ_0
#define CONFIG_GPIO_SAM_PORTC_IRQ_PRIO ATMEL_SAM_GPIO_400E1200_IRQ_0_PRIORITY #define CONFIG_GPIO_SAM_PORTC_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1200_IRQ_0_PRIORITY
#define CONFIG_GPIO_SAM_PORTC_PERIPHERAL_ID ATMEL_SAM_GPIO_400E1200_PERIPHERAL_ID #define CONFIG_GPIO_SAM_PORTC_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1200_PERIPHERAL_ID
#define CONFIG_I2C_0_BASE_ADDRESS ATMEL_SAM_I2C_TWI_40018000_BASE_ADDRESS #define CONFIG_I2C_0_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_40018000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME ATMEL_SAM_I2C_TWI_40018000_LABEL #define CONFIG_I2C_0_NAME DT_ATMEL_SAM_I2C_TWI_40018000_LABEL
#define CONFIG_I2C_0_BITRATE ATMEL_SAM_I2C_TWI_40018000_CLOCK_FREQUENCY #define CONFIG_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWI_40018000_CLOCK_FREQUENCY
#define CONFIG_I2C_0_IRQ ATMEL_SAM_I2C_TWI_40018000_IRQ_0 #define CONFIG_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWI_40018000_IRQ_0
#define CONFIG_I2C_0_IRQ_PRI ATMEL_SAM_I2C_TWI_40018000_IRQ_0_PRIORITY #define CONFIG_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_40018000_IRQ_0_PRIORITY
#define CONFIG_I2C_0_PERIPHERAL_ID ATMEL_SAM_I2C_TWI_40018000_PERIPHERAL_ID #define CONFIG_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWI_40018000_PERIPHERAL_ID
#define CONFIG_I2C_1_BASE_ADDRESS ATMEL_SAM_I2C_TWI_4001C000_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_4001C000_BASE_ADDRESS
#define CONFIG_I2C_1_NAME ATMEL_SAM_I2C_TWI_4001C000_LABEL #define CONFIG_I2C_1_NAME DT_ATMEL_SAM_I2C_TWI_4001C000_LABEL
#define CONFIG_I2C_1_BITRATE ATMEL_SAM_I2C_TWI_4001C000_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWI_4001C000_CLOCK_FREQUENCY
#define CONFIG_I2C_1_IRQ ATMEL_SAM_I2C_TWI_4001C000_IRQ_0 #define CONFIG_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWI_4001C000_IRQ_0
#define CONFIG_I2C_1_IRQ_PRI ATMEL_SAM_I2C_TWI_4001C000_IRQ_0_PRIORITY #define CONFIG_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWI_4001C000_IRQ_0_PRIORITY
#define CONFIG_I2C_1_PERIPHERAL_ID ATMEL_SAM_I2C_TWI_4001C000_PERIPHERAL_ID #define CONFIG_I2C_1_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWI_4001C000_PERIPHERAL_ID
#define CONFIG_UART_SAM_PORT_0_NAME ATMEL_SAM_UART_400E0600_LABEL #define CONFIG_UART_SAM_PORT_0_NAME DT_ATMEL_SAM_UART_400E0600_LABEL
#define CONFIG_UART_SAM_PORT_0_BAUD_RATE ATMEL_SAM_UART_400E0600_CURRENT_SPEED #define CONFIG_UART_SAM_PORT_0_BAUD_RATE DT_ATMEL_SAM_UART_400E0600_CURRENT_SPEED
#define CONFIG_UART_SAM_PORT_0_IRQ ATMEL_SAM_UART_400E0600_IRQ_0 #define CONFIG_UART_SAM_PORT_0_IRQ DT_ATMEL_SAM_UART_400E0600_IRQ_0
#define CONFIG_UART_SAM_PORT_0_IRQ_PRIO ATMEL_SAM_UART_400E0600_IRQ_0_PRIORITY #define CONFIG_UART_SAM_PORT_0_IRQ_PRIO DT_ATMEL_SAM_UART_400E0600_IRQ_0_PRIORITY
#define CONFIG_UART_SAM_PORT_1_NAME ATMEL_SAM_UART_400E0800_LABEL #define CONFIG_UART_SAM_PORT_1_NAME DT_ATMEL_SAM_UART_400E0800_LABEL
#define CONFIG_UART_SAM_PORT_1_BAUD_RATE ATMEL_SAM_UART_400E0800_CURRENT_SPEED #define CONFIG_UART_SAM_PORT_1_BAUD_RATE DT_ATMEL_SAM_UART_400E0800_CURRENT_SPEED
#define CONFIG_UART_SAM_PORT_1_IRQ ATMEL_SAM_UART_400E0800_IRQ_0 #define CONFIG_UART_SAM_PORT_1_IRQ DT_ATMEL_SAM_UART_400E0800_IRQ_0
#define CONFIG_UART_SAM_PORT_1_IRQ_PRIO ATMEL_SAM_UART_400E0800_IRQ_0_PRIORITY #define CONFIG_UART_SAM_PORT_1_IRQ_PRIO DT_ATMEL_SAM_UART_400E0800_IRQ_0_PRIORITY
#define CONFIG_USART_SAM_PORT_0_NAME ATMEL_SAM_USART_40024000_LABEL #define CONFIG_USART_SAM_PORT_0_NAME DT_ATMEL_SAM_USART_40024000_LABEL
#define CONFIG_USART_SAM_PORT_0_BAUD_RATE ATMEL_SAM_USART_40024000_CURRENT_SPEED #define CONFIG_USART_SAM_PORT_0_BAUD_RATE DT_ATMEL_SAM_USART_40024000_CURRENT_SPEED
#define CONFIG_USART_SAM_PORT_1_NAME ATMEL_SAM_USART_40028000_LABEL #define CONFIG_USART_SAM_PORT_1_NAME DT_ATMEL_SAM_USART_40028000_LABEL
#define CONFIG_USART_SAM_PORT_1_BAUD_RATE ATMEL_SAM_USART_40028000_CURRENT_SPEED #define CONFIG_USART_SAM_PORT_1_BAUD_RATE DT_ATMEL_SAM_USART_40028000_CURRENT_SPEED
#define CONFIG_WDT_SAM_IRQ ATMEL_SAM_WATCHDOG_400E1450_IRQ_0 #define CONFIG_WDT_SAM_IRQ DT_ATMEL_SAM_WATCHDOG_400E1450_IRQ_0
#define CONFIG_WDT_SAM_IRQ_PRIORITY ATMEL_SAM_WATCHDOG_400E1450_IRQ_0_PRIORITY #define CONFIG_WDT_SAM_IRQ_PRIORITY DT_ATMEL_SAM_WATCHDOG_400E1450_IRQ_0_PRIORITY
#define CONFIG_WDT_SAM_LABEL ATMEL_SAM_WATCHDOG_400E1450_LABEL #define CONFIG_WDT_SAM_LABEL DT_ATMEL_SAM_WATCHDOG_400E1450_LABEL
#define CONFIG_WDT_SAM_BASE_ADDRESS ATMEL_SAM_WATCHDOG_400E1450_BASE_ADDRESS #define CONFIG_WDT_SAM_BASE_ADDRESS DT_ATMEL_SAM_WATCHDOG_400E1450_BASE_ADDRESS
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

218
soc/arm/atmel_sam/same70/dts_fixup.h
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@ -6,126 +6,126 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_GPIO_SAM_PORTA_LABEL ATMEL_SAM_GPIO_400E0E00_LABEL #define CONFIG_GPIO_SAM_PORTA_LABEL DT_ATMEL_SAM_GPIO_400E0E00_LABEL
#define CONFIG_GPIO_SAM_PORTA_BASE_ADDRESS ATMEL_SAM_GPIO_400E0E00_BASE_ADDRESS #define CONFIG_GPIO_SAM_PORTA_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E0E00_BASE_ADDRESS
#define CONFIG_GPIO_SAM_PORTA_IRQ ATMEL_SAM_GPIO_400E0E00_IRQ_0 #define CONFIG_GPIO_SAM_PORTA_IRQ DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0
#define CONFIG_GPIO_SAM_PORTA_IRQ_PRIO ATMEL_SAM_GPIO_400E0E00_IRQ_0_PRIORITY #define CONFIG_GPIO_SAM_PORTA_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0_PRIORITY
#define CONFIG_GPIO_SAM_PORTA_PERIPHERAL_ID ATMEL_SAM_GPIO_400E0E00_PERIPHERAL_ID #define CONFIG_GPIO_SAM_PORTA_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E0E00_PERIPHERAL_ID
#define CONFIG_GPIO_SAM_PORTB_LABEL ATMEL_SAM_GPIO_400E1000_LABEL #define CONFIG_GPIO_SAM_PORTB_LABEL DT_ATMEL_SAM_GPIO_400E1000_LABEL
#define CONFIG_GPIO_SAM_PORTB_BASE_ADDRESS ATMEL_SAM_GPIO_400E1000_BASE_ADDRESS #define CONFIG_GPIO_SAM_PORTB_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1000_BASE_ADDRESS
#define CONFIG_GPIO_SAM_PORTB_IRQ ATMEL_SAM_GPIO_400E1000_IRQ_0 #define CONFIG_GPIO_SAM_PORTB_IRQ DT_ATMEL_SAM_GPIO_400E1000_IRQ_0
#define CONFIG_GPIO_SAM_PORTB_IRQ_PRIO ATMEL_SAM_GPIO_400E1000_IRQ_0_PRIORITY #define CONFIG_GPIO_SAM_PORTB_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1000_IRQ_0_PRIORITY
#define CONFIG_GPIO_SAM_PORTB_PERIPHERAL_ID ATMEL_SAM_GPIO_400E1000_PERIPHERAL_ID #define CONFIG_GPIO_SAM_PORTB_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1000_PERIPHERAL_ID
#define CONFIG_GPIO_SAM_PORTC_LABEL ATMEL_SAM_GPIO_400E1200_LABEL #define CONFIG_GPIO_SAM_PORTC_LABEL DT_ATMEL_SAM_GPIO_400E1200_LABEL
#define CONFIG_GPIO_SAM_PORTC_BASE_ADDRESS ATMEL_SAM_GPIO_400E1200_BASE_ADDRESS #define CONFIG_GPIO_SAM_PORTC_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1200_BASE_ADDRESS
#define CONFIG_GPIO_SAM_PORTC_IRQ ATMEL_SAM_GPIO_400E1200_IRQ_0 #define CONFIG_GPIO_SAM_PORTC_IRQ DT_ATMEL_SAM_GPIO_400E1200_IRQ_0
#define CONFIG_GPIO_SAM_PORTC_IRQ_PRIO ATMEL_SAM_GPIO_400E1200_IRQ_0_PRIORITY #define CONFIG_GPIO_SAM_PORTC_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1200_IRQ_0_PRIORITY
#define CONFIG_GPIO_SAM_PORTC_PERIPHERAL_ID ATMEL_SAM_GPIO_400E1200_PERIPHERAL_ID #define CONFIG_GPIO_SAM_PORTC_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1200_PERIPHERAL_ID
#define CONFIG_GPIO_SAM_PORTD_LABEL ATMEL_SAM_GPIO_400E1400_LABEL #define CONFIG_GPIO_SAM_PORTD_LABEL DT_ATMEL_SAM_GPIO_400E1400_LABEL
#define CONFIG_GPIO_SAM_PORTD_BASE_ADDRESS ATMEL_SAM_GPIO_400E1400_BASE_ADDRESS #define CONFIG_GPIO_SAM_PORTD_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1400_BASE_ADDRESS
#define CONFIG_GPIO_SAM_PORTD_IRQ ATMEL_SAM_GPIO_400E1400_IRQ_0 #define CONFIG_GPIO_SAM_PORTD_IRQ DT_ATMEL_SAM_GPIO_400E1400_IRQ_0
#define CONFIG_GPIO_SAM_PORTD_IRQ_PRIO ATMEL_SAM_GPIO_400E1400_IRQ_0_PRIORITY #define CONFIG_GPIO_SAM_PORTD_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1400_IRQ_0_PRIORITY
#define CONFIG_GPIO_SAM_PORTD_PERIPHERAL_ID ATMEL_SAM_GPIO_400E1400_PERIPHERAL_ID #define CONFIG_GPIO_SAM_PORTD_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1400_PERIPHERAL_ID
#define CONFIG_GPIO_SAM_PORTE_LABEL ATMEL_SAM_GPIO_400E1600_LABEL #define CONFIG_GPIO_SAM_PORTE_LABEL DT_ATMEL_SAM_GPIO_400E1600_LABEL
#define CONFIG_GPIO_SAM_PORTE_BASE_ADDRESS ATMEL_SAM_GPIO_400E1600_BASE_ADDRESS #define CONFIG_GPIO_SAM_PORTE_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1600_BASE_ADDRESS
#define CONFIG_GPIO_SAM_PORTE_IRQ ATMEL_SAM_GPIO_400E1600_IRQ_0 #define CONFIG_GPIO_SAM_PORTE_IRQ DT_ATMEL_SAM_GPIO_400E1600_IRQ_0
#define CONFIG_GPIO_SAM_PORTE_IRQ_PRIO ATMEL_SAM_GPIO_400E1600_IRQ_0_PRIORITY #define CONFIG_GPIO_SAM_PORTE_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1600_IRQ_0_PRIORITY
#define CONFIG_GPIO_SAM_PORTE_PERIPHERAL_ID ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID #define CONFIG_GPIO_SAM_PORTE_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID
#define CONFIG_I2C_0_BASE_ADDRESS ATMEL_SAM_I2C_TWIHS_40018000_BASE_ADDRESS #define CONFIG_I2C_0_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_40018000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME ATMEL_SAM_I2C_TWIHS_40018000_LABEL #define CONFIG_I2C_0_NAME DT_ATMEL_SAM_I2C_TWIHS_40018000_LABEL
#define CONFIG_I2C_0_BITRATE ATMEL_SAM_I2C_TWIHS_40018000_CLOCK_FREQUENCY #define CONFIG_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWIHS_40018000_CLOCK_FREQUENCY
#define CONFIG_I2C_0_IRQ ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0 #define CONFIG_I2C_0_IRQ DT_ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0
#define CONFIG_I2C_0_IRQ_PRI ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0_PRIORITY #define CONFIG_I2C_0_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_40018000_IRQ_0_PRIORITY
#define CONFIG_I2C_0_PERIPHERAL_ID ATMEL_SAM_I2C_TWIHS_40018000_PERIPHERAL_ID #define CONFIG_I2C_0_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWIHS_40018000_PERIPHERAL_ID
#define CONFIG_I2C_1_BASE_ADDRESS ATMEL_SAM_I2C_TWIHS_4001C000_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_4001C000_BASE_ADDRESS
#define CONFIG_I2C_1_NAME ATMEL_SAM_I2C_TWIHS_4001C000_LABEL #define CONFIG_I2C_1_NAME DT_ATMEL_SAM_I2C_TWIHS_4001C000_LABEL
#define CONFIG_I2C_1_BITRATE ATMEL_SAM_I2C_TWIHS_4001C000_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_ATMEL_SAM_I2C_TWIHS_4001C000_CLOCK_FREQUENCY
#define CONFIG_I2C_1_IRQ ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0 #define CONFIG_I2C_1_IRQ DT_ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0
#define CONFIG_I2C_1_IRQ_PRI ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0_PRIORITY #define CONFIG_I2C_1_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_4001C000_IRQ_0_PRIORITY
#define CONFIG_I2C_1_PERIPHERAL_ID ATMEL_SAM_I2C_TWIHS_4001C000_PERIPHERAL_ID #define CONFIG_I2C_1_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWIHS_4001C000_PERIPHERAL_ID
#define CONFIG_I2C_2_BASE_ADDRESS ATMEL_SAM_I2C_TWIHS_40060000_BASE_ADDRESS #define CONFIG_I2C_2_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWIHS_40060000_BASE_ADDRESS
#define CONFIG_I2C_2_NAME ATMEL_SAM_I2C_TWIHS_40060000_LABEL #define CONFIG_I2C_2_NAME DT_ATMEL_SAM_I2C_TWIHS_40060000_LABEL
#define CONFIG_I2C_2_BITRATE ATMEL_SAM_I2C_TWIHS_40060000_CLOCK_FREQUENCY #define CONFIG_I2C_2_BITRATE DT_ATMEL_SAM_I2C_TWIHS_40060000_CLOCK_FREQUENCY
#define CONFIG_I2C_2_IRQ ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0 #define CONFIG_I2C_2_IRQ DT_ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0
#define CONFIG_I2C_2_IRQ_PRI ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0_PRIORITY #define CONFIG_I2C_2_IRQ_PRI DT_ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0_PRIORITY
#define CONFIG_I2C_2_PERIPHERAL_ID ATMEL_SAM_I2C_TWIHS_40060000_PERIPHERAL_ID #define CONFIG_I2C_2_PERIPHERAL_ID DT_ATMEL_SAM_I2C_TWIHS_40060000_PERIPHERAL_ID
#define CONFIG_SPI_0_BASE_ADDRESS ATMEL_SAM_SPI_40008000_BASE_ADDRESS #define CONFIG_SPI_0_BASE_ADDRESS DT_ATMEL_SAM_SPI_40008000_BASE_ADDRESS
#define CONFIG_SPI_0_NAME ATMEL_SAM_SPI_40008000_LABEL #define CONFIG_SPI_0_NAME DT_ATMEL_SAM_SPI_40008000_LABEL
#define CONFIG_SPI_0_IRQ ATMEL_SAM_SPI_40008000_IRQ_0 #define CONFIG_SPI_0_IRQ DT_ATMEL_SAM_SPI_40008000_IRQ_0
#define CONFIG_SPI_0_IRQ_PRI ATMEL_SAM_SPI_40008000_IRQ_0_PRIORITY #define CONFIG_SPI_0_IRQ_PRI DT_ATMEL_SAM_SPI_40008000_IRQ_0_PRIORITY
#define CONFIG_SPI_0_PERIPHERAL_ID ATMEL_SAM_SPI_40008000_PERIPHERAL_ID #define CONFIG_SPI_0_PERIPHERAL_ID DT_ATMEL_SAM_SPI_40008000_PERIPHERAL_ID
#define CONFIG_SPI_1_BASE_ADDRESS ATMEL_SAM_SPI_40058000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_ATMEL_SAM_SPI_40058000_BASE_ADDRESS
#define CONFIG_SPI_1_NAME ATMEL_SAM_SPI_40058000_LABEL #define CONFIG_SPI_1_NAME DT_ATMEL_SAM_SPI_40058000_LABEL
#define CONFIG_SPI_1_IRQ ATMEL_SAM_SPI_40058000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_ATMEL_SAM_SPI_40058000_IRQ_0
#define CONFIG_SPI_1_IRQ_PRI ATMEL_SAM_SPI_40058000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_ATMEL_SAM_SPI_40058000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_PERIPHERAL_ID ATMEL_SAM_SPI_40058000_PERIPHERAL_ID #define CONFIG_SPI_1_PERIPHERAL_ID DT_ATMEL_SAM_SPI_40058000_PERIPHERAL_ID
#define CONFIG_UART_SAM_PORT_0_NAME ATMEL_SAM_UART_400E0800_LABEL #define CONFIG_UART_SAM_PORT_0_NAME DT_ATMEL_SAM_UART_400E0800_LABEL
#define CONFIG_UART_SAM_PORT_0_BAUD_RATE ATMEL_SAM_UART_400E0800_CURRENT_SPEED #define CONFIG_UART_SAM_PORT_0_BAUD_RATE DT_ATMEL_SAM_UART_400E0800_CURRENT_SPEED
#define CONFIG_UART_SAM_PORT_0_IRQ ATMEL_SAM_UART_400E0800_IRQ_0 #define CONFIG_UART_SAM_PORT_0_IRQ DT_ATMEL_SAM_UART_400E0800_IRQ_0
#define CONFIG_UART_SAM_PORT_0_IRQ_PRIO ATMEL_SAM_UART_400E0800_IRQ_0_PRIORITY #define CONFIG_UART_SAM_PORT_0_IRQ_PRIO DT_ATMEL_SAM_UART_400E0800_IRQ_0_PRIORITY
#define CONFIG_UART_SAM_PORT_1_NAME ATMEL_SAM_UART_400E0A00_LABEL #define CONFIG_UART_SAM_PORT_1_NAME DT_ATMEL_SAM_UART_400E0A00_LABEL
#define CONFIG_UART_SAM_PORT_1_BAUD_RATE ATMEL_SAM_UART_400E0A00_CURRENT_SPEED #define CONFIG_UART_SAM_PORT_1_BAUD_RATE DT_ATMEL_SAM_UART_400E0A00_CURRENT_SPEED
#define CONFIG_UART_SAM_PORT_1_IRQ ATMEL_SAM_UART_400E0A00_IRQ_0 #define CONFIG_UART_SAM_PORT_1_IRQ DT_ATMEL_SAM_UART_400E0A00_IRQ_0
#define CONFIG_UART_SAM_PORT_1_IRQ_PRIO ATMEL_SAM_UART_400E0A00_IRQ_0_PRIORITY #define CONFIG_UART_SAM_PORT_1_IRQ_PRIO DT_ATMEL_SAM_UART_400E0A00_IRQ_0_PRIORITY
#define CONFIG_UART_SAM_PORT_2_NAME ATMEL_SAM_UART_400E1A00_LABEL #define CONFIG_UART_SAM_PORT_2_NAME DT_ATMEL_SAM_UART_400E1A00_LABEL
#define CONFIG_UART_SAM_PORT_2_BAUD_RATE ATMEL_SAM_UART_400E1A00_CURRENT_SPEED #define CONFIG_UART_SAM_PORT_2_BAUD_RATE DT_ATMEL_SAM_UART_400E1A00_CURRENT_SPEED
#define CONFIG_UART_SAM_PORT_2_IRQ ATMEL_SAM_UART_400E1A00_IRQ_0 #define CONFIG_UART_SAM_PORT_2_IRQ DT_ATMEL_SAM_UART_400E1A00_IRQ_0
#define CONFIG_UART_SAM_PORT_2_IRQ_PRIO ATMEL_SAM_UART_400E1A00_IRQ_0_PRIORITY #define CONFIG_UART_SAM_PORT_2_IRQ_PRIO DT_ATMEL_SAM_UART_400E1A00_IRQ_0_PRIORITY
#define CONFIG_UART_SAM_PORT_3_NAME ATMEL_SAM_UART_400E1C00_LABEL #define CONFIG_UART_SAM_PORT_3_NAME DT_ATMEL_SAM_UART_400E1C00_LABEL
#define CONFIG_UART_SAM_PORT_3_BAUD_RATE ATMEL_SAM_UART_400E1C00_CURRENT_SPEED #define CONFIG_UART_SAM_PORT_3_BAUD_RATE DT_ATMEL_SAM_UART_400E1C00_CURRENT_SPEED
#define CONFIG_UART_SAM_PORT_3_IRQ ATMEL_SAM_UART_400E1C00_IRQ_0 #define CONFIG_UART_SAM_PORT_3_IRQ DT_ATMEL_SAM_UART_400E1C00_IRQ_0
#define CONFIG_UART_SAM_PORT_3_IRQ_PRIO ATMEL_SAM_UART_400E1C00_IRQ_0_PRIORITY #define CONFIG_UART_SAM_PORT_3_IRQ_PRIO DT_ATMEL_SAM_UART_400E1C00_IRQ_0_PRIORITY
#define CONFIG_UART_SAM_PORT_4_NAME ATMEL_SAM_UART_400E1E00_LABEL #define CONFIG_UART_SAM_PORT_4_NAME DT_ATMEL_SAM_UART_400E1E00_LABEL
#define CONFIG_UART_SAM_PORT_4_BAUD_RATE ATMEL_SAM_UART_400E1E00_CURRENT_SPEED #define CONFIG_UART_SAM_PORT_4_BAUD_RATE DT_ATMEL_SAM_UART_400E1E00_CURRENT_SPEED
#define CONFIG_UART_SAM_PORT_4_IRQ ATMEL_SAM_UART_400E1E00_IRQ_0 #define CONFIG_UART_SAM_PORT_4_IRQ DT_ATMEL_SAM_UART_400E1E00_IRQ_0
#define CONFIG_UART_SAM_PORT_4_IRQ_PRIO ATMEL_SAM_UART_400E1E00_IRQ_0_PRIORITY #define CONFIG_UART_SAM_PORT_4_IRQ_PRIO DT_ATMEL_SAM_UART_400E1E00_IRQ_0_PRIORITY
#define CONFIG_USART_SAM_PORT_0_NAME ATMEL_SAM_USART_40024000_LABEL #define CONFIG_USART_SAM_PORT_0_NAME DT_ATMEL_SAM_USART_40024000_LABEL
#define CONFIG_USART_SAM_PORT_0_BAUD_RATE ATMEL_SAM_USART_40024000_CURRENT_SPEED #define CONFIG_USART_SAM_PORT_0_BAUD_RATE DT_ATMEL_SAM_USART_40024000_CURRENT_SPEED
#define CONFIG_USART_SAM_PORT_0_IRQ ATMEL_SAM_USART_40024000_IRQ_0 #define CONFIG_USART_SAM_PORT_0_IRQ DT_ATMEL_SAM_USART_40024000_IRQ_0
#define CONFIG_USART_SAM_PORT_0_IRQ_PRIO ATMEL_SAM_USART_40024000_IRQ_0_PRIORITY #define CONFIG_USART_SAM_PORT_0_IRQ_PRIO DT_ATMEL_SAM_USART_40024000_IRQ_0_PRIORITY
#define CONFIG_USART_SAM_PORT_0_PERIPHERAL_ID ATMEL_SAM_USART_40024000_PERIPHERAL_ID #define CONFIG_USART_SAM_PORT_0_PERIPHERAL_ID DT_ATMEL_SAM_USART_40024000_PERIPHERAL_ID
#define CONFIG_USART_SAM_PORT_1_NAME ATMEL_SAM_USART_40028000_LABEL #define CONFIG_USART_SAM_PORT_1_NAME DT_ATMEL_SAM_USART_40028000_LABEL
#define CONFIG_USART_SAM_PORT_1_BAUD_RATE ATMEL_SAM_USART_40028000_CURRENT_SPEED #define CONFIG_USART_SAM_PORT_1_BAUD_RATE DT_ATMEL_SAM_USART_40028000_CURRENT_SPEED
#define CONFIG_USART_SAM_PORT_1_IRQ ATMEL_SAM_USART_40028000_IRQ_0 #define CONFIG_USART_SAM_PORT_1_IRQ DT_ATMEL_SAM_USART_40028000_IRQ_0
#define CONFIG_USART_SAM_PORT_1_IRQ_PRIO ATMEL_SAM_USART_40028000_IRQ_0_PRIORITY #define CONFIG_USART_SAM_PORT_1_IRQ_PRIO DT_ATMEL_SAM_USART_40028000_IRQ_0_PRIORITY
#define CONFIG_USART_SAM_PORT_1_PERIPHERAL_ID ATMEL_SAM_USART_40028000_PERIPHERAL_ID #define CONFIG_USART_SAM_PORT_1_PERIPHERAL_ID DT_ATMEL_SAM_USART_40028000_PERIPHERAL_ID
#define CONFIG_USART_SAM_PORT_2_NAME ATMEL_SAM_USART_4002C000_LABEL #define CONFIG_USART_SAM_PORT_2_NAME DT_ATMEL_SAM_USART_4002C000_LABEL
#define CONFIG_USART_SAM_PORT_2_BAUD_RATE ATMEL_SAM_USART_4002C000_CURRENT_SPEED #define CONFIG_USART_SAM_PORT_2_BAUD_RATE DT_ATMEL_SAM_USART_4002C000_CURRENT_SPEED
#define CONFIG_USART_SAM_PORT_2_IRQ ATMEL_SAM_USART_4002C000_IRQ_0 #define CONFIG_USART_SAM_PORT_2_IRQ DT_ATMEL_SAM_USART_4002C000_IRQ_0
#define CONFIG_USART_SAM_PORT_2_IRQ_PRIO ATMEL_SAM_USART_4002C000_IRQ_0_PRIORITY #define CONFIG_USART_SAM_PORT_2_IRQ_PRIO DT_ATMEL_SAM_USART_4002C000_IRQ_0_PRIORITY
#define CONFIG_USART_SAM_PORT_2_PERIPHERAL_ID ATMEL_SAM_USART_4002C000_PERIPHERAL_ID #define CONFIG_USART_SAM_PORT_2_PERIPHERAL_ID DT_ATMEL_SAM_USART_4002C000_PERIPHERAL_ID
#define CONFIG_ADC_0_BASE_ADDRESS ATMEL_SAM_AFEC_4003C000_BASE_ADDRESS #define CONFIG_ADC_0_BASE_ADDRESS DT_ATMEL_SAM_AFEC_4003C000_BASE_ADDRESS
#define CONFIG_ADC_0_IRQ ATMEL_SAM_AFEC_4003C000_IRQ_0 #define CONFIG_ADC_0_IRQ DT_ATMEL_SAM_AFEC_4003C000_IRQ_0
#define CONFIG_ADC_0_IRQ_PRI ATMEL_SAM_AFEC_4003C000_IRQ_0_PRIORITY #define CONFIG_ADC_0_IRQ_PRI DT_ATMEL_SAM_AFEC_4003C000_IRQ_0_PRIORITY
#define CONFIG_ADC_0_NAME ATMEL_SAM_AFEC_4003C000_LABEL #define CONFIG_ADC_0_NAME DT_ATMEL_SAM_AFEC_4003C000_LABEL
#define CONFIG_ADC_0_PERIPHERAL_ID ATMEL_SAM_AFEC_4003C000_PERIPHERAL_ID #define CONFIG_ADC_0_PERIPHERAL_ID DT_ATMEL_SAM_AFEC_4003C000_PERIPHERAL_ID
#define CONFIG_ADC_1_BASE_ADDRESS ATMEL_SAM_AFEC_40064000_BASE_ADDRESS #define CONFIG_ADC_1_BASE_ADDRESS DT_ATMEL_SAM_AFEC_40064000_BASE_ADDRESS
#define CONFIG_ADC_1_IRQ ATMEL_SAM_AFEC_40064000_IRQ_0 #define CONFIG_ADC_1_IRQ DT_ATMEL_SAM_AFEC_40064000_IRQ_0
#define CONFIG_ADC_1_IRQ_PRI ATMEL_SAM_AFEC_40064000_IRQ_0_PRIORITY #define CONFIG_ADC_1_IRQ_PRI DT_ATMEL_SAM_AFEC_40064000_IRQ_0_PRIORITY
#define CONFIG_ADC_1_NAME ATMEL_SAM_AFEC_40064000_LABEL #define CONFIG_ADC_1_NAME DT_ATMEL_SAM_AFEC_40064000_LABEL
#define CONFIG_ADC_1_PERIPHERAL_ID ATMEL_SAM_AFEC_40064000_PERIPHERAL_ID #define CONFIG_ADC_1_PERIPHERAL_ID DT_ATMEL_SAM_AFEC_40064000_PERIPHERAL_ID
#define CONFIG_WDT_SAM_IRQ ATMEL_SAM_WATCHDOG_400E1850_IRQ_0 #define CONFIG_WDT_SAM_IRQ DT_ATMEL_SAM_WATCHDOG_400E1850_IRQ_0
#define CONFIG_WDT_SAM_IRQ_PRIORITY ATMEL_SAM_WATCHDOG_400E1850_IRQ_0_PRIORITY #define CONFIG_WDT_SAM_IRQ_PRIORITY DT_ATMEL_SAM_WATCHDOG_400E1850_IRQ_0_PRIORITY
#define CONFIG_WDT_SAM_LABEL ATMEL_SAM_WATCHDOG_400E1850_LABEL #define CONFIG_WDT_SAM_LABEL DT_ATMEL_SAM_WATCHDOG_400E1850_LABEL
#define CONFIG_WDT_SAM_BASE_ADDRESS ATMEL_SAM_WATCHDOG_400E1850_BASE_ADDRESS #define CONFIG_WDT_SAM_BASE_ADDRESS DT_ATMEL_SAM_WATCHDOG_400E1850_BASE_ADDRESS
#define CONFIG_USBHS_IRQ ATMEL_SAM_USBHS_40038000_IRQ_0 #define CONFIG_USBHS_IRQ DT_ATMEL_SAM_USBHS_40038000_IRQ_0
#define CONFIG_USBHS_IRQ_PRI ATMEL_SAM_USBHS_40038000_IRQ_0_PRIORITY #define CONFIG_USBHS_IRQ_PRI DT_ATMEL_SAM_USBHS_40038000_IRQ_0_PRIORITY
#define CONFIG_USBHS_MAXIMUM_SPEED ATMEL_SAM_USBHS_40038000_MAXIMUM_SPEED #define CONFIG_USBHS_MAXIMUM_SPEED DT_ATMEL_SAM_USBHS_40038000_MAXIMUM_SPEED
#define CONFIG_USBHS_NUM_BIDIR_EP ATMEL_SAM_USBHS_40038000_NUM_BIDIR_ENDPOINTS #define CONFIG_USBHS_NUM_BIDIR_EP DT_ATMEL_SAM_USBHS_40038000_NUM_BIDIR_ENDPOINTS
#define CONFIG_USBHS_PERIPHERAL_ID ATMEL_SAM_USBHS_40038000_PERIPHERAL_ID #define CONFIG_USBHS_PERIPHERAL_ID DT_ATMEL_SAM_USBHS_40038000_PERIPHERAL_ID
#define CONFIG_USBHS_RAM_BASE_ADDRESS ATMEL_SAM_USBHS_40038000_RAM_0 #define CONFIG_USBHS_RAM_BASE_ADDRESS DT_ATMEL_SAM_USBHS_40038000_RAM_0
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

162
soc/arm/atmel_sam0/samd20/dts_fixup.h
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@ -1,103 +1,103 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define FLASH_DEV_BASE_ADDRESS ATMEL_SAM0_NVMCTRL_41004000_BASE_ADDRESS_0 #define FLASH_DEV_BASE_ADDRESS DT_ATMEL_SAM0_NVMCTRL_41004000_BASE_ADDRESS_0
#define FLASH_DEV_NAME ATMEL_SAM0_NVMCTRL_41004000_LABEL #define FLASH_DEV_NAME DT_ATMEL_SAM0_NVMCTRL_41004000_LABEL
#define CONFIG_GPIO_SAM0_PORTA_LABEL ATMEL_SAM0_GPIO_41004400_LABEL #define CONFIG_GPIO_SAM0_PORTA_LABEL DT_ATMEL_SAM0_GPIO_41004400_LABEL
#define CONFIG_GPIO_SAM0_PORTA_BASE_ADDRESS ATMEL_SAM0_GPIO_41004400_BASE_ADDRESS #define CONFIG_GPIO_SAM0_PORTA_BASE_ADDRESS DT_ATMEL_SAM0_GPIO_41004400_BASE_ADDRESS
#define CONFIG_GPIO_SAM0_PORTB_LABEL ATMEL_SAM0_GPIO_41004480_LABEL #define CONFIG_GPIO_SAM0_PORTB_LABEL DT_ATMEL_SAM0_GPIO_41004480_LABEL
#define CONFIG_GPIO_SAM0_PORTB_BASE_ADDRESS ATMEL_SAM0_GPIO_41004480_BASE_ADDRESS #define CONFIG_GPIO_SAM0_PORTB_BASE_ADDRESS DT_ATMEL_SAM0_GPIO_41004480_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM0_CURRENT_SPEED ATMEL_SAM0_UART_42000800_CURRENT_SPEED #define CONFIG_UART_SAM0_SERCOM0_CURRENT_SPEED DT_ATMEL_SAM0_UART_42000800_CURRENT_SPEED
#define CONFIG_UART_SAM0_SERCOM0_IRQ ATMEL_SAM0_UART_42000800_IRQ_0 #define CONFIG_UART_SAM0_SERCOM0_IRQ DT_ATMEL_SAM0_UART_42000800_IRQ_0
#define CONFIG_UART_SAM0_SERCOM0_IRQ_PRIORITY ATMEL_SAM0_UART_42000800_IRQ_0_PRIORITY #define CONFIG_UART_SAM0_SERCOM0_IRQ_PRIORITY DT_ATMEL_SAM0_UART_42000800_IRQ_0_PRIORITY
#define CONFIG_UART_SAM0_SERCOM0_LABEL ATMEL_SAM0_UART_42000800_LABEL #define CONFIG_UART_SAM0_SERCOM0_LABEL DT_ATMEL_SAM0_UART_42000800_LABEL
#define CONFIG_UART_SAM0_SERCOM0_BASE_ADDRESS ATMEL_SAM0_UART_42000800_BASE_ADDRESS #define CONFIG_UART_SAM0_SERCOM0_BASE_ADDRESS DT_ATMEL_SAM0_UART_42000800_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM0_RXPO ATMEL_SAM0_UART_42000800_RXPO #define CONFIG_UART_SAM0_SERCOM0_RXPO DT_ATMEL_SAM0_UART_42000800_RXPO
#define CONFIG_UART_SAM0_SERCOM0_TXPO ATMEL_SAM0_UART_42000800_TXPO #define CONFIG_UART_SAM0_SERCOM0_TXPO DT_ATMEL_SAM0_UART_42000800_TXPO
#define CONFIG_UART_SAM0_SERCOM1_CURRENT_SPEED ATMEL_SAM0_UART_42000C00_CURRENT_SPEED #define CONFIG_UART_SAM0_SERCOM1_CURRENT_SPEED DT_ATMEL_SAM0_UART_42000C00_CURRENT_SPEED
#define CONFIG_UART_SAM0_SERCOM1_IRQ ATMEL_SAM0_UART_42000C00_IRQ_0 #define CONFIG_UART_SAM0_SERCOM1_IRQ DT_ATMEL_SAM0_UART_42000C00_IRQ_0
#define CONFIG_UART_SAM0_SERCOM1_IRQ_PRIORITY ATMEL_SAM0_UART_42000C00_IRQ_0_PRIORITY #define CONFIG_UART_SAM0_SERCOM1_IRQ_PRIORITY DT_ATMEL_SAM0_UART_42000C00_IRQ_0_PRIORITY
#define CONFIG_UART_SAM0_SERCOM1_LABEL ATMEL_SAM0_UART_42000C00_LABEL #define CONFIG_UART_SAM0_SERCOM1_LABEL DT_ATMEL_SAM0_UART_42000C00_LABEL
#define CONFIG_UART_SAM0_SERCOM1_BASE_ADDRESS ATMEL_SAM0_UART_42000C00_BASE_ADDRESS #define CONFIG_UART_SAM0_SERCOM1_BASE_ADDRESS DT_ATMEL_SAM0_UART_42000C00_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM1_RXPO ATMEL_SAM0_UART_42000C00_RXPO #define CONFIG_UART_SAM0_SERCOM1_RXPO DT_ATMEL_SAM0_UART_42000C00_RXPO
#define CONFIG_UART_SAM0_SERCOM1_TXPO ATMEL_SAM0_UART_42000C00_TXPO #define CONFIG_UART_SAM0_SERCOM1_TXPO DT_ATMEL_SAM0_UART_42000C00_TXPO
#define CONFIG_UART_SAM0_SERCOM2_CURRENT_SPEED ATMEL_SAM0_UART_42001000_CURRENT_SPEED #define CONFIG_UART_SAM0_SERCOM2_CURRENT_SPEED DT_ATMEL_SAM0_UART_42001000_CURRENT_SPEED
#define CONFIG_UART_SAM0_SERCOM2_IRQ ATMEL_SAM0_UART_42001000_IRQ_0 #define CONFIG_UART_SAM0_SERCOM2_IRQ DT_ATMEL_SAM0_UART_42001000_IRQ_0
#define CONFIG_UART_SAM0_SERCOM2_IRQ_PRIORITY ATMEL_SAM0_UART_42001000_IRQ_0_PRIORITY #define CONFIG_UART_SAM0_SERCOM2_IRQ_PRIORITY DT_ATMEL_SAM0_UART_42001000_IRQ_0_PRIORITY
#define CONFIG_UART_SAM0_SERCOM2_LABEL ATMEL_SAM0_UART_42001000_LABEL #define CONFIG_UART_SAM0_SERCOM2_LABEL DT_ATMEL_SAM0_UART_42001000_LABEL
#define CONFIG_UART_SAM0_SERCOM2_BASE_ADDRESS ATMEL_SAM0_UART_42001000_BASE_ADDRESS #define CONFIG_UART_SAM0_SERCOM2_BASE_ADDRESS DT_ATMEL_SAM0_UART_42001000_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM2_RXPO ATMEL_SAM0_UART_42001000_RXPO #define CONFIG_UART_SAM0_SERCOM2_RXPO DT_ATMEL_SAM0_UART_42001000_RXPO
#define CONFIG_UART_SAM0_SERCOM2_TXPO ATMEL_SAM0_UART_42001000_TXPO #define CONFIG_UART_SAM0_SERCOM2_TXPO DT_ATMEL_SAM0_UART_42001000_TXPO
#define CONFIG_UART_SAM0_SERCOM3_CURRENT_SPEED ATMEL_SAM0_UART_42001400_CURRENT_SPEED #define CONFIG_UART_SAM0_SERCOM3_CURRENT_SPEED DT_ATMEL_SAM0_UART_42001400_CURRENT_SPEED
#define CONFIG_UART_SAM0_SERCOM3_IRQ ATMEL_SAM0_UART_42001400_IRQ_0 #define CONFIG_UART_SAM0_SERCOM3_IRQ DT_ATMEL_SAM0_UART_42001400_IRQ_0
#define CONFIG_UART_SAM0_SERCOM3_IRQ_PRIORITY ATMEL_SAM0_UART_42001400_IRQ_0_PRIORITY #define CONFIG_UART_SAM0_SERCOM3_IRQ_PRIORITY DT_ATMEL_SAM0_UART_42001400_IRQ_0_PRIORITY
#define CONFIG_UART_SAM0_SERCOM3_LABEL ATMEL_SAM0_UART_42001400_LABEL #define CONFIG_UART_SAM0_SERCOM3_LABEL DT_ATMEL_SAM0_UART_42001400_LABEL
#define CONFIG_UART_SAM0_SERCOM3_BASE_ADDRESS ATMEL_SAM0_UART_42001400_BASE_ADDRESS #define CONFIG_UART_SAM0_SERCOM3_BASE_ADDRESS DT_ATMEL_SAM0_UART_42001400_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM3_RXPO ATMEL_SAM0_UART_42001400_RXPO #define CONFIG_UART_SAM0_SERCOM3_RXPO DT_ATMEL_SAM0_UART_42001400_RXPO
#define CONFIG_UART_SAM0_SERCOM3_TXPO ATMEL_SAM0_UART_42001400_TXPO #define CONFIG_UART_SAM0_SERCOM3_TXPO DT_ATMEL_SAM0_UART_42001400_TXPO
#define CONFIG_UART_SAM0_SERCOM4_CURRENT_SPEED ATMEL_SAM0_UART_42001800_CURRENT_SPEED #define CONFIG_UART_SAM0_SERCOM4_CURRENT_SPEED DT_ATMEL_SAM0_UART_42001800_CURRENT_SPEED
#define CONFIG_UART_SAM0_SERCOM4_IRQ ATMEL_SAM0_UART_42001800_IRQ_0 #define CONFIG_UART_SAM0_SERCOM4_IRQ DT_ATMEL_SAM0_UART_42001800_IRQ_0
#define CONFIG_UART_SAM0_SERCOM4_IRQ_PRIORITY ATMEL_SAM0_UART_42001800_IRQ_0_PRIORITY #define CONFIG_UART_SAM0_SERCOM4_IRQ_PRIORITY DT_ATMEL_SAM0_UART_42001800_IRQ_0_PRIORITY
#define CONFIG_UART_SAM0_SERCOM4_LABEL ATMEL_SAM0_UART_42001800_LABEL #define CONFIG_UART_SAM0_SERCOM4_LABEL DT_ATMEL_SAM0_UART_42001800_LABEL
#define CONFIG_UART_SAM0_SERCOM4_BASE_ADDRESS ATMEL_SAM0_UART_42001800_BASE_ADDRESS #define CONFIG_UART_SAM0_SERCOM4_BASE_ADDRESS DT_ATMEL_SAM0_UART_42001800_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM4_RXPO ATMEL_SAM0_UART_42001800_RXPO #define CONFIG_UART_SAM0_SERCOM4_RXPO DT_ATMEL_SAM0_UART_42001800_RXPO
#define CONFIG_UART_SAM0_SERCOM4_TXPO ATMEL_SAM0_UART_42001800_TXPO #define CONFIG_UART_SAM0_SERCOM4_TXPO DT_ATMEL_SAM0_UART_42001800_TXPO
#define CONFIG_UART_SAM0_SERCOM5_CURRENT_SPEED ATMEL_SAM0_UART_42001C00_CURRENT_SPEED #define CONFIG_UART_SAM0_SERCOM5_CURRENT_SPEED DT_ATMEL_SAM0_UART_42001C00_CURRENT_SPEED
#define CONFIG_UART_SAM0_SERCOM5_IRQ ATMEL_SAM0_UART_42001C00_IRQ_0 #define CONFIG_UART_SAM0_SERCOM5_IRQ DT_ATMEL_SAM0_UART_42001C00_IRQ_0
#define CONFIG_UART_SAM0_SERCOM5_IRQ_PRIORITY ATMEL_SAM0_UART_42001C00_IRQ_0_PRIORITY #define CONFIG_UART_SAM0_SERCOM5_IRQ_PRIORITY DT_ATMEL_SAM0_UART_42001C00_IRQ_0_PRIORITY
#define CONFIG_UART_SAM0_SERCOM5_LABEL ATMEL_SAM0_UART_42001C00_LABEL #define CONFIG_UART_SAM0_SERCOM5_LABEL DT_ATMEL_SAM0_UART_42001C00_LABEL
#define CONFIG_UART_SAM0_SERCOM5_BASE_ADDRESS ATMEL_SAM0_UART_42001C00_BASE_ADDRESS #define CONFIG_UART_SAM0_SERCOM5_BASE_ADDRESS DT_ATMEL_SAM0_UART_42001C00_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM5_RXPO ATMEL_SAM0_UART_42001C00_RXPO #define CONFIG_UART_SAM0_SERCOM5_RXPO DT_ATMEL_SAM0_UART_42001C00_RXPO
#define CONFIG_UART_SAM0_SERCOM5_TXPO ATMEL_SAM0_UART_42001C00_TXPO #define CONFIG_UART_SAM0_SERCOM5_TXPO DT_ATMEL_SAM0_UART_42001C00_TXPO
#define CONFIG_SPI_SAM0_SERCOM0_LABEL ATMEL_SAM0_SPI_42000800_LABEL #define CONFIG_SPI_SAM0_SERCOM0_LABEL DT_ATMEL_SAM0_SPI_42000800_LABEL
#define CONFIG_SPI_SAM0_SERCOM0_BASE_ADDRESS ATMEL_SAM0_SPI_42000800_BASE_ADDRESS #define CONFIG_SPI_SAM0_SERCOM0_BASE_ADDRESS DT_ATMEL_SAM0_SPI_42000800_BASE_ADDRESS
#define CONFIG_SPI_SAM0_SERCOM0_DIPO ATMEL_SAM0_SPI_42000800_DIPO #define CONFIG_SPI_SAM0_SERCOM0_DIPO DT_ATMEL_SAM0_SPI_42000800_DIPO
#define CONFIG_SPI_SAM0_SERCOM0_DOPO ATMEL_SAM0_SPI_42000800_DOPO #define CONFIG_SPI_SAM0_SERCOM0_DOPO DT_ATMEL_SAM0_SPI_42000800_DOPO
#define CONFIG_SPI_SAM0_SERCOM1_LABEL ATMEL_SAM0_SPI_42000C00_LABEL #define CONFIG_SPI_SAM0_SERCOM1_LABEL DT_ATMEL_SAM0_SPI_42000C00_LABEL
#define CONFIG_SPI_SAM0_SERCOM1_BASE_ADDRESS ATMEL_SAM0_SPI_42000C00_BASE_ADDRESS #define CONFIG_SPI_SAM0_SERCOM1_BASE_ADDRESS DT_ATMEL_SAM0_SPI_42000C00_BASE_ADDRESS
#define CONFIG_SPI_SAM0_SERCOM1_DIPO ATMEL_SAM0_SPI_42000C00_DIPO #define CONFIG_SPI_SAM0_SERCOM1_DIPO DT_ATMEL_SAM0_SPI_42000C00_DIPO
#define CONFIG_SPI_SAM0_SERCOM1_DOPO ATMEL_SAM0_SPI_42000C00_DOPO #define CONFIG_SPI_SAM0_SERCOM1_DOPO DT_ATMEL_SAM0_SPI_42000C00_DOPO
#define CONFIG_SPI_SAM0_SERCOM2_LABEL ATMEL_SAM0_SPI_42001000_LABEL #define CONFIG_SPI_SAM0_SERCOM2_LABEL DT_ATMEL_SAM0_SPI_42001000_LABEL
#define CONFIG_SPI_SAM0_SERCOM2_BASE_ADDRESS ATMEL_SAM0_SPI_42001000_BASE_ADDRESS #define CONFIG_SPI_SAM0_SERCOM2_BASE_ADDRESS DT_ATMEL_SAM0_SPI_42001000_BASE_ADDRESS
#define CONFIG_SPI_SAM0_SERCOM2_DIPO ATMEL_SAM0_SPI_42001000_DIPO #define CONFIG_SPI_SAM0_SERCOM2_DIPO DT_ATMEL_SAM0_SPI_42001000_DIPO
#define CONFIG_SPI_SAM0_SERCOM2_DOPO ATMEL_SAM0_SPI_42001000_DOPO #define CONFIG_SPI_SAM0_SERCOM2_DOPO DT_ATMEL_SAM0_SPI_42001000_DOPO
#define CONFIG_SPI_SAM0_SERCOM3_LABEL ATMEL_SAM0_SPI_42001400_LABEL #define CONFIG_SPI_SAM0_SERCOM3_LABEL DT_ATMEL_SAM0_SPI_42001400_LABEL
#define CONFIG_SPI_SAM0_SERCOM3_BASE_ADDRESS ATMEL_SAM0_SPI_42001400_BASE_ADDRESS #define CONFIG_SPI_SAM0_SERCOM3_BASE_ADDRESS DT_ATMEL_SAM0_SPI_42001400_BASE_ADDRESS
#define CONFIG_SPI_SAM0_SERCOM3_DIPO ATMEL_SAM0_SPI_42001400_DIPO #define CONFIG_SPI_SAM0_SERCOM3_DIPO DT_ATMEL_SAM0_SPI_42001400_DIPO
#define CONFIG_SPI_SAM0_SERCOM3_DOPO ATMEL_SAM0_SPI_42001400_DOPO #define CONFIG_SPI_SAM0_SERCOM3_DOPO DT_ATMEL_SAM0_SPI_42001400_DOPO
#define CONFIG_SPI_SAM0_SERCOM4_LABEL ATMEL_SAM0_SPI_42001800_LABEL #define CONFIG_SPI_SAM0_SERCOM4_LABEL DT_ATMEL_SAM0_SPI_42001800_LABEL
#define CONFIG_SPI_SAM0_SERCOM4_BASE_ADDRESS ATMEL_SAM0_SPI_42001800_BASE_ADDRESS #define CONFIG_SPI_SAM0_SERCOM4_BASE_ADDRESS DT_ATMEL_SAM0_SPI_42001800_BASE_ADDRESS
#define CONFIG_SPI_SAM0_SERCOM4_DIPO ATMEL_SAM0_SPI_42001800_DIPO #define CONFIG_SPI_SAM0_SERCOM4_DIPO DT_ATMEL_SAM0_SPI_42001800_DIPO
#define CONFIG_SPI_SAM0_SERCOM4_DOPO ATMEL_SAM0_SPI_42001800_DOPO #define CONFIG_SPI_SAM0_SERCOM4_DOPO DT_ATMEL_SAM0_SPI_42001800_DOPO
#define CONFIG_SPI_SAM0_SERCOM5_LABEL ATMEL_SAM0_SPI_42001C00_LABEL #define CONFIG_SPI_SAM0_SERCOM5_LABEL DT_ATMEL_SAM0_SPI_42001C00_LABEL
#define CONFIG_SPI_SAM0_SERCOM5_BASE_ADDRESS ATMEL_SAM0_SPI_42001C00_BASE_ADDRESS #define CONFIG_SPI_SAM0_SERCOM5_BASE_ADDRESS DT_ATMEL_SAM0_SPI_42001C00_BASE_ADDRESS
#define CONFIG_SPI_SAM0_SERCOM5_DIPO ATMEL_SAM0_SPI_42001C00_DIPO #define CONFIG_SPI_SAM0_SERCOM5_DIPO DT_ATMEL_SAM0_SPI_42001C00_DIPO
#define CONFIG_SPI_SAM0_SERCOM5_DOPO ATMEL_SAM0_SPI_42001C00_DOPO #define CONFIG_SPI_SAM0_SERCOM5_DOPO DT_ATMEL_SAM0_SPI_42001C00_DOPO
#define CONFIG_WDT_SAM0_IRQ ATMEL_SAM0_WATCHDOG_40001000_IRQ_0 #define CONFIG_WDT_SAM0_IRQ DT_ATMEL_SAM0_WATCHDOG_40001000_IRQ_0
#define CONFIG_WDT_SAM0_IRQ_PRIORITY ATMEL_SAM0_WATCHDOG_40001000_IRQ_0_PRIORITY #define CONFIG_WDT_SAM0_IRQ_PRIORITY DT_ATMEL_SAM0_WATCHDOG_40001000_IRQ_0_PRIORITY
#define CONFIG_WDT_SAM0_LABEL ATMEL_SAM0_WATCHDOG_40001000_LABEL #define CONFIG_WDT_SAM0_LABEL DT_ATMEL_SAM0_WATCHDOG_40001000_LABEL
#define CONFIG_WDT_SAM0_BASE_ADDRESS ATMEL_SAM0_WATCHDOG_40001000_BASE_ADDRESS #define CONFIG_WDT_SAM0_BASE_ADDRESS DT_ATMEL_SAM0_WATCHDOG_40001000_BASE_ADDRESS
#define CONFIG_PINMUX_SAM0_A_BASE_ADDRESS ATMEL_SAM0_PINMUX_41004400_BASE_ADDRESS #define CONFIG_PINMUX_SAM0_A_BASE_ADDRESS DT_ATMEL_SAM0_PINMUX_41004400_BASE_ADDRESS
#define CONFIG_PINMUX_SAM0_A_LABEL ATMEL_SAM0_PINMUX_41004400_LABEL #define CONFIG_PINMUX_SAM0_A_LABEL DT_ATMEL_SAM0_PINMUX_41004400_LABEL
#define CONFIG_PINMUX_SAM0_B_BASE_ADDRESS ATMEL_SAM0_PINMUX_41004480_BASE_ADDRESS #define CONFIG_PINMUX_SAM0_B_BASE_ADDRESS DT_ATMEL_SAM0_PINMUX_41004480_BASE_ADDRESS
#define CONFIG_PINMUX_SAM0_B_LABEL ATMEL_SAM0_PINMUX_41004480_LABEL #define CONFIG_PINMUX_SAM0_B_LABEL DT_ATMEL_SAM0_PINMUX_41004480_LABEL
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

170
soc/arm/atmel_sam0/samd21/dts_fixup.h
View file

@ -1,108 +1,108 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define FLASH_DEV_BASE_ADDRESS ATMEL_SAM0_NVMCTRL_41004000_BASE_ADDRESS #define FLASH_DEV_BASE_ADDRESS DT_ATMEL_SAM0_NVMCTRL_41004000_BASE_ADDRESS
#define FLASH_DEV_NAME ATMEL_SAM0_NVMCTRL_41004000_LABEL #define FLASH_DEV_NAME DT_ATMEL_SAM0_NVMCTRL_41004000_LABEL
#define CONFIG_GPIO_SAM0_PORTA_LABEL ATMEL_SAM0_GPIO_41004400_LABEL #define CONFIG_GPIO_SAM0_PORTA_LABEL DT_ATMEL_SAM0_GPIO_41004400_LABEL
#define CONFIG_GPIO_SAM0_PORTA_BASE_ADDRESS ATMEL_SAM0_GPIO_41004400_BASE_ADDRESS #define CONFIG_GPIO_SAM0_PORTA_BASE_ADDRESS DT_ATMEL_SAM0_GPIO_41004400_BASE_ADDRESS
#define CONFIG_GPIO_SAM0_PORTB_LABEL ATMEL_SAM0_GPIO_41004480_LABEL #define CONFIG_GPIO_SAM0_PORTB_LABEL DT_ATMEL_SAM0_GPIO_41004480_LABEL
#define CONFIG_GPIO_SAM0_PORTB_BASE_ADDRESS ATMEL_SAM0_GPIO_41004480_BASE_ADDRESS #define CONFIG_GPIO_SAM0_PORTB_BASE_ADDRESS DT_ATMEL_SAM0_GPIO_41004480_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM0_CURRENT_SPEED ATMEL_SAM0_UART_42000800_CURRENT_SPEED #define CONFIG_UART_SAM0_SERCOM0_CURRENT_SPEED DT_ATMEL_SAM0_UART_42000800_CURRENT_SPEED
#define CONFIG_UART_SAM0_SERCOM0_IRQ ATMEL_SAM0_UART_42000800_IRQ_0 #define CONFIG_UART_SAM0_SERCOM0_IRQ DT_ATMEL_SAM0_UART_42000800_IRQ_0
#define CONFIG_UART_SAM0_SERCOM0_IRQ_PRIORITY ATMEL_SAM0_UART_42000800_IRQ_0_PRIORITY #define CONFIG_UART_SAM0_SERCOM0_IRQ_PRIORITY DT_ATMEL_SAM0_UART_42000800_IRQ_0_PRIORITY
#define CONFIG_UART_SAM0_SERCOM0_LABEL ATMEL_SAM0_UART_42000800_LABEL #define CONFIG_UART_SAM0_SERCOM0_LABEL DT_ATMEL_SAM0_UART_42000800_LABEL
#define CONFIG_UART_SAM0_SERCOM0_BASE_ADDRESS ATMEL_SAM0_UART_42000800_BASE_ADDRESS #define CONFIG_UART_SAM0_SERCOM0_BASE_ADDRESS DT_ATMEL_SAM0_UART_42000800_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM0_RXPO ATMEL_SAM0_UART_42000800_RXPO #define CONFIG_UART_SAM0_SERCOM0_RXPO DT_ATMEL_SAM0_UART_42000800_RXPO
#define CONFIG_UART_SAM0_SERCOM0_TXPO ATMEL_SAM0_UART_42000800_TXPO #define CONFIG_UART_SAM0_SERCOM0_TXPO DT_ATMEL_SAM0_UART_42000800_TXPO
#define CONFIG_UART_SAM0_SERCOM1_CURRENT_SPEED ATMEL_SAM0_UART_42000C00_CURRENT_SPEED #define CONFIG_UART_SAM0_SERCOM1_CURRENT_SPEED DT_ATMEL_SAM0_UART_42000C00_CURRENT_SPEED
#define CONFIG_UART_SAM0_SERCOM1_IRQ ATMEL_SAM0_UART_42000C00_IRQ_0 #define CONFIG_UART_SAM0_SERCOM1_IRQ DT_ATMEL_SAM0_UART_42000C00_IRQ_0
#define CONFIG_UART_SAM0_SERCOM1_IRQ_PRIORITY ATMEL_SAM0_UART_42000C00_IRQ_0_PRIORITY #define CONFIG_UART_SAM0_SERCOM1_IRQ_PRIORITY DT_ATMEL_SAM0_UART_42000C00_IRQ_0_PRIORITY
#define CONFIG_UART_SAM0_SERCOM1_LABEL ATMEL_SAM0_UART_42000C00_LABEL #define CONFIG_UART_SAM0_SERCOM1_LABEL DT_ATMEL_SAM0_UART_42000C00_LABEL
#define CONFIG_UART_SAM0_SERCOM1_BASE_ADDRESS ATMEL_SAM0_UART_42000C00_BASE_ADDRESS #define CONFIG_UART_SAM0_SERCOM1_BASE_ADDRESS DT_ATMEL_SAM0_UART_42000C00_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM1_RXPO ATMEL_SAM0_UART_42000C00_RXPO #define CONFIG_UART_SAM0_SERCOM1_RXPO DT_ATMEL_SAM0_UART_42000C00_RXPO
#define CONFIG_UART_SAM0_SERCOM1_TXPO ATMEL_SAM0_UART_42000C00_TXPO #define CONFIG_UART_SAM0_SERCOM1_TXPO DT_ATMEL_SAM0_UART_42000C00_TXPO
#define CONFIG_UART_SAM0_SERCOM2_CURRENT_SPEED ATMEL_SAM0_UART_42001000_CURRENT_SPEED #define CONFIG_UART_SAM0_SERCOM2_CURRENT_SPEED DT_ATMEL_SAM0_UART_42001000_CURRENT_SPEED
#define CONFIG_UART_SAM0_SERCOM2_IRQ ATMEL_SAM0_UART_42001000_IRQ_0 #define CONFIG_UART_SAM0_SERCOM2_IRQ DT_ATMEL_SAM0_UART_42001000_IRQ_0
#define CONFIG_UART_SAM0_SERCOM2_IRQ_PRIORITY ATMEL_SAM0_UART_42001000_IRQ_0_PRIORITY #define CONFIG_UART_SAM0_SERCOM2_IRQ_PRIORITY DT_ATMEL_SAM0_UART_42001000_IRQ_0_PRIORITY
#define CONFIG_UART_SAM0_SERCOM2_LABEL ATMEL_SAM0_UART_42001000_LABEL #define CONFIG_UART_SAM0_SERCOM2_LABEL DT_ATMEL_SAM0_UART_42001000_LABEL
#define CONFIG_UART_SAM0_SERCOM2_BASE_ADDRESS ATMEL_SAM0_UART_42001000_BASE_ADDRESS #define CONFIG_UART_SAM0_SERCOM2_BASE_ADDRESS DT_ATMEL_SAM0_UART_42001000_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM2_RXPO ATMEL_SAM0_UART_42001000_RXPO #define CONFIG_UART_SAM0_SERCOM2_RXPO DT_ATMEL_SAM0_UART_42001000_RXPO
#define CONFIG_UART_SAM0_SERCOM2_TXPO ATMEL_SAM0_UART_42001000_TXPO #define CONFIG_UART_SAM0_SERCOM2_TXPO DT_ATMEL_SAM0_UART_42001000_TXPO
#define CONFIG_UART_SAM0_SERCOM3_CURRENT_SPEED ATMEL_SAM0_UART_42001400_CURRENT_SPEED #define CONFIG_UART_SAM0_SERCOM3_CURRENT_SPEED DT_ATMEL_SAM0_UART_42001400_CURRENT_SPEED
#define CONFIG_UART_SAM0_SERCOM3_IRQ ATMEL_SAM0_UART_42001400_IRQ_0 #define CONFIG_UART_SAM0_SERCOM3_IRQ DT_ATMEL_SAM0_UART_42001400_IRQ_0
#define CONFIG_UART_SAM0_SERCOM3_IRQ_PRIORITY ATMEL_SAM0_UART_42001400_IRQ_0_PRIORITY #define CONFIG_UART_SAM0_SERCOM3_IRQ_PRIORITY DT_ATMEL_SAM0_UART_42001400_IRQ_0_PRIORITY
#define CONFIG_UART_SAM0_SERCOM3_LABEL ATMEL_SAM0_UART_42001400_LABEL #define CONFIG_UART_SAM0_SERCOM3_LABEL DT_ATMEL_SAM0_UART_42001400_LABEL
#define CONFIG_UART_SAM0_SERCOM3_BASE_ADDRESS ATMEL_SAM0_UART_42001400_BASE_ADDRESS #define CONFIG_UART_SAM0_SERCOM3_BASE_ADDRESS DT_ATMEL_SAM0_UART_42001400_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM3_RXPO ATMEL_SAM0_UART_42001400_RXPO #define CONFIG_UART_SAM0_SERCOM3_RXPO DT_ATMEL_SAM0_UART_42001400_RXPO
#define CONFIG_UART_SAM0_SERCOM3_TXPO ATMEL_SAM0_UART_42001400_TXPO #define CONFIG_UART_SAM0_SERCOM3_TXPO DT_ATMEL_SAM0_UART_42001400_TXPO
#define CONFIG_UART_SAM0_SERCOM4_CURRENT_SPEED ATMEL_SAM0_UART_42001800_CURRENT_SPEED #define CONFIG_UART_SAM0_SERCOM4_CURRENT_SPEED DT_ATMEL_SAM0_UART_42001800_CURRENT_SPEED
#define CONFIG_UART_SAM0_SERCOM4_IRQ ATMEL_SAM0_UART_42001800_IRQ_0 #define CONFIG_UART_SAM0_SERCOM4_IRQ DT_ATMEL_SAM0_UART_42001800_IRQ_0
#define CONFIG_UART_SAM0_SERCOM4_IRQ_PRIORITY ATMEL_SAM0_UART_42001800_IRQ_0_PRIORITY #define CONFIG_UART_SAM0_SERCOM4_IRQ_PRIORITY DT_ATMEL_SAM0_UART_42001800_IRQ_0_PRIORITY
#define CONFIG_UART_SAM0_SERCOM4_LABEL ATMEL_SAM0_UART_42001800_LABEL #define CONFIG_UART_SAM0_SERCOM4_LABEL DT_ATMEL_SAM0_UART_42001800_LABEL
#define CONFIG_UART_SAM0_SERCOM4_BASE_ADDRESS ATMEL_SAM0_UART_42001800_BASE_ADDRESS #define CONFIG_UART_SAM0_SERCOM4_BASE_ADDRESS DT_ATMEL_SAM0_UART_42001800_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM4_RXPO ATMEL_SAM0_UART_42001800_RXPO #define CONFIG_UART_SAM0_SERCOM4_RXPO DT_ATMEL_SAM0_UART_42001800_RXPO
#define CONFIG_UART_SAM0_SERCOM4_TXPO ATMEL_SAM0_UART_42001800_TXPO #define CONFIG_UART_SAM0_SERCOM4_TXPO DT_ATMEL_SAM0_UART_42001800_TXPO
#define CONFIG_UART_SAM0_SERCOM5_CURRENT_SPEED ATMEL_SAM0_UART_42001C00_CURRENT_SPEED #define CONFIG_UART_SAM0_SERCOM5_CURRENT_SPEED DT_ATMEL_SAM0_UART_42001C00_CURRENT_SPEED
#define CONFIG_UART_SAM0_SERCOM5_IRQ ATMEL_SAM0_UART_42001C00_IRQ_0 #define CONFIG_UART_SAM0_SERCOM5_IRQ DT_ATMEL_SAM0_UART_42001C00_IRQ_0
#define CONFIG_UART_SAM0_SERCOM5_IRQ_PRIORITY ATMEL_SAM0_UART_42001C00_IRQ_0_PRIORITY #define CONFIG_UART_SAM0_SERCOM5_IRQ_PRIORITY DT_ATMEL_SAM0_UART_42001C00_IRQ_0_PRIORITY
#define CONFIG_UART_SAM0_SERCOM5_LABEL ATMEL_SAM0_UART_42001C00_LABEL #define CONFIG_UART_SAM0_SERCOM5_LABEL DT_ATMEL_SAM0_UART_42001C00_LABEL
#define CONFIG_UART_SAM0_SERCOM5_BASE_ADDRESS ATMEL_SAM0_UART_42001C00_BASE_ADDRESS #define CONFIG_UART_SAM0_SERCOM5_BASE_ADDRESS DT_ATMEL_SAM0_UART_42001C00_BASE_ADDRESS
#define CONFIG_UART_SAM0_SERCOM5_RXPO ATMEL_SAM0_UART_42001C00_RXPO #define CONFIG_UART_SAM0_SERCOM5_RXPO DT_ATMEL_SAM0_UART_42001C00_RXPO
#define CONFIG_UART_SAM0_SERCOM5_TXPO ATMEL_SAM0_UART_42001C00_TXPO #define CONFIG_UART_SAM0_SERCOM5_TXPO DT_ATMEL_SAM0_UART_42001C00_TXPO
#define CONFIG_SPI_SAM0_SERCOM0_LABEL ATMEL_SAM0_SPI_42000800_LABEL #define CONFIG_SPI_SAM0_SERCOM0_LABEL DT_ATMEL_SAM0_SPI_42000800_LABEL
#define CONFIG_SPI_SAM0_SERCOM0_BASE_ADDRESS ATMEL_SAM0_SPI_42000800_BASE_ADDRESS #define CONFIG_SPI_SAM0_SERCOM0_BASE_ADDRESS DT_ATMEL_SAM0_SPI_42000800_BASE_ADDRESS
#define CONFIG_SPI_SAM0_SERCOM0_DIPO ATMEL_SAM0_SPI_42000800_DIPO #define CONFIG_SPI_SAM0_SERCOM0_DIPO DT_ATMEL_SAM0_SPI_42000800_DIPO
#define CONFIG_SPI_SAM0_SERCOM0_DOPO ATMEL_SAM0_SPI_42000800_DOPO #define CONFIG_SPI_SAM0_SERCOM0_DOPO DT_ATMEL_SAM0_SPI_42000800_DOPO
#define CONFIG_SPI_SAM0_SERCOM1_LABEL ATMEL_SAM0_SPI_42000C00_LABEL #define CONFIG_SPI_SAM0_SERCOM1_LABEL DT_ATMEL_SAM0_SPI_42000C00_LABEL
#define CONFIG_SPI_SAM0_SERCOM1_BASE_ADDRESS ATMEL_SAM0_SPI_42000C00_BASE_ADDRESS #define CONFIG_SPI_SAM0_SERCOM1_BASE_ADDRESS DT_ATMEL_SAM0_SPI_42000C00_BASE_ADDRESS
#define CONFIG_SPI_SAM0_SERCOM1_DIPO ATMEL_SAM0_SPI_42000C00_DIPO #define CONFIG_SPI_SAM0_SERCOM1_DIPO DT_ATMEL_SAM0_SPI_42000C00_DIPO
#define CONFIG_SPI_SAM0_SERCOM1_DOPO ATMEL_SAM0_SPI_42000C00_DOPO #define CONFIG_SPI_SAM0_SERCOM1_DOPO DT_ATMEL_SAM0_SPI_42000C00_DOPO
#define CONFIG_SPI_SAM0_SERCOM2_LABEL ATMEL_SAM0_SPI_42001000_LABEL #define CONFIG_SPI_SAM0_SERCOM2_LABEL DT_ATMEL_SAM0_SPI_42001000_LABEL
#define CONFIG_SPI_SAM0_SERCOM2_BASE_ADDRESS ATMEL_SAM0_SPI_42001000_BASE_ADDRESS #define CONFIG_SPI_SAM0_SERCOM2_BASE_ADDRESS DT_ATMEL_SAM0_SPI_42001000_BASE_ADDRESS
#define CONFIG_SPI_SAM0_SERCOM2_DIPO ATMEL_SAM0_SPI_42001000_DIPO #define CONFIG_SPI_SAM0_SERCOM2_DIPO DT_ATMEL_SAM0_SPI_42001000_DIPO
#define CONFIG_SPI_SAM0_SERCOM2_DOPO ATMEL_SAM0_SPI_42001000_DOPO #define CONFIG_SPI_SAM0_SERCOM2_DOPO DT_ATMEL_SAM0_SPI_42001000_DOPO
#define CONFIG_SPI_SAM0_SERCOM3_LABEL ATMEL_SAM0_SPI_42001400_LABEL #define CONFIG_SPI_SAM0_SERCOM3_LABEL DT_ATMEL_SAM0_SPI_42001400_LABEL
#define CONFIG_SPI_SAM0_SERCOM3_BASE_ADDRESS ATMEL_SAM0_SPI_42001400_BASE_ADDRESS #define CONFIG_SPI_SAM0_SERCOM3_BASE_ADDRESS DT_ATMEL_SAM0_SPI_42001400_BASE_ADDRESS
#define CONFIG_SPI_SAM0_SERCOM3_DIPO ATMEL_SAM0_SPI_42001400_DIPO #define CONFIG_SPI_SAM0_SERCOM3_DIPO DT_ATMEL_SAM0_SPI_42001400_DIPO
#define CONFIG_SPI_SAM0_SERCOM3_DOPO ATMEL_SAM0_SPI_42001400_DOPO #define CONFIG_SPI_SAM0_SERCOM3_DOPO DT_ATMEL_SAM0_SPI_42001400_DOPO
#define CONFIG_SPI_SAM0_SERCOM4_LABEL ATMEL_SAM0_SPI_42001800_LABEL #define CONFIG_SPI_SAM0_SERCOM4_LABEL DT_ATMEL_SAM0_SPI_42001800_LABEL
#define CONFIG_SPI_SAM0_SERCOM4_BASE_ADDRESS ATMEL_SAM0_SPI_42001800_BASE_ADDRESS #define CONFIG_SPI_SAM0_SERCOM4_BASE_ADDRESS DT_ATMEL_SAM0_SPI_42001800_BASE_ADDRESS
#define CONFIG_SPI_SAM0_SERCOM4_DIPO ATMEL_SAM0_SPI_42001800_DIPO #define CONFIG_SPI_SAM0_SERCOM4_DIPO DT_ATMEL_SAM0_SPI_42001800_DIPO
#define CONFIG_SPI_SAM0_SERCOM4_DOPO ATMEL_SAM0_SPI_42001800_DOPO #define CONFIG_SPI_SAM0_SERCOM4_DOPO DT_ATMEL_SAM0_SPI_42001800_DOPO
#define CONFIG_SPI_SAM0_SERCOM5_LABEL ATMEL_SAM0_SPI_42001C00_LABEL #define CONFIG_SPI_SAM0_SERCOM5_LABEL DT_ATMEL_SAM0_SPI_42001C00_LABEL
#define CONFIG_SPI_SAM0_SERCOM5_BASE_ADDRESS ATMEL_SAM0_SPI_42001C00_BASE_ADDRESS #define CONFIG_SPI_SAM0_SERCOM5_BASE_ADDRESS DT_ATMEL_SAM0_SPI_42001C00_BASE_ADDRESS
#define CONFIG_SPI_SAM0_SERCOM5_DIPO ATMEL_SAM0_SPI_42001C00_DIPO #define CONFIG_SPI_SAM0_SERCOM5_DIPO DT_ATMEL_SAM0_SPI_42001C00_DIPO
#define CONFIG_SPI_SAM0_SERCOM5_DOPO ATMEL_SAM0_SPI_42001C00_DOPO #define CONFIG_SPI_SAM0_SERCOM5_DOPO DT_ATMEL_SAM0_SPI_42001C00_DOPO
#define CONFIG_WDT_SAM0_IRQ ATMEL_SAM0_WATCHDOG_40001000_IRQ_0 #define CONFIG_WDT_SAM0_IRQ DT_ATMEL_SAM0_WATCHDOG_40001000_IRQ_0
#define CONFIG_WDT_SAM0_IRQ_PRIORITY ATMEL_SAM0_WATCHDOG_40001000_IRQ_0_PRIORITY #define CONFIG_WDT_SAM0_IRQ_PRIORITY DT_ATMEL_SAM0_WATCHDOG_40001000_IRQ_0_PRIORITY
#define CONFIG_WDT_SAM0_LABEL ATMEL_SAM0_WATCHDOG_40001000_LABEL #define CONFIG_WDT_SAM0_LABEL DT_ATMEL_SAM0_WATCHDOG_40001000_LABEL
#define CONFIG_WDT_SAM0_BASE_ADDRESS ATMEL_SAM0_WATCHDOG_40001000_BASE_ADDRESS #define CONFIG_WDT_SAM0_BASE_ADDRESS DT_ATMEL_SAM0_WATCHDOG_40001000_BASE_ADDRESS
#define CONFIG_PINMUX_SAM0_A_BASE_ADDRESS ATMEL_SAM0_PINMUX_41004400_BASE_ADDRESS #define CONFIG_PINMUX_SAM0_A_BASE_ADDRESS DT_ATMEL_SAM0_PINMUX_41004400_BASE_ADDRESS
#define CONFIG_PINMUX_SAM0_A_LABEL ATMEL_SAM0_PINMUX_41004400_LABEL #define CONFIG_PINMUX_SAM0_A_LABEL DT_ATMEL_SAM0_PINMUX_41004400_LABEL
#define CONFIG_PINMUX_SAM0_B_BASE_ADDRESS ATMEL_SAM0_PINMUX_41004480_BASE_ADDRESS #define CONFIG_PINMUX_SAM0_B_BASE_ADDRESS DT_ATMEL_SAM0_PINMUX_41004480_BASE_ADDRESS
#define CONFIG_PINMUX_SAM0_B_LABEL ATMEL_SAM0_PINMUX_41004480_LABEL #define CONFIG_PINMUX_SAM0_B_LABEL DT_ATMEL_SAM0_PINMUX_41004480_LABEL
#define CONFIG_USB_DC_SAM0_BASE_ADDRESS ATMEL_SAM0_USB_41005000_BASE_ADDRESS #define CONFIG_USB_DC_SAM0_BASE_ADDRESS DT_ATMEL_SAM0_USB_41005000_BASE_ADDRESS
#define CONFIG_USB_DC_SAM0_IRQ ATMEL_SAM0_USB_41005000_IRQ_0 #define CONFIG_USB_DC_SAM0_IRQ DT_ATMEL_SAM0_USB_41005000_IRQ_0
#define CONFIG_USB_DC_SAM0_IRQ_PRIORITY ATMEL_SAM0_USB_41005000_IRQ_0_PRIORITY #define CONFIG_USB_DC_SAM0_IRQ_PRIORITY DT_ATMEL_SAM0_USB_41005000_IRQ_0_PRIORITY
#define CONFIG_USB_DC_SAM0_NUM_BIDIR_ENDPOINTS ATMEL_SAM0_USB_41005000_NUM_BIDIR_ENDPOINTS #define CONFIG_USB_DC_SAM0_NUM_BIDIR_ENDPOINTS DT_ATMEL_SAM0_USB_41005000_NUM_BIDIR_ENDPOINTS
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

4
soc/arm/cypress/psoc6/dts_fixup.h
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@ -7,9 +7,9 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#if defined(CONFIG_SOC_PSOC6_M0) #if defined(CONFIG_SOC_PSOC6_M0)
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#else #else
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#endif #endif
#define CONFIG_UART_PSOC6_UART_5_NAME "uart_5" #define CONFIG_UART_PSOC6_UART_5_NAME "uart_5"

128
soc/arm/nordic_nrf/nrf51/dts_fixup.h
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@ -1,82 +1,82 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_ADC_0_IRQ NORDIC_NRF_ADC_40007000_IRQ_0 #define CONFIG_ADC_0_IRQ DT_NORDIC_NRF_ADC_40007000_IRQ_0
#define CONFIG_ADC_0_IRQ_PRI NORDIC_NRF_ADC_40007000_IRQ_0_PRIORITY #define CONFIG_ADC_0_IRQ_PRI DT_NORDIC_NRF_ADC_40007000_IRQ_0_PRIORITY
#define CONFIG_ADC_0_NAME NORDIC_NRF_ADC_40007000_LABEL #define CONFIG_ADC_0_NAME DT_NORDIC_NRF_ADC_40007000_LABEL
#define CONFIG_UART_0_BASE NORDIC_NRF_UART_40002000_BASE_ADDRESS #define CONFIG_UART_0_BASE DT_NORDIC_NRF_UART_40002000_BASE_ADDRESS
#define CONFIG_UART_0_IRQ_PRI NORDIC_NRF_UART_40002000_IRQ_0_PRIORITY #define CONFIG_UART_0_IRQ_PRI DT_NORDIC_NRF_UART_40002000_IRQ_0_PRIORITY
#define CONFIG_UART_0_IRQ_NUM NORDIC_NRF_UART_40002000_IRQ_0 #define CONFIG_UART_0_IRQ_NUM DT_NORDIC_NRF_UART_40002000_IRQ_0
#define CONFIG_UART_0_BAUD_RATE NORDIC_NRF_UART_40002000_CURRENT_SPEED #define CONFIG_UART_0_BAUD_RATE DT_NORDIC_NRF_UART_40002000_CURRENT_SPEED
#define CONFIG_UART_0_NAME NORDIC_NRF_UART_40002000_LABEL #define CONFIG_UART_0_NAME DT_NORDIC_NRF_UART_40002000_LABEL
#define CONFIG_UART_0_TX_PIN NORDIC_NRF_UART_40002000_TX_PIN #define CONFIG_UART_0_TX_PIN DT_NORDIC_NRF_UART_40002000_TX_PIN
#define CONFIG_UART_0_RX_PIN NORDIC_NRF_UART_40002000_RX_PIN #define CONFIG_UART_0_RX_PIN DT_NORDIC_NRF_UART_40002000_RX_PIN
#if defined(NORDIC_NRF_UART_40002000_RTS_PIN) #if defined(DT_NORDIC_NRF_UART_40002000_RTS_PIN)
#define CONFIG_UART_0_RTS_PIN NORDIC_NRF_UART_40002000_RTS_PIN #define CONFIG_UART_0_RTS_PIN DT_NORDIC_NRF_UART_40002000_RTS_PIN
#endif #endif
#if defined(NORDIC_NRF_UART_40002000_CTS_PIN) #if defined(DT_NORDIC_NRF_UART_40002000_CTS_PIN)
#define CONFIG_UART_0_CTS_PIN NORDIC_NRF_UART_40002000_CTS_PIN #define CONFIG_UART_0_CTS_PIN DT_NORDIC_NRF_UART_40002000_CTS_PIN
#endif #endif
#define FLASH_DEV_NAME NRF_NRF51_FLASH_CONTROLLER_4001E000_LABEL #define FLASH_DEV_NAME DT_NRF_NRF51_FLASH_CONTROLLER_4001E000_LABEL
#define CONFIG_GPIO_P0_DEV_NAME NORDIC_NRF_GPIO_50000000_LABEL #define CONFIG_GPIO_P0_DEV_NAME DT_NORDIC_NRF_GPIO_50000000_LABEL
#define CONFIG_GPIOTE_IRQ_PRI NORDIC_NRF_GPIOTE_40006000_IRQ_0_PRIORITY #define CONFIG_GPIOTE_IRQ_PRI DT_NORDIC_NRF_GPIOTE_40006000_IRQ_0_PRIORITY
#define CONFIG_GPIOTE_IRQ NORDIC_NRF_GPIOTE_40006000_IRQ_0 #define CONFIG_GPIOTE_IRQ DT_NORDIC_NRF_GPIOTE_40006000_IRQ_0
#define CONFIG_I2C_0_BASE_ADDR NORDIC_NRF_I2C_40003000_BASE_ADDRESS #define CONFIG_I2C_0_BASE_ADDR DT_NORDIC_NRF_I2C_40003000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME NORDIC_NRF_I2C_40003000_LABEL #define CONFIG_I2C_0_NAME DT_NORDIC_NRF_I2C_40003000_LABEL
#define CONFIG_I2C_0_BITRATE NORDIC_NRF_I2C_40003000_CLOCK_FREQUENCY #define CONFIG_I2C_0_BITRATE DT_NORDIC_NRF_I2C_40003000_CLOCK_FREQUENCY
#define CONFIG_I2C_0_IRQ_PRI NORDIC_NRF_I2C_40003000_IRQ_0_PRIORITY #define CONFIG_I2C_0_IRQ_PRI DT_NORDIC_NRF_I2C_40003000_IRQ_0_PRIORITY
#define CONFIG_I2C_0_IRQ NORDIC_NRF_I2C_40003000_IRQ_0 #define CONFIG_I2C_0_IRQ DT_NORDIC_NRF_I2C_40003000_IRQ_0
#define CONFIG_I2C_0_SDA_PIN NORDIC_NRF_I2C_40003000_SDA_PIN #define CONFIG_I2C_0_SDA_PIN DT_NORDIC_NRF_I2C_40003000_SDA_PIN
#define CONFIG_I2C_0_SCL_PIN NORDIC_NRF_I2C_40003000_SCL_PIN #define CONFIG_I2C_0_SCL_PIN DT_NORDIC_NRF_I2C_40003000_SCL_PIN
#define CONFIG_I2C_1_BASE_ADDR NORDIC_NRF_I2C_40004000_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDR DT_NORDIC_NRF_I2C_40004000_BASE_ADDRESS
#define CONFIG_I2C_1_NAME NORDIC_NRF_I2C_40004000_LABEL #define CONFIG_I2C_1_NAME DT_NORDIC_NRF_I2C_40004000_LABEL
#define CONFIG_I2C_1_BITRATE NORDIC_NRF_I2C_40004000_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_NORDIC_NRF_I2C_40004000_CLOCK_FREQUENCY
#define CONFIG_I2C_1_IRQ_PRI NORDIC_NRF_I2C_40004000_IRQ_0_PRIORITY #define CONFIG_I2C_1_IRQ_PRI DT_NORDIC_NRF_I2C_40004000_IRQ_0_PRIORITY
#define CONFIG_I2C_1_IRQ NORDIC_NRF_I2C_40004000_IRQ_0 #define CONFIG_I2C_1_IRQ DT_NORDIC_NRF_I2C_40004000_IRQ_0
#define CONFIG_I2C_1_SDA_PIN NORDIC_NRF_I2C_40004000_SDA_PIN #define CONFIG_I2C_1_SDA_PIN DT_NORDIC_NRF_I2C_40004000_SDA_PIN
#define CONFIG_I2C_1_SCL_PIN NORDIC_NRF_I2C_40004000_SCL_PIN #define CONFIG_I2C_1_SCL_PIN DT_NORDIC_NRF_I2C_40004000_SCL_PIN
#define CONFIG_QDEC_BASE_ADDR NORDIC_NRF_QDEC_40012000_BASE_ADDRESS #define CONFIG_QDEC_BASE_ADDR DT_NORDIC_NRF_QDEC_40012000_BASE_ADDRESS
#define CONFIG_QDEC_NAME NORDIC_NRF_QDEC_40012000_LABEL #define CONFIG_QDEC_NAME DT_NORDIC_NRF_QDEC_40012000_LABEL
#define CONFIG_QDEC_IRQ_PRI NORDIC_NRF_QDEC_40012000_IRQ_0_PRIORITY #define CONFIG_QDEC_IRQ_PRI DT_NORDIC_NRF_QDEC_40012000_IRQ_0_PRIORITY
#define CONFIG_QDEC_IRQ NORDIC_NRF_QDEC_40012000_IRQ_0 #define CONFIG_QDEC_IRQ DT_NORDIC_NRF_QDEC_40012000_IRQ_0
#define CONFIG_QDEC_A_PIN NORDIC_NRF_QDEC_40012000_A_PIN #define CONFIG_QDEC_A_PIN DT_NORDIC_NRF_QDEC_40012000_A_PIN
#define CONFIG_QDEC_B_PIN NORDIC_NRF_QDEC_40012000_B_PIN #define CONFIG_QDEC_B_PIN DT_NORDIC_NRF_QDEC_40012000_B_PIN
#if defined(NORDIC_NRF_QDEC_40012000_LED_PIN) #if defined(DT_NORDIC_NRF_QDEC_40012000_LED_PIN)
#define CONFIG_QDEC_LED_PIN NORDIC_NRF_QDEC_40012000_LED_PIN #define CONFIG_QDEC_LED_PIN DT_NORDIC_NRF_QDEC_40012000_LED_PIN
#endif #endif
#if defined(NORDIC_NRF_QDEC_40012000_ENABLE_PIN) #if defined(DT_NORDIC_NRF_QDEC_40012000_ENABLE_PIN)
#define CONFIG_QDEC_ENABLE_PIN NORDIC_NRF_QDEC_40012000_ENABLE_PIN #define CONFIG_QDEC_ENABLE_PIN DT_NORDIC_NRF_QDEC_40012000_ENABLE_PIN
#endif #endif
#define CONFIG_QDEC_LED_PRE NORDIC_NRF_QDEC_40012000_LED_PRE #define CONFIG_QDEC_LED_PRE DT_NORDIC_NRF_QDEC_40012000_LED_PRE
#define CONFIG_QDEC_STEPS NORDIC_NRF_QDEC_40012000_STEPS #define CONFIG_QDEC_STEPS DT_NORDIC_NRF_QDEC_40012000_STEPS
#define CONFIG_SPI_0_BASE_ADDRESS NORDIC_NRF_SPI_40003000_BASE_ADDRESS #define CONFIG_SPI_0_BASE_ADDRESS DT_NORDIC_NRF_SPI_40003000_BASE_ADDRESS
#define CONFIG_SPI_0_NAME NORDIC_NRF_SPI_40003000_LABEL #define CONFIG_SPI_0_NAME DT_NORDIC_NRF_SPI_40003000_LABEL
#define CONFIG_SPI_0_IRQ_PRI NORDIC_NRF_SPI_40003000_IRQ_0_PRIORITY #define CONFIG_SPI_0_IRQ_PRI DT_NORDIC_NRF_SPI_40003000_IRQ_0_PRIORITY
#define CONFIG_SPI_0_IRQ NORDIC_NRF_SPI_40003000_IRQ_0 #define CONFIG_SPI_0_IRQ DT_NORDIC_NRF_SPI_40003000_IRQ_0
#define CONFIG_SPI_0_NRF_SCK_PIN NORDIC_NRF_SPI_40003000_SCK_PIN #define CONFIG_SPI_0_NRF_SCK_PIN DT_NORDIC_NRF_SPI_40003000_SCK_PIN
#define CONFIG_SPI_0_NRF_MOSI_PIN NORDIC_NRF_SPI_40003000_MOSI_PIN #define CONFIG_SPI_0_NRF_MOSI_PIN DT_NORDIC_NRF_SPI_40003000_MOSI_PIN
#define CONFIG_SPI_0_NRF_MISO_PIN NORDIC_NRF_SPI_40003000_MISO_PIN #define CONFIG_SPI_0_NRF_MISO_PIN DT_NORDIC_NRF_SPI_40003000_MISO_PIN
#define CONFIG_SPI_0_NRF_CSN_PIN NORDIC_NRF_SPI_40003000_CSN_PIN #define CONFIG_SPI_0_NRF_CSN_PIN DT_NORDIC_NRF_SPI_40003000_CSN_PIN
#define CONFIG_SPI_1_BASE_ADDRESS NORDIC_NRF_SPI_40004000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_NORDIC_NRF_SPI_40004000_BASE_ADDRESS
#define CONFIG_SPI_1_NAME NORDIC_NRF_SPI_40004000_LABEL #define CONFIG_SPI_1_NAME DT_NORDIC_NRF_SPI_40004000_LABEL
#define CONFIG_SPI_1_IRQ_PRI NORDIC_NRF_SPI_40004000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_NORDIC_NRF_SPI_40004000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_IRQ NORDIC_NRF_SPI_40004000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_NORDIC_NRF_SPI_40004000_IRQ_0
#define CONFIG_SPI_1_NRF_SCK_PIN NORDIC_NRF_SPI_40004000_SCK_PIN #define CONFIG_SPI_1_NRF_SCK_PIN DT_NORDIC_NRF_SPI_40004000_SCK_PIN
#define CONFIG_SPI_1_NRF_MOSI_PIN NORDIC_NRF_SPI_40004000_MOSI_PIN #define CONFIG_SPI_1_NRF_MOSI_PIN DT_NORDIC_NRF_SPI_40004000_MOSI_PIN
#define CONFIG_SPI_1_NRF_MISO_PIN NORDIC_NRF_SPI_40004000_MISO_PIN #define CONFIG_SPI_1_NRF_MISO_PIN DT_NORDIC_NRF_SPI_40004000_MISO_PIN
#define CONFIG_SPI_1_NRF_CSN_PIN NORDIC_NRF_SPI_40004000_CSN_PIN #define CONFIG_SPI_1_NRF_CSN_PIN DT_NORDIC_NRF_SPI_40004000_CSN_PIN
#define CONFIG_WDT_0_NAME NORDIC_NRF_WATCHDOG_40010000_LABEL #define CONFIG_WDT_0_NAME DT_NORDIC_NRF_WATCHDOG_40010000_LABEL
#define CONFIG_WDT_NRF_IRQ NORDIC_NRF_WATCHDOG_40010000_IRQ_WDT #define CONFIG_WDT_NRF_IRQ DT_NORDIC_NRF_WATCHDOG_40010000_IRQ_WDT
#define CONFIG_WDT_NRF_IRQ_PRI NORDIC_NRF_WATCHDOG_40010000_IRQ_WDT_PRIORITY #define CONFIG_WDT_NRF_IRQ_PRI DT_NORDIC_NRF_WATCHDOG_40010000_IRQ_WDT_PRIORITY
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

266
soc/arm/nordic_nrf/nrf52/dts_fixup.h
View file

@ -1,167 +1,167 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_ADC_0_IRQ NORDIC_NRF_SAADC_40007000_IRQ_0 #define CONFIG_ADC_0_IRQ DT_NORDIC_NRF_SAADC_40007000_IRQ_0
#define CONFIG_ADC_0_IRQ_PRI NORDIC_NRF_SAADC_40007000_IRQ_0_PRIORITY #define CONFIG_ADC_0_IRQ_PRI DT_NORDIC_NRF_SAADC_40007000_IRQ_0_PRIORITY
#define CONFIG_ADC_0_NAME NORDIC_NRF_SAADC_40007000_LABEL #define CONFIG_ADC_0_NAME DT_NORDIC_NRF_SAADC_40007000_LABEL
#if defined(NORDIC_NRF_UARTE_40002000_BASE_ADDRESS) #if defined(DT_NORDIC_NRF_UARTE_40002000_BASE_ADDRESS)
#define CONFIG_UART_0_BASE NORDIC_NRF_UARTE_40002000_BASE_ADDRESS #define CONFIG_UART_0_BASE DT_NORDIC_NRF_UARTE_40002000_BASE_ADDRESS
#define CONFIG_UART_0_IRQ_PRI NORDIC_NRF_UARTE_40002000_IRQ_0_PRIORITY #define CONFIG_UART_0_IRQ_PRI DT_NORDIC_NRF_UARTE_40002000_IRQ_0_PRIORITY
#define CONFIG_UART_0_IRQ_NUM NORDIC_NRF_UARTE_40002000_IRQ_0 #define CONFIG_UART_0_IRQ_NUM DT_NORDIC_NRF_UARTE_40002000_IRQ_0
#define CONFIG_UART_0_BAUD_RATE NORDIC_NRF_UARTE_40002000_CURRENT_SPEED #define CONFIG_UART_0_BAUD_RATE DT_NORDIC_NRF_UARTE_40002000_CURRENT_SPEED
#define CONFIG_UART_0_NAME NORDIC_NRF_UARTE_40002000_LABEL #define CONFIG_UART_0_NAME DT_NORDIC_NRF_UARTE_40002000_LABEL
#define CONFIG_UART_0_TX_PIN NORDIC_NRF_UARTE_40002000_TX_PIN #define CONFIG_UART_0_TX_PIN DT_NORDIC_NRF_UARTE_40002000_TX_PIN
#define CONFIG_UART_0_RX_PIN NORDIC_NRF_UARTE_40002000_RX_PIN #define CONFIG_UART_0_RX_PIN DT_NORDIC_NRF_UARTE_40002000_RX_PIN
#if defined(NORDIC_NRF_UARTE_40002000_RTS_PIN) #if defined(DT_NORDIC_NRF_UARTE_40002000_RTS_PIN)
#define CONFIG_UART_0_RTS_PIN NORDIC_NRF_UARTE_40002000_RTS_PIN #define CONFIG_UART_0_RTS_PIN DT_NORDIC_NRF_UARTE_40002000_RTS_PIN
#endif #endif
#if defined(NORDIC_NRF_UARTE_40002000_CTS_PIN) #if defined(DT_NORDIC_NRF_UARTE_40002000_CTS_PIN)
#define CONFIG_UART_0_CTS_PIN NORDIC_NRF_UARTE_40002000_CTS_PIN #define CONFIG_UART_0_CTS_PIN DT_NORDIC_NRF_UARTE_40002000_CTS_PIN
#endif #endif
#else #else
#define CONFIG_UART_0_BASE NORDIC_NRF_UART_40002000_BASE_ADDRESS #define CONFIG_UART_0_BASE DT_NORDIC_NRF_UART_40002000_BASE_ADDRESS
#define CONFIG_UART_0_IRQ_PRI NORDIC_NRF_UART_40002000_IRQ_0_PRIORITY #define CONFIG_UART_0_IRQ_PRI DT_NORDIC_NRF_UART_40002000_IRQ_0_PRIORITY
#define CONFIG_UART_0_IRQ_NUM NORDIC_NRF_UART_40002000_IRQ_0 #define CONFIG_UART_0_IRQ_NUM DT_NORDIC_NRF_UART_40002000_IRQ_0
#define CONFIG_UART_0_BAUD_RATE NORDIC_NRF_UART_40002000_CURRENT_SPEED #define CONFIG_UART_0_BAUD_RATE DT_NORDIC_NRF_UART_40002000_CURRENT_SPEED
#define CONFIG_UART_0_NAME NORDIC_NRF_UART_40002000_LABEL #define CONFIG_UART_0_NAME DT_NORDIC_NRF_UART_40002000_LABEL
#define CONFIG_UART_0_TX_PIN NORDIC_NRF_UART_40002000_TX_PIN #define CONFIG_UART_0_TX_PIN DT_NORDIC_NRF_UART_40002000_TX_PIN
#define CONFIG_UART_0_RX_PIN NORDIC_NRF_UART_40002000_RX_PIN #define CONFIG_UART_0_RX_PIN DT_NORDIC_NRF_UART_40002000_RX_PIN
#if defined(NORDIC_NRF_UART_40002000_RTS_PIN) #if defined(DT_NORDIC_NRF_UART_40002000_RTS_PIN)
#define CONFIG_UART_0_RTS_PIN NORDIC_NRF_UART_40002000_RTS_PIN #define CONFIG_UART_0_RTS_PIN DT_NORDIC_NRF_UART_40002000_RTS_PIN
#endif #endif
#if defined(NORDIC_NRF_UART_40002000_RTS_PIN) #if defined(DT_NORDIC_NRF_UART_40002000_RTS_PIN)
#define CONFIG_UART_0_CTS_PIN NORDIC_NRF_UART_40002000_CTS_PIN #define CONFIG_UART_0_CTS_PIN DT_NORDIC_NRF_UART_40002000_CTS_PIN
#endif #endif
#endif #endif
#define CONFIG_UART_1_BASE NORDIC_NRF_UARTE_40028000_BASE_ADDRESS #define CONFIG_UART_1_BASE DT_NORDIC_NRF_UARTE_40028000_BASE_ADDRESS
#define CONFIG_UART_1_IRQ_PRI NORDIC_NRF_UARTE_40028000_IRQ_0_PRIORITY #define CONFIG_UART_1_IRQ_PRI DT_NORDIC_NRF_UARTE_40028000_IRQ_0_PRIORITY
#define CONFIG_UART_1_IRQ_NUM NORDIC_NRF_UARTE_40028000_IRQ_0 #define CONFIG_UART_1_IRQ_NUM DT_NORDIC_NRF_UARTE_40028000_IRQ_0
#define CONFIG_UART_1_BAUD_RATE NORDIC_NRF_UARTE_40028000_CURRENT_SPEED #define CONFIG_UART_1_BAUD_RATE DT_NORDIC_NRF_UARTE_40028000_CURRENT_SPEED
#define CONFIG_UART_1_NAME NORDIC_NRF_UARTE_40028000_LABEL #define CONFIG_UART_1_NAME DT_NORDIC_NRF_UARTE_40028000_LABEL
#define CONFIG_UART_1_TX_PIN NORDIC_NRF_UARTE_40028000_TX_PIN #define CONFIG_UART_1_TX_PIN DT_NORDIC_NRF_UARTE_40028000_TX_PIN
#define CONFIG_UART_1_RX_PIN NORDIC_NRF_UARTE_40028000_RX_PIN #define CONFIG_UART_1_RX_PIN DT_NORDIC_NRF_UARTE_40028000_RX_PIN
#if defined(NORDIC_NRF_UARTE_40028000_RTS_PIN) #if defined(DT_NORDIC_NRF_UARTE_40028000_RTS_PIN)
#define CONFIG_UART_1_RTS_PIN NORDIC_NRF_UARTE_40028000_RTS_PIN #define CONFIG_UART_1_RTS_PIN DT_NORDIC_NRF_UARTE_40028000_RTS_PIN
#endif #endif
#if defined(NORDIC_NRF_UARTE_40028000_CTS_PIN) #if defined(DT_NORDIC_NRF_UARTE_40028000_CTS_PIN)
#define CONFIG_UART_1_CTS_PIN NORDIC_NRF_UARTE_40028000_CTS_PIN #define CONFIG_UART_1_CTS_PIN DT_NORDIC_NRF_UARTE_40028000_CTS_PIN
#endif #endif
#define FLASH_DEV_NAME NRF_NRF52_FLASH_CONTROLLER_4001E000_LABEL #define FLASH_DEV_NAME DT_NRF_NRF52_FLASH_CONTROLLER_4001E000_LABEL
#define CONFIG_GPIO_P0_DEV_NAME NORDIC_NRF_GPIO_50000000_LABEL #define CONFIG_GPIO_P0_DEV_NAME DT_NORDIC_NRF_GPIO_50000000_LABEL
#if CONFIG_HAS_HW_NRF_GPIO1 #if CONFIG_HAS_HW_NRF_GPIO1
#define CONFIG_GPIO_P1_DEV_NAME NORDIC_NRF_GPIO_50000300_LABEL #define CONFIG_GPIO_P1_DEV_NAME DT_NORDIC_NRF_GPIO_50000300_LABEL
#endif #endif
#define CONFIG_GPIOTE_IRQ_PRI NORDIC_NRF_GPIOTE_40006000_IRQ_0_PRIORITY #define CONFIG_GPIOTE_IRQ_PRI DT_NORDIC_NRF_GPIOTE_40006000_IRQ_0_PRIORITY
#define CONFIG_GPIOTE_IRQ NORDIC_NRF_GPIOTE_40006000_IRQ_0 #define CONFIG_GPIOTE_IRQ DT_NORDIC_NRF_GPIOTE_40006000_IRQ_0
#define CONFIG_I2C_0_BASE_ADDR NORDIC_NRF_I2C_40003000_BASE_ADDRESS #define CONFIG_I2C_0_BASE_ADDR DT_NORDIC_NRF_I2C_40003000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME NORDIC_NRF_I2C_40003000_LABEL #define CONFIG_I2C_0_NAME DT_NORDIC_NRF_I2C_40003000_LABEL
#define CONFIG_I2C_0_BITRATE NORDIC_NRF_I2C_40003000_CLOCK_FREQUENCY #define CONFIG_I2C_0_BITRATE DT_NORDIC_NRF_I2C_40003000_CLOCK_FREQUENCY
#define CONFIG_I2C_0_IRQ_PRI NORDIC_NRF_I2C_40003000_IRQ_0_PRIORITY #define CONFIG_I2C_0_IRQ_PRI DT_NORDIC_NRF_I2C_40003000_IRQ_0_PRIORITY
#define CONFIG_I2C_0_IRQ NORDIC_NRF_I2C_40003000_IRQ_0 #define CONFIG_I2C_0_IRQ DT_NORDIC_NRF_I2C_40003000_IRQ_0
#define CONFIG_I2C_0_SDA_PIN NORDIC_NRF_I2C_40003000_SDA_PIN #define CONFIG_I2C_0_SDA_PIN DT_NORDIC_NRF_I2C_40003000_SDA_PIN
#define CONFIG_I2C_0_SCL_PIN NORDIC_NRF_I2C_40003000_SCL_PIN #define CONFIG_I2C_0_SCL_PIN DT_NORDIC_NRF_I2C_40003000_SCL_PIN
#define CONFIG_I2C_1_BASE_ADDR NORDIC_NRF_I2C_40004000_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDR DT_NORDIC_NRF_I2C_40004000_BASE_ADDRESS
#define CONFIG_I2C_1_NAME NORDIC_NRF_I2C_40004000_LABEL #define CONFIG_I2C_1_NAME DT_NORDIC_NRF_I2C_40004000_LABEL
#define CONFIG_I2C_1_BITRATE NORDIC_NRF_I2C_40004000_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_NORDIC_NRF_I2C_40004000_CLOCK_FREQUENCY
#define CONFIG_I2C_1_IRQ_PRI NORDIC_NRF_I2C_40004000_IRQ_0_PRIORITY #define CONFIG_I2C_1_IRQ_PRI DT_NORDIC_NRF_I2C_40004000_IRQ_0_PRIORITY
#define CONFIG_I2C_1_IRQ NORDIC_NRF_I2C_40004000_IRQ_0 #define CONFIG_I2C_1_IRQ DT_NORDIC_NRF_I2C_40004000_IRQ_0
#define CONFIG_I2C_1_SDA_PIN NORDIC_NRF_I2C_40004000_SDA_PIN #define CONFIG_I2C_1_SDA_PIN DT_NORDIC_NRF_I2C_40004000_SDA_PIN
#define CONFIG_I2C_1_SCL_PIN NORDIC_NRF_I2C_40004000_SCL_PIN #define CONFIG_I2C_1_SCL_PIN DT_NORDIC_NRF_I2C_40004000_SCL_PIN
#define CONFIG_QDEC_BASE_ADDR NORDIC_NRF_QDEC_40012000_BASE_ADDRESS #define CONFIG_QDEC_BASE_ADDR DT_NORDIC_NRF_QDEC_40012000_BASE_ADDRESS
#define CONFIG_QDEC_NAME NORDIC_NRF_QDEC_40012000_LABEL #define CONFIG_QDEC_NAME DT_NORDIC_NRF_QDEC_40012000_LABEL
#define CONFIG_QDEC_IRQ_PRI NORDIC_NRF_QDEC_40012000_IRQ_0_PRIORITY #define CONFIG_QDEC_IRQ_PRI DT_NORDIC_NRF_QDEC_40012000_IRQ_0_PRIORITY
#define CONFIG_QDEC_IRQ NORDIC_NRF_QDEC_40012000_IRQ_0 #define CONFIG_QDEC_IRQ DT_NORDIC_NRF_QDEC_40012000_IRQ_0
#define CONFIG_QDEC_A_PIN NORDIC_NRF_QDEC_40012000_A_PIN #define CONFIG_QDEC_A_PIN DT_NORDIC_NRF_QDEC_40012000_A_PIN
#define CONFIG_QDEC_B_PIN NORDIC_NRF_QDEC_40012000_B_PIN #define CONFIG_QDEC_B_PIN DT_NORDIC_NRF_QDEC_40012000_B_PIN
#if defined(NORDIC_NRF_QDEC_40012000_LED_PIN) #if defined(DT_NORDIC_NRF_QDEC_40012000_LED_PIN)
#define CONFIG_QDEC_LED_PIN NORDIC_NRF_QDEC_40012000_LED_PIN #define CONFIG_QDEC_LED_PIN DT_NORDIC_NRF_QDEC_40012000_LED_PIN
#endif #endif
#if defined(NORDIC_NRF_QDEC_40012000_ENABLE_PIN) #if defined(DT_NORDIC_NRF_QDEC_40012000_ENABLE_PIN)
#define CONFIG_QDEC_ENABLE_PIN NORDIC_NRF_QDEC_40012000_ENABLE_PIN #define CONFIG_QDEC_ENABLE_PIN DT_NORDIC_NRF_QDEC_40012000_ENABLE_PIN
#endif #endif
#define CONFIG_QDEC_LED_PRE NORDIC_NRF_QDEC_40012000_LED_PRE #define CONFIG_QDEC_LED_PRE DT_NORDIC_NRF_QDEC_40012000_LED_PRE
#define CONFIG_QDEC_STEPS NORDIC_NRF_QDEC_40012000_STEPS #define CONFIG_QDEC_STEPS DT_NORDIC_NRF_QDEC_40012000_STEPS
#define CONFIG_SPI_0_BASE_ADDRESS NORDIC_NRF_SPI_40003000_BASE_ADDRESS #define CONFIG_SPI_0_BASE_ADDRESS DT_NORDIC_NRF_SPI_40003000_BASE_ADDRESS
#define CONFIG_SPI_0_NAME NORDIC_NRF_SPI_40003000_LABEL #define CONFIG_SPI_0_NAME DT_NORDIC_NRF_SPI_40003000_LABEL
#define CONFIG_SPI_0_IRQ_PRI NORDIC_NRF_SPI_40003000_IRQ_0_PRIORITY #define CONFIG_SPI_0_IRQ_PRI DT_NORDIC_NRF_SPI_40003000_IRQ_0_PRIORITY
#define CONFIG_SPI_0_IRQ NORDIC_NRF_SPI_40003000_IRQ_0 #define CONFIG_SPI_0_IRQ DT_NORDIC_NRF_SPI_40003000_IRQ_0
#define CONFIG_SPI_0_NRF_SCK_PIN NORDIC_NRF_SPI_40003000_SCK_PIN #define CONFIG_SPI_0_NRF_SCK_PIN DT_NORDIC_NRF_SPI_40003000_SCK_PIN
#define CONFIG_SPI_0_NRF_MOSI_PIN NORDIC_NRF_SPI_40003000_MOSI_PIN #define CONFIG_SPI_0_NRF_MOSI_PIN DT_NORDIC_NRF_SPI_40003000_MOSI_PIN
#define CONFIG_SPI_0_NRF_MISO_PIN NORDIC_NRF_SPI_40003000_MISO_PIN #define CONFIG_SPI_0_NRF_MISO_PIN DT_NORDIC_NRF_SPI_40003000_MISO_PIN
#define CONFIG_SPI_0_NRF_CSN_PIN NORDIC_NRF_SPI_40003000_CSN_PIN #define CONFIG_SPI_0_NRF_CSN_PIN DT_NORDIC_NRF_SPI_40003000_CSN_PIN
#define CONFIG_SPI_1_BASE_ADDRESS NORDIC_NRF_SPI_40004000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_NORDIC_NRF_SPI_40004000_BASE_ADDRESS
#define CONFIG_SPI_1_NAME NORDIC_NRF_SPI_40004000_LABEL #define CONFIG_SPI_1_NAME DT_NORDIC_NRF_SPI_40004000_LABEL
#define CONFIG_SPI_1_IRQ_PRI NORDIC_NRF_SPI_40004000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_NORDIC_NRF_SPI_40004000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_IRQ NORDIC_NRF_SPI_40004000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_NORDIC_NRF_SPI_40004000_IRQ_0
#define CONFIG_SPI_1_NRF_SCK_PIN NORDIC_NRF_SPI_40004000_SCK_PIN #define CONFIG_SPI_1_NRF_SCK_PIN DT_NORDIC_NRF_SPI_40004000_SCK_PIN
#define CONFIG_SPI_1_NRF_MOSI_PIN NORDIC_NRF_SPI_40004000_MOSI_PIN #define CONFIG_SPI_1_NRF_MOSI_PIN DT_NORDIC_NRF_SPI_40004000_MOSI_PIN
#define CONFIG_SPI_1_NRF_MISO_PIN NORDIC_NRF_SPI_40004000_MISO_PIN #define CONFIG_SPI_1_NRF_MISO_PIN DT_NORDIC_NRF_SPI_40004000_MISO_PIN
#define CONFIG_SPI_1_NRF_CSN_PIN NORDIC_NRF_SPI_40004000_CSN_PIN #define CONFIG_SPI_1_NRF_CSN_PIN DT_NORDIC_NRF_SPI_40004000_CSN_PIN
#define CONFIG_SPI_2_BASE_ADDRESS NORDIC_NRF_SPI_40023000_BASE_ADDRESS #define CONFIG_SPI_2_BASE_ADDRESS DT_NORDIC_NRF_SPI_40023000_BASE_ADDRESS
#define CONFIG_SPI_2_NAME NORDIC_NRF_SPI_40023000_LABEL #define CONFIG_SPI_2_NAME DT_NORDIC_NRF_SPI_40023000_LABEL
#define CONFIG_SPI_2_IRQ_PRI NORDIC_NRF_SPI_40023000_IRQ_0_PRIORITY #define CONFIG_SPI_2_IRQ_PRI DT_NORDIC_NRF_SPI_40023000_IRQ_0_PRIORITY
#define CONFIG_SPI_2_IRQ NORDIC_NRF_SPI_40023000_IRQ_0 #define CONFIG_SPI_2_IRQ DT_NORDIC_NRF_SPI_40023000_IRQ_0
#define CONFIG_SPI_2_NRF_SCK_PIN NORDIC_NRF_SPI_40023000_SCK_PIN #define CONFIG_SPI_2_NRF_SCK_PIN DT_NORDIC_NRF_SPI_40023000_SCK_PIN
#define CONFIG_SPI_2_NRF_MOSI_PIN NORDIC_NRF_SPI_40023000_MOSI_PIN #define CONFIG_SPI_2_NRF_MOSI_PIN DT_NORDIC_NRF_SPI_40023000_MOSI_PIN
#define CONFIG_SPI_2_NRF_MISO_PIN NORDIC_NRF_SPI_40023000_MISO_PIN #define CONFIG_SPI_2_NRF_MISO_PIN DT_NORDIC_NRF_SPI_40023000_MISO_PIN
#define CONFIG_SPI_2_NRF_CSN_PIN NORDIC_NRF_SPI_40023000_CSN_PIN #define CONFIG_SPI_2_NRF_CSN_PIN DT_NORDIC_NRF_SPI_40023000_CSN_PIN
#define CONFIG_SPI_3_BASE_ADDRESS NORDIC_NRF_SPI_4002B000_BASE_ADDRESS #define CONFIG_SPI_3_BASE_ADDRESS DT_NORDIC_NRF_SPI_4002B000_BASE_ADDRESS
#define CONFIG_SPI_3_NAME NORDIC_NRF_SPI_4002B000_LABEL #define CONFIG_SPI_3_NAME DT_NORDIC_NRF_SPI_4002B000_LABEL
#define CONFIG_SPI_3_IRQ_PRI NORDIC_NRF_SPI_4002B000_IRQ_0_PRIORITY #define CONFIG_SPI_3_IRQ_PRI DT_NORDIC_NRF_SPI_4002B000_IRQ_0_PRIORITY
#define CONFIG_SPI_3_IRQ NORDIC_NRF_SPI_4002B000_IRQ_0 #define CONFIG_SPI_3_IRQ DT_NORDIC_NRF_SPI_4002B000_IRQ_0
#define CONFIG_SPI_3_NRF_SCK_PIN NORDIC_NRF_SPI_4002B000_SCK_PIN #define CONFIG_SPI_3_NRF_SCK_PIN DT_NORDIC_NRF_SPI_4002B000_SCK_PIN
#define CONFIG_SPI_3_NRF_MOSI_PIN NORDIC_NRF_SPI_4002B000_MOSI_PIN #define CONFIG_SPI_3_NRF_MOSI_PIN DT_NORDIC_NRF_SPI_4002B000_MOSI_PIN
#define CONFIG_SPI_3_NRF_MISO_PIN NORDIC_NRF_SPI_4002B000_MISO_PIN #define CONFIG_SPI_3_NRF_MISO_PIN DT_NORDIC_NRF_SPI_4002B000_MISO_PIN
#define CONFIG_SPI_3_NRF_CSN_PIN NORDIC_NRF_SPI_4002B000_CSN_PIN #define CONFIG_SPI_3_NRF_CSN_PIN DT_NORDIC_NRF_SPI_4002B000_CSN_PIN
#define CONFIG_USBD_NRF_IRQ NORDIC_NRF_USBD_40027000_IRQ_USBD #define CONFIG_USBD_NRF_IRQ DT_NORDIC_NRF_USBD_40027000_IRQ_USBD
#define CONFIG_USBD_NRF_IRQ_PRI NORDIC_NRF_USBD_40027000_IRQ_USBD_PRIORITY #define CONFIG_USBD_NRF_IRQ_PRI DT_NORDIC_NRF_USBD_40027000_IRQ_USBD_PRIORITY
#define CONFIG_USBD_NRF_NUM_BIDIR_EP NORDIC_NRF_USBD_40027000_NUM_BIDIR_ENDPOINTS #define CONFIG_USBD_NRF_NUM_BIDIR_EP DT_NORDIC_NRF_USBD_40027000_NUM_BIDIR_ENDPOINTS
#define CONFIG_USBD_NRF_NUM_IN_EP NORDIC_NRF_USBD_40027000_NUM_IN_ENDPOINTS #define CONFIG_USBD_NRF_NUM_IN_EP DT_NORDIC_NRF_USBD_40027000_NUM_IN_ENDPOINTS
#define CONFIG_USBD_NRF_NUM_OUT_EP NORDIC_NRF_USBD_40027000_NUM_OUT_ENDPOINTS #define CONFIG_USBD_NRF_NUM_OUT_EP DT_NORDIC_NRF_USBD_40027000_NUM_OUT_ENDPOINTS
#define CONFIG_USBD_NRF_NUM_ISOIN_EP NORDIC_NRF_USBD_40027000_NUM_ISOIN_ENDPOINTS #define CONFIG_USBD_NRF_NUM_ISOIN_EP DT_NORDIC_NRF_USBD_40027000_NUM_ISOIN_ENDPOINTS
#define CONFIG_USBD_NRF_NUM_ISOOUT_EP NORDIC_NRF_USBD_40027000_NUM_ISOOUT_ENDPOINTS #define CONFIG_USBD_NRF_NUM_ISOOUT_EP DT_NORDIC_NRF_USBD_40027000_NUM_ISOOUT_ENDPOINTS
#define CONFIG_USBD_NRF_NAME NORDIC_NRF_USBD_40027000_LABEL #define CONFIG_USBD_NRF_NAME DT_NORDIC_NRF_USBD_40027000_LABEL
#define CONFIG_WDT_0_NAME NORDIC_NRF_WATCHDOG_40010000_LABEL #define CONFIG_WDT_0_NAME DT_NORDIC_NRF_WATCHDOG_40010000_LABEL
#define CONFIG_WDT_NRF_IRQ NORDIC_NRF_WATCHDOG_40010000_IRQ_WDT #define CONFIG_WDT_NRF_IRQ DT_NORDIC_NRF_WATCHDOG_40010000_IRQ_WDT
#define CONFIG_WDT_NRF_IRQ_PRI NORDIC_NRF_WATCHDOG_40010000_IRQ_WDT_PRIORITY #define CONFIG_WDT_NRF_IRQ_PRI DT_NORDIC_NRF_WATCHDOG_40010000_IRQ_WDT_PRIORITY
#if defined(NORDIC_NRF_CC310_5002A000_BASE_ADDRESS) #if defined(DT_NORDIC_NRF_CC310_5002A000_BASE_ADDRESS)
#define CONFIG_CC310_CTL_BASE_ADDR NORDIC_NRF_CC310_5002A000_BASE_ADDRESS #define CONFIG_CC310_CTL_BASE_ADDR DT_NORDIC_NRF_CC310_5002A000_BASE_ADDRESS
#define CONFIG_CC310_CTL_NAME NORDIC_NRF_CC310_5002A000_LABEL #define CONFIG_CC310_CTL_NAME DT_NORDIC_NRF_CC310_5002A000_LABEL
#define CONFIG_CC310_BASE_ADDR ARM_CRYPTOCELL_310_5002B000_BASE_ADDRESS #define CONFIG_CC310_BASE_ADDR DT_ARM_CRYPTOCELL_310_5002B000_BASE_ADDRESS
#define CONFIG_CC310_NAME ARM_CRYPTOCELL_310_5002B000_LABEL #define CONFIG_CC310_NAME DT_ARM_CRYPTOCELL_310_5002B000_LABEL
#define CONFIG_CC310_IRQ ARM_CRYPTOCELL_310_5002B000_IRQ_0 #define CONFIG_CC310_IRQ DT_ARM_CRYPTOCELL_310_5002B000_IRQ_0
#define CONFIG_CC310_IRQ_PRI ARM_CRYPTOCELL_310_5002B000_IRQ_0_PRIORITY #define CONFIG_CC310_IRQ_PRI DT_ARM_CRYPTOCELL_310_5002B000_IRQ_0_PRIORITY
#endif #endif
#define CONFIG_WNCM14A2A_UART_DRV_NAME NORDIC_NRF_UARTE_40028000_WNCM14A2A_BUS_NAME #define CONFIG_WNCM14A2A_UART_DRV_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_BUS_NAME
#define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER #define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN #define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_POWER_NAME NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER #define CONFIG_WNCM14A2A_GPIO_MDM_POWER_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_POWER_PIN NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_POWER_GPIOS_PIN #define CONFIG_WNCM14A2A_GPIO_MDM_POWER_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_POWER_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER #define CONFIG_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN #define CONFIG_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_RESET_NAME NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER #define CONFIG_WNCM14A2A_GPIO_MDM_RESET_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_RESET_PIN NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_RESET_GPIOS_PIN #define CONFIG_WNCM14A2A_GPIO_MDM_RESET_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_RESET_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER #define CONFIG_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN #define CONFIG_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN
#ifdef NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN #ifdef DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_SEND_OK_NAME NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER #define CONFIG_WNCM14A2A_GPIO_MDM_SEND_OK_NAME DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_SEND_OK_PIN NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN #define CONFIG_WNCM14A2A_GPIO_MDM_SEND_OK_PIN DT_NORDIC_NRF_UARTE_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
#endif #endif
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

158
soc/arm/nxp_imx/mcimx6x_m4/dts_fixup.h
View file

@ -4,95 +4,95 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_GPIO_IMX_PORT_1_BASE_ADDRESS NXP_IMX_GPIO_4209C000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_1_BASE_ADDRESS DT_NXP_IMX_GPIO_4209C000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_1_NAME NXP_IMX_GPIO_4209C000_LABEL #define CONFIG_GPIO_IMX_PORT_1_NAME DT_NXP_IMX_GPIO_4209C000_LABEL
#define CONFIG_GPIO_IMX_PORT_1_IRQ_0 NXP_IMX_GPIO_4209C000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_1_IRQ_0 DT_NXP_IMX_GPIO_4209C000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_1_IRQ_0_PRI NXP_IMX_GPIO_4209C000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_1_IRQ_0_PRI DT_NXP_IMX_GPIO_4209C000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_1_IRQ_1 NXP_IMX_GPIO_4209C000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_1_IRQ_1 DT_NXP_IMX_GPIO_4209C000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_1_IRQ_1_PRI NXP_IMX_GPIO_4209C000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_1_IRQ_1_PRI DT_NXP_IMX_GPIO_4209C000_IRQ_1_PRIORITY
#define CONFIG_GPIO_IMX_PORT_2_BASE_ADDRESS NXP_IMX_GPIO_420A0000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_2_BASE_ADDRESS DT_NXP_IMX_GPIO_420A0000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_2_NAME NXP_IMX_GPIO_420A0000_LABEL #define CONFIG_GPIO_IMX_PORT_2_NAME DT_NXP_IMX_GPIO_420A0000_LABEL
#define CONFIG_GPIO_IMX_PORT_2_IRQ_0 NXP_IMX_GPIO_420A0000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_2_IRQ_0 DT_NXP_IMX_GPIO_420A0000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_2_IRQ_0_PRI NXP_IMX_GPIO_420A0000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_2_IRQ_0_PRI DT_NXP_IMX_GPIO_420A0000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_2_IRQ_1 NXP_IMX_GPIO_420A0000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_2_IRQ_1 DT_NXP_IMX_GPIO_420A0000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_2_IRQ_1_PRI NXP_IMX_GPIO_420A0000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_2_IRQ_1_PRI DT_NXP_IMX_GPIO_420A0000_IRQ_1_PRIORITY
#define CONFIG_GPIO_IMX_PORT_3_BASE_ADDRESS NXP_IMX_GPIO_420A4000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_3_BASE_ADDRESS DT_NXP_IMX_GPIO_420A4000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_3_NAME NXP_IMX_GPIO_420A4000_LABEL #define CONFIG_GPIO_IMX_PORT_3_NAME DT_NXP_IMX_GPIO_420A4000_LABEL
#define CONFIG_GPIO_IMX_PORT_3_IRQ_0 NXP_IMX_GPIO_420A4000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_3_IRQ_0 DT_NXP_IMX_GPIO_420A4000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_3_IRQ_0_PRI NXP_IMX_GPIO_420A4000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_3_IRQ_0_PRI DT_NXP_IMX_GPIO_420A4000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_3_IRQ_1 NXP_IMX_GPIO_420A4000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_3_IRQ_1 DT_NXP_IMX_GPIO_420A4000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_3_IRQ_1_PRI NXP_IMX_GPIO_420A4000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_3_IRQ_1_PRI DT_NXP_IMX_GPIO_420A4000_IRQ_1_PRIORITY
#define CONFIG_GPIO_IMX_PORT_4_BASE_ADDRESS NXP_IMX_GPIO_420A8000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_4_BASE_ADDRESS DT_NXP_IMX_GPIO_420A8000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_4_NAME NXP_IMX_GPIO_420A8000_LABEL #define CONFIG_GPIO_IMX_PORT_4_NAME DT_NXP_IMX_GPIO_420A8000_LABEL
#define CONFIG_GPIO_IMX_PORT_4_IRQ_0 NXP_IMX_GPIO_420A8000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_4_IRQ_0 DT_NXP_IMX_GPIO_420A8000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_4_IRQ_0_PRI NXP_IMX_GPIO_420A8000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_4_IRQ_0_PRI DT_NXP_IMX_GPIO_420A8000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_4_IRQ_1 NXP_IMX_GPIO_420A8000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_4_IRQ_1 DT_NXP_IMX_GPIO_420A8000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_4_IRQ_1_PRI NXP_IMX_GPIO_420A8000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_4_IRQ_1_PRI DT_NXP_IMX_GPIO_420A8000_IRQ_1_PRIORITY
#define CONFIG_GPIO_IMX_PORT_5_BASE_ADDRESS NXP_IMX_GPIO_420AC000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_5_BASE_ADDRESS DT_NXP_IMX_GPIO_420AC000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_5_NAME NXP_IMX_GPIO_420AC000_LABEL #define CONFIG_GPIO_IMX_PORT_5_NAME DT_NXP_IMX_GPIO_420AC000_LABEL
#define CONFIG_GPIO_IMX_PORT_5_IRQ_0 NXP_IMX_GPIO_420AC000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_5_IRQ_0 DT_NXP_IMX_GPIO_420AC000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_5_IRQ_0_PRI NXP_IMX_GPIO_420AC000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_5_IRQ_0_PRI DT_NXP_IMX_GPIO_420AC000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_5_IRQ_1 NXP_IMX_GPIO_420AC000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_5_IRQ_1 DT_NXP_IMX_GPIO_420AC000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_5_IRQ_1_PRI NXP_IMX_GPIO_420AC000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_5_IRQ_1_PRI DT_NXP_IMX_GPIO_420AC000_IRQ_1_PRIORITY
#define CONFIG_GPIO_IMX_PORT_6_BASE_ADDRESS NXP_IMX_GPIO_420B0000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_6_BASE_ADDRESS DT_NXP_IMX_GPIO_420B0000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_6_NAME NXP_IMX_GPIO_420B0000_LABEL #define CONFIG_GPIO_IMX_PORT_6_NAME DT_NXP_IMX_GPIO_420B0000_LABEL
#define CONFIG_GPIO_IMX_PORT_6_IRQ_0 NXP_IMX_GPIO_420B0000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_6_IRQ_0 DT_NXP_IMX_GPIO_420B0000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_6_IRQ_0_PRI NXP_IMX_GPIO_420B0000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_6_IRQ_0_PRI DT_NXP_IMX_GPIO_420B0000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_6_IRQ_1 NXP_IMX_GPIO_420B0000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_6_IRQ_1 DT_NXP_IMX_GPIO_420B0000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_6_IRQ_1_PRI NXP_IMX_GPIO_420B0000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_6_IRQ_1_PRI DT_NXP_IMX_GPIO_420B0000_IRQ_1_PRIORITY
#define CONFIG_GPIO_IMX_PORT_7_BASE_ADDRESS NXP_IMX_GPIO_420B4000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_7_BASE_ADDRESS DT_NXP_IMX_GPIO_420B4000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_7_NAME NXP_IMX_GPIO_420B4000_LABEL #define CONFIG_GPIO_IMX_PORT_7_NAME DT_NXP_IMX_GPIO_420B4000_LABEL
#define CONFIG_GPIO_IMX_PORT_7_IRQ_0 NXP_IMX_GPIO_420B4000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_7_IRQ_0 DT_NXP_IMX_GPIO_420B4000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_7_IRQ_0_PRI NXP_IMX_GPIO_420B4000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_7_IRQ_0_PRI DT_NXP_IMX_GPIO_420B4000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_7_IRQ_1 NXP_IMX_GPIO_420B4000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_7_IRQ_1 DT_NXP_IMX_GPIO_420B4000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_7_IRQ_1_PRI NXP_IMX_GPIO_420B4000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_7_IRQ_1_PRI DT_NXP_IMX_GPIO_420B4000_IRQ_1_PRIORITY
#define CONFIG_UART_IMX_UART_1_BASE_ADDRESS NXP_IMX_UART_42020000_BASE_ADDRESS #define CONFIG_UART_IMX_UART_1_BASE_ADDRESS DT_NXP_IMX_UART_42020000_BASE_ADDRESS
#define CONFIG_UART_IMX_UART_1_NAME NXP_IMX_UART_42020000_LABEL #define CONFIG_UART_IMX_UART_1_NAME DT_NXP_IMX_UART_42020000_LABEL
#define CONFIG_UART_IMX_UART_1_IRQ_NUM NXP_IMX_UART_42020000_IRQ_0 #define CONFIG_UART_IMX_UART_1_IRQ_NUM DT_NXP_IMX_UART_42020000_IRQ_0
#define CONFIG_UART_IMX_UART_1_IRQ_PRI NXP_IMX_UART_42020000_IRQ_0_PRIORITY #define CONFIG_UART_IMX_UART_1_IRQ_PRI DT_NXP_IMX_UART_42020000_IRQ_0_PRIORITY
#define CONFIG_UART_IMX_UART_1_BAUD_RATE NXP_IMX_UART_42020000_CURRENT_SPEED #define CONFIG_UART_IMX_UART_1_BAUD_RATE DT_NXP_IMX_UART_42020000_CURRENT_SPEED
#define CONFIG_UART_IMX_UART_1_MODEM_MODE NXP_IMX_UART_42020000_MODEM_MODE #define CONFIG_UART_IMX_UART_1_MODEM_MODE DT_NXP_IMX_UART_42020000_MODEM_MODE
#define CONFIG_UART_IMX_UART_2_BASE_ADDRESS NXP_IMX_UART_421E8000_BASE_ADDRESS #define CONFIG_UART_IMX_UART_2_BASE_ADDRESS DT_NXP_IMX_UART_421E8000_BASE_ADDRESS
#define CONFIG_UART_IMX_UART_2_NAME NXP_IMX_UART_421E8000_LABEL #define CONFIG_UART_IMX_UART_2_NAME DT_NXP_IMX_UART_421E8000_LABEL
#define CONFIG_UART_IMX_UART_2_IRQ_NUM NXP_IMX_UART_421E8000_IRQ_0 #define CONFIG_UART_IMX_UART_2_IRQ_NUM DT_NXP_IMX_UART_421E8000_IRQ_0
#define CONFIG_UART_IMX_UART_2_IRQ_PRI NXP_IMX_UART_421E8000_IRQ_0_PRIORITY #define CONFIG_UART_IMX_UART_2_IRQ_PRI DT_NXP_IMX_UART_421E8000_IRQ_0_PRIORITY
#define CONFIG_UART_IMX_UART_2_BAUD_RATE NXP_IMX_UART_421E8000_CURRENT_SPEED #define CONFIG_UART_IMX_UART_2_BAUD_RATE DT_NXP_IMX_UART_421E8000_CURRENT_SPEED
#define CONFIG_UART_IMX_UART_2_MODEM_MODE NXP_IMX_UART_421E8000_MODEM_MODE #define CONFIG_UART_IMX_UART_2_MODEM_MODE DT_NXP_IMX_UART_421E8000_MODEM_MODE
#define CONFIG_UART_IMX_UART_3_BASE_ADDRESS NXP_IMX_UART_421EC000_BASE_ADDRESS #define CONFIG_UART_IMX_UART_3_BASE_ADDRESS DT_NXP_IMX_UART_421EC000_BASE_ADDRESS
#define CONFIG_UART_IMX_UART_3_NAME NXP_IMX_UART_421EC000_LABEL #define CONFIG_UART_IMX_UART_3_NAME DT_NXP_IMX_UART_421EC000_LABEL
#define CONFIG_UART_IMX_UART_3_IRQ_NUM NXP_IMX_UART_421EC000_IRQ_0 #define CONFIG_UART_IMX_UART_3_IRQ_NUM DT_NXP_IMX_UART_421EC000_IRQ_0
#define CONFIG_UART_IMX_UART_3_IRQ_PRI NXP_IMX_UART_421EC000_IRQ_0_PRIORITY #define CONFIG_UART_IMX_UART_3_IRQ_PRI DT_NXP_IMX_UART_421EC000_IRQ_0_PRIORITY
#define CONFIG_UART_IMX_UART_3_BAUD_RATE NXP_IMX_UART_421EC000_CURRENT_SPEED #define CONFIG_UART_IMX_UART_3_BAUD_RATE DT_NXP_IMX_UART_421EC000_CURRENT_SPEED
#define CONFIG_UART_IMX_UART_3_MODEM_MODE NXP_IMX_UART_421EC000_MODEM_MODE #define CONFIG_UART_IMX_UART_3_MODEM_MODE DT_NXP_IMX_UART_421EC000_MODEM_MODE
#define CONFIG_UART_IMX_UART_4_BASE_ADDRESS NXP_IMX_UART_421F0000_BASE_ADDRESS #define CONFIG_UART_IMX_UART_4_BASE_ADDRESS DT_NXP_IMX_UART_421F0000_BASE_ADDRESS
#define CONFIG_UART_IMX_UART_4_NAME NXP_IMX_UART_421F0000_LABEL #define CONFIG_UART_IMX_UART_4_NAME DT_NXP_IMX_UART_421F0000_LABEL
#define CONFIG_UART_IMX_UART_4_IRQ_NUM NXP_IMX_UART_421F0000_IRQ_0 #define CONFIG_UART_IMX_UART_4_IRQ_NUM DT_NXP_IMX_UART_421F0000_IRQ_0
#define CONFIG_UART_IMX_UART_4_IRQ_PRI NXP_IMX_UART_421F0000_IRQ_0_PRIORITY #define CONFIG_UART_IMX_UART_4_IRQ_PRI DT_NXP_IMX_UART_421F0000_IRQ_0_PRIORITY
#define CONFIG_UART_IMX_UART_4_BAUD_RATE NXP_IMX_UART_421F0000_CURRENT_SPEED #define CONFIG_UART_IMX_UART_4_BAUD_RATE DT_NXP_IMX_UART_421F0000_CURRENT_SPEED
#define CONFIG_UART_IMX_UART_4_MODEM_MODE NXP_IMX_UART_421F0000_MODEM_MODE #define CONFIG_UART_IMX_UART_4_MODEM_MODE DT_NXP_IMX_UART_421F0000_MODEM_MODE
#define CONFIG_UART_IMX_UART_5_BASE_ADDRESS NXP_IMX_UART_421F4000_BASE_ADDRESS #define CONFIG_UART_IMX_UART_5_BASE_ADDRESS DT_NXP_IMX_UART_421F4000_BASE_ADDRESS
#define CONFIG_UART_IMX_UART_5_NAME NXP_IMX_UART_421F4000_LABEL #define CONFIG_UART_IMX_UART_5_NAME DT_NXP_IMX_UART_421F4000_LABEL
#define CONFIG_UART_IMX_UART_5_IRQ_NUM NXP_IMX_UART_421F4000_IRQ_0 #define CONFIG_UART_IMX_UART_5_IRQ_NUM DT_NXP_IMX_UART_421F4000_IRQ_0
#define CONFIG_UART_IMX_UART_5_IRQ_PRI NXP_IMX_UART_421F4000_IRQ_0_PRIORITY #define CONFIG_UART_IMX_UART_5_IRQ_PRI DT_NXP_IMX_UART_421F4000_IRQ_0_PRIORITY
#define CONFIG_UART_IMX_UART_5_BAUD_RATE NXP_IMX_UART_421F4000_CURRENT_SPEED #define CONFIG_UART_IMX_UART_5_BAUD_RATE DT_NXP_IMX_UART_421F4000_CURRENT_SPEED
#define CONFIG_UART_IMX_UART_5_MODEM_MODE NXP_IMX_UART_421F4000_MODEM_MODE #define CONFIG_UART_IMX_UART_5_MODEM_MODE DT_NXP_IMX_UART_421F4000_MODEM_MODE
#define CONFIG_UART_IMX_UART_6_BASE_ADDRESS NXP_IMX_UART_422A0000_BASE_ADDRESS #define CONFIG_UART_IMX_UART_6_BASE_ADDRESS DT_NXP_IMX_UART_422A0000_BASE_ADDRESS
#define CONFIG_UART_IMX_UART_6_NAME NXP_IMX_UART_422A0000_LABEL #define CONFIG_UART_IMX_UART_6_NAME DT_NXP_IMX_UART_422A0000_LABEL
#define CONFIG_UART_IMX_UART_6_IRQ_NUM NXP_IMX_UART_422A0000_IRQ_0 #define CONFIG_UART_IMX_UART_6_IRQ_NUM DT_NXP_IMX_UART_422A0000_IRQ_0
#define CONFIG_UART_IMX_UART_6_IRQ_PRI NXP_IMX_UART_422A0000_IRQ_0_PRIORITY #define CONFIG_UART_IMX_UART_6_IRQ_PRI DT_NXP_IMX_UART_422A0000_IRQ_0_PRIORITY
#define CONFIG_UART_IMX_UART_6_BAUD_RATE NXP_IMX_UART_422A0000_CURRENT_SPEED #define CONFIG_UART_IMX_UART_6_BAUD_RATE DT_NXP_IMX_UART_422A0000_CURRENT_SPEED
#define CONFIG_UART_IMX_UART_6_MODEM_MODE NXP_IMX_UART_422A0000_MODEM_MODE #define CONFIG_UART_IMX_UART_6_MODEM_MODE DT_NXP_IMX_UART_422A0000_MODEM_MODE

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soc/arm/nxp_imx/mcimx7_m4/dts_fixup.h
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@ -6,105 +6,105 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_GPIO_IMX_PORT_1_NAME NXP_IMX_GPIO_30200000_LABEL #define CONFIG_GPIO_IMX_PORT_1_NAME DT_NXP_IMX_GPIO_30200000_LABEL
#define CONFIG_GPIO_IMX_PORT_1_BASE_ADDRESS NXP_IMX_GPIO_30200000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_1_BASE_ADDRESS DT_NXP_IMX_GPIO_30200000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_1_IRQ_0 NXP_IMX_GPIO_30200000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_1_IRQ_0 DT_NXP_IMX_GPIO_30200000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_1_IRQ_0_PRI NXP_IMX_GPIO_30200000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_1_IRQ_0_PRI DT_NXP_IMX_GPIO_30200000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_1_IRQ_1 NXP_IMX_GPIO_30200000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_1_IRQ_1 DT_NXP_IMX_GPIO_30200000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_1_IRQ_1_PRI NXP_IMX_GPIO_30200000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_1_IRQ_1_PRI DT_NXP_IMX_GPIO_30200000_IRQ_1_PRIORITY
#define CONFIG_GPIO_IMX_PORT_2_NAME NXP_IMX_GPIO_30210000_LABEL #define CONFIG_GPIO_IMX_PORT_2_NAME DT_NXP_IMX_GPIO_30210000_LABEL
#define CONFIG_GPIO_IMX_PORT_2_BASE_ADDRESS NXP_IMX_GPIO_30210000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_2_BASE_ADDRESS DT_NXP_IMX_GPIO_30210000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_2_IRQ_0 NXP_IMX_GPIO_30210000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_2_IRQ_0 DT_NXP_IMX_GPIO_30210000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_2_IRQ_0_PRI NXP_IMX_GPIO_30210000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_2_IRQ_0_PRI DT_NXP_IMX_GPIO_30210000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_2_IRQ_1 NXP_IMX_GPIO_30210000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_2_IRQ_1 DT_NXP_IMX_GPIO_30210000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_2_IRQ_1_PRI NXP_IMX_GPIO_30210000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_2_IRQ_1_PRI DT_NXP_IMX_GPIO_30210000_IRQ_1_PRIORITY
#define CONFIG_GPIO_IMX_PORT_3_NAME NXP_IMX_GPIO_30220000_LABEL #define CONFIG_GPIO_IMX_PORT_3_NAME DT_NXP_IMX_GPIO_30220000_LABEL
#define CONFIG_GPIO_IMX_PORT_3_BASE_ADDRESS NXP_IMX_GPIO_30220000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_3_BASE_ADDRESS DT_NXP_IMX_GPIO_30220000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_3_IRQ_0 NXP_IMX_GPIO_30220000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_3_IRQ_0 DT_NXP_IMX_GPIO_30220000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_3_IRQ_0_PRI NXP_IMX_GPIO_30220000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_3_IRQ_0_PRI DT_NXP_IMX_GPIO_30220000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_3_IRQ_1 NXP_IMX_GPIO_30220000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_3_IRQ_1 DT_NXP_IMX_GPIO_30220000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_3_IRQ_1_PRI NXP_IMX_GPIO_30220000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_3_IRQ_1_PRI DT_NXP_IMX_GPIO_30220000_IRQ_1_PRIORITY
#define CONFIG_GPIO_IMX_PORT_4_NAME NXP_IMX_GPIO_30230000_LABEL #define CONFIG_GPIO_IMX_PORT_4_NAME DT_NXP_IMX_GPIO_30230000_LABEL
#define CONFIG_GPIO_IMX_PORT_4_BASE_ADDRESS NXP_IMX_GPIO_30230000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_4_BASE_ADDRESS DT_NXP_IMX_GPIO_30230000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_4_IRQ_0 NXP_IMX_GPIO_30230000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_4_IRQ_0 DT_NXP_IMX_GPIO_30230000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_4_IRQ_0_PRI NXP_IMX_GPIO_30230000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_4_IRQ_0_PRI DT_NXP_IMX_GPIO_30230000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_4_IRQ_1 NXP_IMX_GPIO_30230000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_4_IRQ_1 DT_NXP_IMX_GPIO_30230000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_4_IRQ_1_PRI NXP_IMX_GPIO_30230000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_4_IRQ_1_PRI DT_NXP_IMX_GPIO_30230000_IRQ_1_PRIORITY
#define CONFIG_GPIO_IMX_PORT_5_NAME NXP_IMX_GPIO_30240000_LABEL #define CONFIG_GPIO_IMX_PORT_5_NAME DT_NXP_IMX_GPIO_30240000_LABEL
#define CONFIG_GPIO_IMX_PORT_5_BASE_ADDRESS NXP_IMX_GPIO_30240000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_5_BASE_ADDRESS DT_NXP_IMX_GPIO_30240000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_5_IRQ_0 NXP_IMX_GPIO_30240000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_5_IRQ_0 DT_NXP_IMX_GPIO_30240000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_5_IRQ_0_PRI NXP_IMX_GPIO_30240000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_5_IRQ_0_PRI DT_NXP_IMX_GPIO_30240000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_5_IRQ_1 NXP_IMX_GPIO_30240000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_5_IRQ_1 DT_NXP_IMX_GPIO_30240000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_5_IRQ_1_PRI NXP_IMX_GPIO_30240000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_5_IRQ_1_PRI DT_NXP_IMX_GPIO_30240000_IRQ_1_PRIORITY
#define CONFIG_GPIO_IMX_PORT_6_NAME NXP_IMX_GPIO_30250000_LABEL #define CONFIG_GPIO_IMX_PORT_6_NAME DT_NXP_IMX_GPIO_30250000_LABEL
#define CONFIG_GPIO_IMX_PORT_6_BASE_ADDRESS NXP_IMX_GPIO_30250000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_6_BASE_ADDRESS DT_NXP_IMX_GPIO_30250000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_6_IRQ_0 NXP_IMX_GPIO_30250000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_6_IRQ_0 DT_NXP_IMX_GPIO_30250000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_6_IRQ_0_PRI NXP_IMX_GPIO_30250000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_6_IRQ_0_PRI DT_NXP_IMX_GPIO_30250000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_6_IRQ_1 NXP_IMX_GPIO_30250000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_6_IRQ_1 DT_NXP_IMX_GPIO_30250000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_6_IRQ_1_PRI NXP_IMX_GPIO_30250000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_6_IRQ_1_PRI DT_NXP_IMX_GPIO_30250000_IRQ_1_PRIORITY
#define CONFIG_GPIO_IMX_PORT_7_NAME NXP_IMX_GPIO_30260000_LABEL #define CONFIG_GPIO_IMX_PORT_7_NAME DT_NXP_IMX_GPIO_30260000_LABEL
#define CONFIG_GPIO_IMX_PORT_7_BASE_ADDRESS NXP_IMX_GPIO_30260000_BASE_ADDRESS #define CONFIG_GPIO_IMX_PORT_7_BASE_ADDRESS DT_NXP_IMX_GPIO_30260000_BASE_ADDRESS
#define CONFIG_GPIO_IMX_PORT_7_IRQ_0 NXP_IMX_GPIO_30260000_IRQ_0 #define CONFIG_GPIO_IMX_PORT_7_IRQ_0 DT_NXP_IMX_GPIO_30260000_IRQ_0
#define CONFIG_GPIO_IMX_PORT_7_IRQ_0_PRI NXP_IMX_GPIO_30260000_IRQ_0_PRIORITY #define CONFIG_GPIO_IMX_PORT_7_IRQ_0_PRI DT_NXP_IMX_GPIO_30260000_IRQ_0_PRIORITY
#define CONFIG_GPIO_IMX_PORT_7_IRQ_1 NXP_IMX_GPIO_30260000_IRQ_1 #define CONFIG_GPIO_IMX_PORT_7_IRQ_1 DT_NXP_IMX_GPIO_30260000_IRQ_1
#define CONFIG_GPIO_IMX_PORT_7_IRQ_1_PRI NXP_IMX_GPIO_30260000_IRQ_1_PRIORITY #define CONFIG_GPIO_IMX_PORT_7_IRQ_1_PRI DT_NXP_IMX_GPIO_30260000_IRQ_1_PRIORITY
#define CONFIG_UART_IMX_UART_1_NAME NXP_IMX_UART_30860000_LABEL #define CONFIG_UART_IMX_UART_1_NAME DT_NXP_IMX_UART_30860000_LABEL
#define CONFIG_UART_IMX_UART_1_BASE_ADDRESS NXP_IMX_UART_30860000_BASE_ADDRESS #define CONFIG_UART_IMX_UART_1_BASE_ADDRESS DT_NXP_IMX_UART_30860000_BASE_ADDRESS
#define CONFIG_UART_IMX_UART_1_BAUD_RATE NXP_IMX_UART_30860000_CURRENT_SPEED #define CONFIG_UART_IMX_UART_1_BAUD_RATE DT_NXP_IMX_UART_30860000_CURRENT_SPEED
#define CONFIG_UART_IMX_UART_1_IRQ_NUM NXP_IMX_UART_30860000_IRQ_0 #define CONFIG_UART_IMX_UART_1_IRQ_NUM DT_NXP_IMX_UART_30860000_IRQ_0
#define CONFIG_UART_IMX_UART_1_IRQ_PRI NXP_IMX_UART_30860000_IRQ_0_PRIORITY #define CONFIG_UART_IMX_UART_1_IRQ_PRI DT_NXP_IMX_UART_30860000_IRQ_0_PRIORITY
#define CONFIG_UART_IMX_UART_1_MODEM_MODE NXP_IMX_UART_30860000_MODEM_MODE #define CONFIG_UART_IMX_UART_1_MODEM_MODE DT_NXP_IMX_UART_30860000_MODEM_MODE
#define CONFIG_UART_IMX_UART_2_NAME NXP_IMX_UART_30890000_LABEL #define CONFIG_UART_IMX_UART_2_NAME DT_NXP_IMX_UART_30890000_LABEL
#define CONFIG_UART_IMX_UART_2_BASE_ADDRESS NXP_IMX_UART_30890000_BASE_ADDRESS #define CONFIG_UART_IMX_UART_2_BASE_ADDRESS DT_NXP_IMX_UART_30890000_BASE_ADDRESS
#define CONFIG_UART_IMX_UART_2_BAUD_RATE NXP_IMX_UART_30890000_CURRENT_SPEED #define CONFIG_UART_IMX_UART_2_BAUD_RATE DT_NXP_IMX_UART_30890000_CURRENT_SPEED
#define CONFIG_UART_IMX_UART_2_IRQ_NUM NXP_IMX_UART_30890000_IRQ_0 #define CONFIG_UART_IMX_UART_2_IRQ_NUM DT_NXP_IMX_UART_30890000_IRQ_0
#define CONFIG_UART_IMX_UART_2_IRQ_PRI NXP_IMX_UART_30890000_IRQ_0_PRIORITY #define CONFIG_UART_IMX_UART_2_IRQ_PRI DT_NXP_IMX_UART_30890000_IRQ_0_PRIORITY
#define CONFIG_UART_IMX_UART_2_MODEM_MODE NXP_IMX_UART_30890000_MODEM_MODE #define CONFIG_UART_IMX_UART_2_MODEM_MODE DT_NXP_IMX_UART_30890000_MODEM_MODE
#define CONFIG_UART_IMX_UART_3_NAME NXP_IMX_UART_30880000_LABEL #define CONFIG_UART_IMX_UART_3_NAME DT_NXP_IMX_UART_30880000_LABEL
#define CONFIG_UART_IMX_UART_3_BASE_ADDRESS NXP_IMX_UART_30880000_BASE_ADDRESS #define CONFIG_UART_IMX_UART_3_BASE_ADDRESS DT_NXP_IMX_UART_30880000_BASE_ADDRESS
#define CONFIG_UART_IMX_UART_3_BAUD_RATE NXP_IMX_UART_30880000_CURRENT_SPEED #define CONFIG_UART_IMX_UART_3_BAUD_RATE DT_NXP_IMX_UART_30880000_CURRENT_SPEED
#define CONFIG_UART_IMX_UART_3_IRQ_NUM NXP_IMX_UART_30880000_IRQ_0 #define CONFIG_UART_IMX_UART_3_IRQ_NUM DT_NXP_IMX_UART_30880000_IRQ_0
#define CONFIG_UART_IMX_UART_3_IRQ_PRI NXP_IMX_UART_30880000_IRQ_0_PRIORITY #define CONFIG_UART_IMX_UART_3_IRQ_PRI DT_NXP_IMX_UART_30880000_IRQ_0_PRIORITY
#define CONFIG_UART_IMX_UART_3_MODEM_MODE NXP_IMX_UART_30880000_MODEM_MODE #define CONFIG_UART_IMX_UART_3_MODEM_MODE DT_NXP_IMX_UART_30880000_MODEM_MODE
#define CONFIG_UART_IMX_UART_4_NAME NXP_IMX_UART_30A60000_LABEL #define CONFIG_UART_IMX_UART_4_NAME DT_NXP_IMX_UART_30A60000_LABEL
#define CONFIG_UART_IMX_UART_4_BASE_ADDRESS NXP_IMX_UART_30A60000_BASE_ADDRESS #define CONFIG_UART_IMX_UART_4_BASE_ADDRESS DT_NXP_IMX_UART_30A60000_BASE_ADDRESS
#define CONFIG_UART_IMX_UART_4_BAUD_RATE NXP_IMX_UART_30A60000_CURRENT_SPEED #define CONFIG_UART_IMX_UART_4_BAUD_RATE DT_NXP_IMX_UART_30A60000_CURRENT_SPEED
#define CONFIG_UART_IMX_UART_4_IRQ_NUM NXP_IMX_UART_30A60000_IRQ_0 #define CONFIG_UART_IMX_UART_4_IRQ_NUM DT_NXP_IMX_UART_30A60000_IRQ_0
#define CONFIG_UART_IMX_UART_4_IRQ_PRI NXP_IMX_UART_30A60000_IRQ_0_PRIORITY #define CONFIG_UART_IMX_UART_4_IRQ_PRI DT_NXP_IMX_UART_30A60000_IRQ_0_PRIORITY
#define CONFIG_UART_IMX_UART_4_MODEM_MODE NXP_IMX_UART_30A60000_MODEM_MODE #define CONFIG_UART_IMX_UART_4_MODEM_MODE DT_NXP_IMX_UART_30A60000_MODEM_MODE
#define CONFIG_UART_IMX_UART_5_NAME NXP_IMX_UART_30A70000_LABEL #define CONFIG_UART_IMX_UART_5_NAME DT_NXP_IMX_UART_30A70000_LABEL
#define CONFIG_UART_IMX_UART_5_BASE_ADDRESS NXP_IMX_UART_30A70000_BASE_ADDRESS #define CONFIG_UART_IMX_UART_5_BASE_ADDRESS DT_NXP_IMX_UART_30A70000_BASE_ADDRESS
#define CONFIG_UART_IMX_UART_5_BAUD_RATE NXP_IMX_UART_30A70000_CURRENT_SPEED #define CONFIG_UART_IMX_UART_5_BAUD_RATE DT_NXP_IMX_UART_30A70000_CURRENT_SPEED
#define CONFIG_UART_IMX_UART_5_IRQ_NUM NXP_IMX_UART_30A70000_IRQ_0 #define CONFIG_UART_IMX_UART_5_IRQ_NUM DT_NXP_IMX_UART_30A70000_IRQ_0
#define CONFIG_UART_IMX_UART_5_IRQ_PRI NXP_IMX_UART_30A70000_IRQ_0_PRIORITY #define CONFIG_UART_IMX_UART_5_IRQ_PRI DT_NXP_IMX_UART_30A70000_IRQ_0_PRIORITY
#define CONFIG_UART_IMX_UART_5_MODEM_MODE NXP_IMX_UART_30A70000_MODEM_MODE #define CONFIG_UART_IMX_UART_5_MODEM_MODE DT_NXP_IMX_UART_30A70000_MODEM_MODE
#define CONFIG_UART_IMX_UART_6_NAME NXP_IMX_UART_30A80000_LABEL #define CONFIG_UART_IMX_UART_6_NAME DT_NXP_IMX_UART_30A80000_LABEL
#define CONFIG_UART_IMX_UART_6_BASE_ADDRESS NXP_IMX_UART_30A80000_BASE_ADDRESS #define CONFIG_UART_IMX_UART_6_BASE_ADDRESS DT_NXP_IMX_UART_30A80000_BASE_ADDRESS
#define CONFIG_UART_IMX_UART_6_BAUD_RATE NXP_IMX_UART_30A80000_CURRENT_SPEED #define CONFIG_UART_IMX_UART_6_BAUD_RATE DT_NXP_IMX_UART_30A80000_CURRENT_SPEED
#define CONFIG_UART_IMX_UART_6_IRQ_NUM NXP_IMX_UART_30A80000_IRQ_0 #define CONFIG_UART_IMX_UART_6_IRQ_NUM DT_NXP_IMX_UART_30A80000_IRQ_0
#define CONFIG_UART_IMX_UART_6_IRQ_PRI NXP_IMX_UART_30A80000_IRQ_0_PRIORITY #define CONFIG_UART_IMX_UART_6_IRQ_PRI DT_NXP_IMX_UART_30A80000_IRQ_0_PRIORITY
#define CONFIG_UART_IMX_UART_6_MODEM_MODE NXP_IMX_UART_30A80000_MODEM_MODE #define CONFIG_UART_IMX_UART_6_MODEM_MODE DT_NXP_IMX_UART_30A80000_MODEM_MODE
#define CONFIG_UART_IMX_UART_7_NAME NXP_IMX_UART_30A90000_LABEL #define CONFIG_UART_IMX_UART_7_NAME DT_NXP_IMX_UART_30A90000_LABEL
#define CONFIG_UART_IMX_UART_7_BASE_ADDRESS NXP_IMX_UART_30A90000_BASE_ADDRESS #define CONFIG_UART_IMX_UART_7_BASE_ADDRESS DT_NXP_IMX_UART_30A90000_BASE_ADDRESS
#define CONFIG_UART_IMX_UART_7_BAUD_RATE NXP_IMX_UART_30A90000_CURRENT_SPEED #define CONFIG_UART_IMX_UART_7_BAUD_RATE DT_NXP_IMX_UART_30A90000_CURRENT_SPEED
#define CONFIG_UART_IMX_UART_7_IRQ_NUM NXP_IMX_UART_30A90000_IRQ_0 #define CONFIG_UART_IMX_UART_7_IRQ_NUM DT_NXP_IMX_UART_30A90000_IRQ_0
#define CONFIG_UART_IMX_UART_7_IRQ_PRI NXP_IMX_UART_30A90000_IRQ_0_PRIORITY #define CONFIG_UART_IMX_UART_7_IRQ_PRI DT_NXP_IMX_UART_30A90000_IRQ_0_PRIORITY
#define CONFIG_UART_IMX_UART_7_MODEM_MODE NXP_IMX_UART_30A90000_MODEM_MODE #define CONFIG_UART_IMX_UART_7_MODEM_MODE DT_NXP_IMX_UART_30A90000_MODEM_MODE
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

58
soc/arm/nxp_imx/rt/dts_fixup.h
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@ -6,39 +6,39 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_MCUX_CCM_BASE_ADDRESS NXP_IMX_CCM_400FC000_BASE_ADDRESS #define CONFIG_MCUX_CCM_BASE_ADDRESS DT_NXP_IMX_CCM_400FC000_BASE_ADDRESS
#define CONFIG_MCUX_CCM_NAME NXP_IMX_CCM_400FC000_LABEL #define CONFIG_MCUX_CCM_NAME DT_NXP_IMX_CCM_400FC000_LABEL
#define CONFIG_MCUX_IGPIO_1_BASE_ADDRESS NXP_IMX_GPIO_401B8000_BASE_ADDRESS #define CONFIG_MCUX_IGPIO_1_BASE_ADDRESS DT_NXP_IMX_GPIO_401B8000_BASE_ADDRESS
#define CONFIG_MCUX_IGPIO_1_NAME NXP_IMX_GPIO_401B8000_LABEL #define CONFIG_MCUX_IGPIO_1_NAME DT_NXP_IMX_GPIO_401B8000_LABEL
#define CONFIG_MCUX_IGPIO_1_IRQ_0 NXP_IMX_GPIO_401B8000_IRQ_0 #define CONFIG_MCUX_IGPIO_1_IRQ_0 DT_NXP_IMX_GPIO_401B8000_IRQ_0
#define CONFIG_MCUX_IGPIO_1_IRQ_0_PRI NXP_IMX_GPIO_401B8000_IRQ_0_PRIORITY #define CONFIG_MCUX_IGPIO_1_IRQ_0_PRI DT_NXP_IMX_GPIO_401B8000_IRQ_0_PRIORITY
#define CONFIG_MCUX_IGPIO_1_IRQ_1 NXP_IMX_GPIO_401B8000_IRQ_1 #define CONFIG_MCUX_IGPIO_1_IRQ_1 DT_NXP_IMX_GPIO_401B8000_IRQ_1
#define CONFIG_MCUX_IGPIO_1_IRQ_1_PRI NXP_IMX_GPIO_401B8000_IRQ_1_PRIORITY #define CONFIG_MCUX_IGPIO_1_IRQ_1_PRI DT_NXP_IMX_GPIO_401B8000_IRQ_1_PRIORITY
#define CONFIG_MCUX_IGPIO_5_BASE_ADDRESS NXP_IMX_GPIO_400C0000_BASE_ADDRESS #define CONFIG_MCUX_IGPIO_5_BASE_ADDRESS DT_NXP_IMX_GPIO_400C0000_BASE_ADDRESS
#define CONFIG_MCUX_IGPIO_5_NAME NXP_IMX_GPIO_400C0000_LABEL #define CONFIG_MCUX_IGPIO_5_NAME DT_NXP_IMX_GPIO_400C0000_LABEL
#define CONFIG_MCUX_IGPIO_5_IRQ_0 NXP_IMX_GPIO_400C0000_IRQ_0 #define CONFIG_MCUX_IGPIO_5_IRQ_0 DT_NXP_IMX_GPIO_400C0000_IRQ_0
#define CONFIG_MCUX_IGPIO_5_IRQ_0_PRI NXP_IMX_GPIO_400C0000_IRQ_0_PRIORITY #define CONFIG_MCUX_IGPIO_5_IRQ_0_PRI DT_NXP_IMX_GPIO_400C0000_IRQ_0_PRIORITY
#define CONFIG_MCUX_IGPIO_5_IRQ_1 NXP_IMX_GPIO_400C0000_IRQ_1 #define CONFIG_MCUX_IGPIO_5_IRQ_1 DT_NXP_IMX_GPIO_400C0000_IRQ_1
#define CONFIG_MCUX_IGPIO_5_IRQ_1_PRI NXP_IMX_GPIO_400C0000_IRQ_1_PRIORITY #define CONFIG_MCUX_IGPIO_5_IRQ_1_PRI DT_NXP_IMX_GPIO_400C0000_IRQ_1_PRIORITY
#define CONFIG_UART_MCUX_LPUART_1_BASE_ADDRESS NXP_KINETIS_LPUART_40184000_BASE_ADDRESS #define CONFIG_UART_MCUX_LPUART_1_BASE_ADDRESS DT_NXP_KINETIS_LPUART_40184000_BASE_ADDRESS
#define CONFIG_UART_MCUX_LPUART_1_NAME NXP_KINETIS_LPUART_40184000_LABEL #define CONFIG_UART_MCUX_LPUART_1_NAME DT_NXP_KINETIS_LPUART_40184000_LABEL
#define CONFIG_UART_MCUX_LPUART_1_IRQ NXP_KINETIS_LPUART_40184000_IRQ_0 #define CONFIG_UART_MCUX_LPUART_1_IRQ DT_NXP_KINETIS_LPUART_40184000_IRQ_0
#define CONFIG_UART_MCUX_LPUART_1_IRQ_PRI NXP_KINETIS_LPUART_40184000_IRQ_0_PRIORITY #define CONFIG_UART_MCUX_LPUART_1_IRQ_PRI DT_NXP_KINETIS_LPUART_40184000_IRQ_0_PRIORITY
#define CONFIG_UART_MCUX_LPUART_1_BAUD_RATE NXP_KINETIS_LPUART_40184000_CURRENT_SPEED #define CONFIG_UART_MCUX_LPUART_1_BAUD_RATE DT_NXP_KINETIS_LPUART_40184000_CURRENT_SPEED
#define CONFIG_UART_MCUX_LPUART_1_CLOCK_NAME NXP_KINETIS_LPUART_40184000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_LPUART_1_CLOCK_NAME DT_NXP_KINETIS_LPUART_40184000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_LPUART_1_CLOCK_SUBSYS NXP_KINETIS_LPUART_40184000_CLOCK_NAME #define CONFIG_UART_MCUX_LPUART_1_CLOCK_SUBSYS DT_NXP_KINETIS_LPUART_40184000_CLOCK_NAME
#define CONFIG_UART_MCUX_LPUART_3_BASE_ADDRESS NXP_KINETIS_LPUART_4018C000_BASE_ADDRESS #define CONFIG_UART_MCUX_LPUART_3_BASE_ADDRESS DT_NXP_KINETIS_LPUART_4018C000_BASE_ADDRESS
#define CONFIG_UART_MCUX_LPUART_3_NAME NXP_KINETIS_LPUART_4018C000_LABEL #define CONFIG_UART_MCUX_LPUART_3_NAME DT_NXP_KINETIS_LPUART_4018C000_LABEL
#define CONFIG_UART_MCUX_LPUART_3_IRQ NXP_KINETIS_LPUART_4018C000_IRQ_0 #define CONFIG_UART_MCUX_LPUART_3_IRQ DT_NXP_KINETIS_LPUART_4018C000_IRQ_0
#define CONFIG_UART_MCUX_LPUART_3_IRQ_PRI NXP_KINETIS_LPUART_4018C000_IRQ_0_PRIORITY #define CONFIG_UART_MCUX_LPUART_3_IRQ_PRI DT_NXP_KINETIS_LPUART_4018C000_IRQ_0_PRIORITY
#define CONFIG_UART_MCUX_LPUART_3_BAUD_RATE NXP_KINETIS_LPUART_4018C000_CURRENT_SPEED #define CONFIG_UART_MCUX_LPUART_3_BAUD_RATE DT_NXP_KINETIS_LPUART_4018C000_CURRENT_SPEED
#define CONFIG_UART_MCUX_LPUART_3_CLOCK_NAME NXP_KINETIS_LPUART_4018C000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_LPUART_3_CLOCK_NAME DT_NXP_KINETIS_LPUART_4018C000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_LPUART_3_CLOCK_SUBSYS NXP_KINETIS_LPUART_4018C000_CLOCK_NAME #define CONFIG_UART_MCUX_LPUART_3_CLOCK_SUBSYS DT_NXP_KINETIS_LPUART_4018C000_CLOCK_NAME
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

234
soc/arm/nxp_kinetis/k6x/dts_fixup.h
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@ -1,144 +1,144 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_MCUX_0_BAUD_RATE NXP_KINETIS_UART_4006A000_CURRENT_SPEED #define CONFIG_UART_MCUX_0_BAUD_RATE DT_NXP_KINETIS_UART_4006A000_CURRENT_SPEED
#define CONFIG_UART_MCUX_0_NAME NXP_KINETIS_UART_4006A000_LABEL #define CONFIG_UART_MCUX_0_NAME DT_NXP_KINETIS_UART_4006A000_LABEL
#define CONFIG_UART_MCUX_0_IRQ_ERROR NXP_KINETIS_UART_4006A000_IRQ_ERROR #define CONFIG_UART_MCUX_0_IRQ_ERROR DT_NXP_KINETIS_UART_4006A000_IRQ_ERROR
#define CONFIG_UART_MCUX_0_IRQ_ERROR_PRI NXP_KINETIS_UART_4006A000_IRQ_ERROR_PRIORITY #define CONFIG_UART_MCUX_0_IRQ_ERROR_PRI DT_NXP_KINETIS_UART_4006A000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_0_IRQ_STATUS NXP_KINETIS_UART_4006A000_IRQ_STATUS #define CONFIG_UART_MCUX_0_IRQ_STATUS DT_NXP_KINETIS_UART_4006A000_IRQ_STATUS
#define CONFIG_UART_MCUX_0_IRQ_STATUS_PRI NXP_KINETIS_UART_4006A000_IRQ_STATUS_PRIORITY #define CONFIG_UART_MCUX_0_IRQ_STATUS_PRI DT_NXP_KINETIS_UART_4006A000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_0_CLOCK_NAME NXP_KINETIS_UART_4006A000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_0_CLOCK_NAME DT_NXP_KINETIS_UART_4006A000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_0_CLOCK_SUBSYS NXP_KINETIS_UART_4006A000_CLOCK_NAME #define CONFIG_UART_MCUX_0_CLOCK_SUBSYS DT_NXP_KINETIS_UART_4006A000_CLOCK_NAME
#define CONFIG_UART_MCUX_1_BAUD_RATE NXP_KINETIS_UART_4006B000_CURRENT_SPEED #define CONFIG_UART_MCUX_1_BAUD_RATE DT_NXP_KINETIS_UART_4006B000_CURRENT_SPEED
#define CONFIG_UART_MCUX_1_NAME NXP_KINETIS_UART_4006B000_LABEL #define CONFIG_UART_MCUX_1_NAME DT_NXP_KINETIS_UART_4006B000_LABEL
#define CONFIG_UART_MCUX_1_IRQ_ERROR NXP_KINETIS_UART_4006B000_IRQ_ERROR #define CONFIG_UART_MCUX_1_IRQ_ERROR DT_NXP_KINETIS_UART_4006B000_IRQ_ERROR
#define CONFIG_UART_MCUX_1_IRQ_ERROR_PRI NXP_KINETIS_UART_4006B000_IRQ_ERROR_PRIORITY #define CONFIG_UART_MCUX_1_IRQ_ERROR_PRI DT_NXP_KINETIS_UART_4006B000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_1_IRQ_STATUS NXP_KINETIS_UART_4006B000_IRQ_STATUS #define CONFIG_UART_MCUX_1_IRQ_STATUS DT_NXP_KINETIS_UART_4006B000_IRQ_STATUS
#define CONFIG_UART_MCUX_1_IRQ_STATUS_PRI NXP_KINETIS_UART_4006B000_IRQ_STATUS_PRIORITY #define CONFIG_UART_MCUX_1_IRQ_STATUS_PRI DT_NXP_KINETIS_UART_4006B000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_1_CLOCK_NAME NXP_KINETIS_UART_4006B000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_1_CLOCK_NAME DT_NXP_KINETIS_UART_4006B000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_1_CLOCK_SUBSYS NXP_KINETIS_UART_4006B000_CLOCK_NAME #define CONFIG_UART_MCUX_1_CLOCK_SUBSYS DT_NXP_KINETIS_UART_4006B000_CLOCK_NAME
#define CONFIG_UART_MCUX_2_BAUD_RATE NXP_KINETIS_UART_4006C000_CURRENT_SPEED #define CONFIG_UART_MCUX_2_BAUD_RATE DT_NXP_KINETIS_UART_4006C000_CURRENT_SPEED
#define CONFIG_UART_MCUX_2_NAME NXP_KINETIS_UART_4006C000_LABEL #define CONFIG_UART_MCUX_2_NAME DT_NXP_KINETIS_UART_4006C000_LABEL
#define CONFIG_UART_MCUX_2_IRQ_ERROR NXP_KINETIS_UART_4006C000_IRQ_ERROR #define CONFIG_UART_MCUX_2_IRQ_ERROR DT_NXP_KINETIS_UART_4006C000_IRQ_ERROR
#define CONFIG_UART_MCUX_2_IRQ_ERROR_PRI NXP_KINETIS_UART_4006C000_IRQ_ERROR_PRIORITY #define CONFIG_UART_MCUX_2_IRQ_ERROR_PRI DT_NXP_KINETIS_UART_4006C000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_2_IRQ_STATUS NXP_KINETIS_UART_4006C000_IRQ_STATUS #define CONFIG_UART_MCUX_2_IRQ_STATUS DT_NXP_KINETIS_UART_4006C000_IRQ_STATUS
#define CONFIG_UART_MCUX_2_IRQ_STATUS_PRI NXP_KINETIS_UART_4006C000_IRQ_STATUS_PRIORITY #define CONFIG_UART_MCUX_2_IRQ_STATUS_PRI DT_NXP_KINETIS_UART_4006C000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_2_CLOCK_NAME NXP_KINETIS_UART_4006C000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_2_CLOCK_NAME DT_NXP_KINETIS_UART_4006C000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_2_CLOCK_SUBSYS NXP_KINETIS_UART_4006C000_CLOCK_NAME #define CONFIG_UART_MCUX_2_CLOCK_SUBSYS DT_NXP_KINETIS_UART_4006C000_CLOCK_NAME
#define CONFIG_UART_MCUX_3_BAUD_RATE NXP_KINETIS_UART_4006D000_CURRENT_SPEED #define CONFIG_UART_MCUX_3_BAUD_RATE DT_NXP_KINETIS_UART_4006D000_CURRENT_SPEED
#define CONFIG_UART_MCUX_3_NAME NXP_KINETIS_UART_4006D000_LABEL #define CONFIG_UART_MCUX_3_NAME DT_NXP_KINETIS_UART_4006D000_LABEL
#define CONFIG_UART_MCUX_3_IRQ_ERROR NXP_KINETIS_UART_4006D000_IRQ_ERROR #define CONFIG_UART_MCUX_3_IRQ_ERROR DT_NXP_KINETIS_UART_4006D000_IRQ_ERROR
#define CONFIG_UART_MCUX_3_IRQ_ERROR_PRI NXP_KINETIS_UART_4006D000_IRQ_ERROR_PRIORITY #define CONFIG_UART_MCUX_3_IRQ_ERROR_PRI DT_NXP_KINETIS_UART_4006D000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_3_IRQ_STATUS NXP_KINETIS_UART_4006D000_IRQ_STATUS #define CONFIG_UART_MCUX_3_IRQ_STATUS DT_NXP_KINETIS_UART_4006D000_IRQ_STATUS
#define CONFIG_UART_MCUX_3_IRQ_STATUS_PRI NXP_KINETIS_UART_4006D000_IRQ_STATUS_PRIORITY #define CONFIG_UART_MCUX_3_IRQ_STATUS_PRI DT_NXP_KINETIS_UART_4006D000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_3_CLOCK_NAME NXP_KINETIS_UART_4006D000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_3_CLOCK_NAME DT_NXP_KINETIS_UART_4006D000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_3_CLOCK_SUBSYS NXP_KINETIS_UART_4006D000_CLOCK_NAME #define CONFIG_UART_MCUX_3_CLOCK_SUBSYS DT_NXP_KINETIS_UART_4006D000_CLOCK_NAME
#define CONFIG_UART_MCUX_4_BAUD_RATE NXP_KINETIS_UART_400EA000_CURRENT_SPEED #define CONFIG_UART_MCUX_4_BAUD_RATE DT_NXP_KINETIS_UART_400EA000_CURRENT_SPEED
#define CONFIG_UART_MCUX_4_NAME NXP_KINETIS_UART_400EA000_LABEL #define CONFIG_UART_MCUX_4_NAME DT_NXP_KINETIS_UART_400EA000_LABEL
#define CONFIG_UART_MCUX_4_IRQ_ERROR NXP_KINETIS_UART_400EA000_IRQ_ERROR #define CONFIG_UART_MCUX_4_IRQ_ERROR DT_NXP_KINETIS_UART_400EA000_IRQ_ERROR
#define CONFIG_UART_MCUX_4_IRQ_ERROR_PRI NXP_KINETIS_UART_400EA000_IRQ_ERROR_PRIORITY #define CONFIG_UART_MCUX_4_IRQ_ERROR_PRI DT_NXP_KINETIS_UART_400EA000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_4_IRQ_STATUS NXP_KINETIS_UART_400EA000_IRQ_STATUS #define CONFIG_UART_MCUX_4_IRQ_STATUS DT_NXP_KINETIS_UART_400EA000_IRQ_STATUS
#define CONFIG_UART_MCUX_4_IRQ_STATUS_PRI NXP_KINETIS_UART_400EA000_IRQ_STATUS_PRIORITY #define CONFIG_UART_MCUX_4_IRQ_STATUS_PRI DT_NXP_KINETIS_UART_400EA000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_4_CLOCK_NAME NXP_KINETIS_UART_400EA000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_4_CLOCK_NAME DT_NXP_KINETIS_UART_400EA000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_4_CLOCK_SUBSYS NXP_KINETIS_UART_400EA000_CLOCK_NAME #define CONFIG_UART_MCUX_4_CLOCK_SUBSYS DT_NXP_KINETIS_UART_400EA000_CLOCK_NAME
#define CONFIG_UART_MCUX_5_BAUD_RATE NXP_KINETIS_UART_400EB000_CURRENT_SPEED #define CONFIG_UART_MCUX_5_BAUD_RATE DT_NXP_KINETIS_UART_400EB000_CURRENT_SPEED
#define CONFIG_UART_MCUX_5_NAME NXP_KINETIS_UART_400EB000_LABEL #define CONFIG_UART_MCUX_5_NAME DT_NXP_KINETIS_UART_400EB000_LABEL
#define CONFIG_UART_MCUX_5_IRQ_ERROR NXP_KINETIS_UART_400EB000_IRQ_ERROR #define CONFIG_UART_MCUX_5_IRQ_ERROR DT_NXP_KINETIS_UART_400EB000_IRQ_ERROR
#define CONFIG_UART_MCUX_5_IRQ_ERROR_PRI NXP_KINETIS_UART_400EB000_IRQ_ERROR_PRIORITY #define CONFIG_UART_MCUX_5_IRQ_ERROR_PRI DT_NXP_KINETIS_UART_400EB000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_5_IRQ_STATUS NXP_KINETIS_UART_400EB000_IRQ_STATUS #define CONFIG_UART_MCUX_5_IRQ_STATUS DT_NXP_KINETIS_UART_400EB000_IRQ_STATUS
#define CONFIG_UART_MCUX_5_IRQ_STATUS_PRI NXP_KINETIS_UART_400EB000_IRQ_STATUS_PRIORITY #define CONFIG_UART_MCUX_5_IRQ_STATUS_PRI DT_NXP_KINETIS_UART_400EB000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_5_CLOCK_NAME NXP_KINETIS_UART_400EB000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_5_CLOCK_NAME DT_NXP_KINETIS_UART_400EB000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_5_CLOCK_SUBSYS NXP_KINETIS_UART_400EB000_CLOCK_NAME #define CONFIG_UART_MCUX_5_CLOCK_SUBSYS DT_NXP_KINETIS_UART_400EB000_CLOCK_NAME
#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS #define CONFIG_ADC_0_BASE_ADDRESS DT_NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS
#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0 #define CONFIG_ADC_0_IRQ DT_NXP_KINETIS_ADC16_4003B000_IRQ_0
#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY #define CONFIG_ADC_0_IRQ_PRI DT_NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL #define CONFIG_ADC_0_NAME DT_NXP_KINETIS_ADC16_4003B000_LABEL
#define CONFIG_ADC_1_BASE_ADDRESS NXP_KINETIS_ADC16_400BB000_BASE_ADDRESS #define CONFIG_ADC_1_BASE_ADDRESS DT_NXP_KINETIS_ADC16_400BB000_BASE_ADDRESS
#define CONFIG_ADC_1_IRQ NXP_KINETIS_ADC16_400BB000_IRQ_0 #define CONFIG_ADC_1_IRQ DT_NXP_KINETIS_ADC16_400BB000_IRQ_0
#define CONFIG_ADC_1_IRQ_PRI NXP_KINETIS_ADC16_400BB000_IRQ_0_PRIORITY #define CONFIG_ADC_1_IRQ_PRI DT_NXP_KINETIS_ADC16_400BB000_IRQ_0_PRIORITY
#define CONFIG_ADC_1_NAME NXP_KINETIS_ADC16_400BB000_LABEL #define CONFIG_ADC_1_NAME DT_NXP_KINETIS_ADC16_400BB000_LABEL
#define CONFIG_FTM_3_BASE_ADDRESS NXP_KINETIS_FTM_400B9000_BASE_ADDRESS #define CONFIG_FTM_3_BASE_ADDRESS DT_NXP_KINETIS_FTM_400B9000_BASE_ADDRESS
#define CONFIG_FTM_3_IRQ NXP_KINETIS_FTM_400B9000_IRQ_0 #define CONFIG_FTM_3_IRQ DT_NXP_KINETIS_FTM_400B9000_IRQ_0
#define CONFIG_FTM_3_IRQ_PRI NXP_KINETIS_FTM_400B9000_IRQ_0_PRIORITY #define CONFIG_FTM_3_IRQ_PRI DT_NXP_KINETIS_FTM_400B9000_IRQ_0_PRIORITY
#define CONFIG_FTM_3_NAME NXP_KINETIS_FTM_400B9000_LABEL #define CONFIG_FTM_3_NAME DT_NXP_KINETIS_FTM_400B9000_LABEL
#define CONFIG_SIM_BASE_ADDRESS NXP_KINETIS_SIM_40047000_BASE_ADDRESS #define CONFIG_SIM_BASE_ADDRESS DT_NXP_KINETIS_SIM_40047000_BASE_ADDRESS
#define CONFIG_SIM_NAME NXP_KINETIS_SIM_40047000_LABEL #define CONFIG_SIM_NAME DT_NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_I2C_0_NAME NXP_KINETIS_I2C_40066000_LABEL #define CONFIG_I2C_0_NAME DT_NXP_KINETIS_I2C_40066000_LABEL
#define CONFIG_I2C_MCUX_0_BASE_ADDRESS NXP_KINETIS_I2C_40066000_BASE_ADDRESS #define CONFIG_I2C_MCUX_0_BASE_ADDRESS DT_NXP_KINETIS_I2C_40066000_BASE_ADDRESS
#define CONFIG_I2C_MCUX_0_IRQ NXP_KINETIS_I2C_40066000_IRQ_0 #define CONFIG_I2C_MCUX_0_IRQ DT_NXP_KINETIS_I2C_40066000_IRQ_0
#define CONFIG_I2C_MCUX_0_IRQ_PRI NXP_KINETIS_I2C_40066000_IRQ_0_PRIORITY #define CONFIG_I2C_MCUX_0_IRQ_PRI DT_NXP_KINETIS_I2C_40066000_IRQ_0_PRIORITY
#define CONFIG_I2C_MCUX_0_BITRATE NXP_KINETIS_I2C_40066000_CLOCK_FREQUENCY #define CONFIG_I2C_MCUX_0_BITRATE DT_NXP_KINETIS_I2C_40066000_CLOCK_FREQUENCY
#define CONFIG_I2C_1_NAME NXP_KINETIS_I2C_40067000_LABEL #define CONFIG_I2C_1_NAME DT_NXP_KINETIS_I2C_40067000_LABEL
#define CONFIG_I2C_MCUX_1_BASE_ADDRESS NXP_KINETIS_I2C_40067000_BASE_ADDRESS #define CONFIG_I2C_MCUX_1_BASE_ADDRESS DT_NXP_KINETIS_I2C_40067000_BASE_ADDRESS
#define CONFIG_I2C_MCUX_1_IRQ NXP_KINETIS_I2C_40067000_IRQ_0 #define CONFIG_I2C_MCUX_1_IRQ DT_NXP_KINETIS_I2C_40067000_IRQ_0
#define CONFIG_I2C_MCUX_1_IRQ_PRI NXP_KINETIS_I2C_40067000_IRQ_0_PRIORITY #define CONFIG_I2C_MCUX_1_IRQ_PRI DT_NXP_KINETIS_I2C_40067000_IRQ_0_PRIORITY
#define CONFIG_I2C_MCUX_1_BITRATE NXP_KINETIS_I2C_40067000_CLOCK_FREQUENCY #define CONFIG_I2C_MCUX_1_BITRATE DT_NXP_KINETIS_I2C_40067000_CLOCK_FREQUENCY
#define FLASH_DEV_BASE_ADDRESS NXP_KINETIS_FTFE_40020000_BASE_ADDRESS #define FLASH_DEV_BASE_ADDRESS DT_NXP_KINETIS_FTFE_40020000_BASE_ADDRESS
#define FLASH_DEV_NAME NXP_KINETIS_FTFE_40020000_LABEL #define FLASH_DEV_NAME DT_NXP_KINETIS_FTFE_40020000_LABEL
#define CONFIG_WDT_0_NAME NXP_KINETIS_WDOG_40052000_LABEL #define CONFIG_WDT_0_NAME DT_NXP_KINETIS_WDOG_40052000_LABEL
#define CONFIG_WDT_0_BASE_ADDRESS NXP_KINETIS_WDOG_40052000_BASE_ADDRESS #define CONFIG_WDT_0_BASE_ADDRESS DT_NXP_KINETIS_WDOG_40052000_BASE_ADDRESS
#define CONFIG_WDT_0_IRQ NXP_KINETIS_WDOG_40052000_IRQ_0 #define CONFIG_WDT_0_IRQ DT_NXP_KINETIS_WDOG_40052000_IRQ_0
#define CONFIG_WDT_0_IRQ_PRI NXP_KINETIS_WDOG_40052000_IRQ_0_PRIORITY #define CONFIG_WDT_0_IRQ_PRI DT_NXP_KINETIS_WDOG_40052000_IRQ_0_PRIORITY
#define CONFIG_WDT_0_CLOCK_NAME NXP_KINETIS_WDOG_40052000_CLOCK_CONTROLLER #define CONFIG_WDT_0_CLOCK_NAME DT_NXP_KINETIS_WDOG_40052000_CLOCK_CONTROLLER
#define CONFIG_WDT_0_CLOCK_SUBSYS NXP_KINETIS_WDOG_40052000_CLOCK_NAME #define CONFIG_WDT_0_CLOCK_SUBSYS DT_NXP_KINETIS_WDOG_40052000_CLOCK_NAME
#define CONFIG_SPI_0_NAME NXP_KINETIS_DSPI_4002C000_LABEL #define CONFIG_SPI_0_NAME DT_NXP_KINETIS_DSPI_4002C000_LABEL
#define CONFIG_SPI_0_BASE_ADDRESS NXP_KINETIS_DSPI_4002C000_BASE_ADDRESS #define CONFIG_SPI_0_BASE_ADDRESS DT_NXP_KINETIS_DSPI_4002C000_BASE_ADDRESS
#define CONFIG_SPI_0_IRQ NXP_KINETIS_DSPI_4002C000_IRQ_0 #define CONFIG_SPI_0_IRQ DT_NXP_KINETIS_DSPI_4002C000_IRQ_0
#define CONFIG_SPI_0_IRQ_PRI NXP_KINETIS_DSPI_4002C000_IRQ_0_PRIORITY #define CONFIG_SPI_0_IRQ_PRI DT_NXP_KINETIS_DSPI_4002C000_IRQ_0_PRIORITY
#define CONFIG_SPI_0_CLOCK_NAME NXP_KINETIS_DSPI_4002C000_CLOCK_CONTROLLER #define CONFIG_SPI_0_CLOCK_NAME DT_NXP_KINETIS_DSPI_4002C000_CLOCK_CONTROLLER
#define CONFIG_SPI_0_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002C000_CLOCK_NAME #define CONFIG_SPI_0_CLOCK_SUBSYS DT_NXP_KINETIS_DSPI_4002C000_CLOCK_NAME
#define CONFIG_SPI_1_NAME NXP_KINETIS_DSPI_4002D000_LABEL #define CONFIG_SPI_1_NAME DT_NXP_KINETIS_DSPI_4002D000_LABEL
#define CONFIG_SPI_1_BASE_ADDRESS NXP_KINETIS_DSPI_4002D000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_NXP_KINETIS_DSPI_4002D000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ NXP_KINETIS_DSPI_4002D000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_NXP_KINETIS_DSPI_4002D000_IRQ_0
#define CONFIG_SPI_1_IRQ_PRI NXP_KINETIS_DSPI_4002D000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_NXP_KINETIS_DSPI_4002D000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_CLOCK_NAME NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER #define CONFIG_SPI_1_CLOCK_NAME DT_NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER
#define CONFIG_SPI_1_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002D000_CLOCK_NAME #define CONFIG_SPI_1_CLOCK_SUBSYS DT_NXP_KINETIS_DSPI_4002D000_CLOCK_NAME
#define CONFIG_SPI_2_NAME NXP_KINETIS_DSPI_400AC000_LABEL #define CONFIG_SPI_2_NAME DT_NXP_KINETIS_DSPI_400AC000_LABEL
#define CONFIG_SPI_2_BASE_ADDRESS NXP_KINETIS_DSPI_400AC000_BASE_ADDRESS #define CONFIG_SPI_2_BASE_ADDRESS DT_NXP_KINETIS_DSPI_400AC000_BASE_ADDRESS
#define CONFIG_SPI_2_IRQ NXP_KINETIS_DSPI_400AC000_IRQ_0 #define CONFIG_SPI_2_IRQ DT_NXP_KINETIS_DSPI_400AC000_IRQ_0
#define CONFIG_SPI_2_IRQ_PRI NXP_KINETIS_DSPI_400AC000_IRQ_0_PRIORITY #define CONFIG_SPI_2_IRQ_PRI DT_NXP_KINETIS_DSPI_400AC000_IRQ_0_PRIORITY
#define CONFIG_SPI_2_CLOCK_NAME NXP_KINETIS_DSPI_400AC000_CLOCK_CONTROLLER #define CONFIG_SPI_2_CLOCK_NAME DT_NXP_KINETIS_DSPI_400AC000_CLOCK_CONTROLLER
#define CONFIG_SPI_2_CLOCK_SUBSYS NXP_KINETIS_DSPI_400AC000_CLOCK_NAME #define CONFIG_SPI_2_CLOCK_SUBSYS DT_NXP_KINETIS_DSPI_400AC000_CLOCK_NAME
#define CONFIG_USBD_KINETIS_NAME NXP_KINETIS_USBD_40072000_LABEL #define CONFIG_USBD_KINETIS_NAME DT_NXP_KINETIS_USBD_40072000_LABEL
#define CONFIG_USBD_KINETIS_IRQ NXP_KINETIS_USBD_40072000_IRQ_USB_OTG #define CONFIG_USBD_KINETIS_IRQ DT_NXP_KINETIS_USBD_40072000_IRQ_USB_OTG
#define CONFIG_USBD_KINETIS_IRQ_PRI NXP_KINETIS_USBD_40072000_IRQ_USB_OTG_PRIORITY #define CONFIG_USBD_KINETIS_IRQ_PRI DT_NXP_KINETIS_USBD_40072000_IRQ_USB_OTG_PRIORITY
#define CONFIG_USBD_KINETIS_BASE_ADDRESS NXP_KINETIS_USBD_40072000_BASE_ADDRESS #define CONFIG_USBD_KINETIS_BASE_ADDRESS DT_NXP_KINETIS_USBD_40072000_BASE_ADDRESS
#define CONFIG_USBD_KINETIS_NUM_BIDIR_EP NXP_KINETIS_USBD_40072000_NUM_BIDIR_ENDPOINTS #define CONFIG_USBD_KINETIS_NUM_BIDIR_EP DT_NXP_KINETIS_USBD_40072000_NUM_BIDIR_ENDPOINTS
#define CONFIG_ETH_MCUX_0_NAME ETH_LABEL #define CONFIG_ETH_MCUX_0_NAME ETH_LABEL
#define CONFIG_ETH_MCUX_0_MAC3 NXP_KINETIS_ETHERNET_400C0004_LOCAL_MAC_ADDRESS_3 #define CONFIG_ETH_MCUX_0_MAC3 DT_NXP_KINETIS_ETHERNET_400C0004_LOCAL_MAC_ADDRESS_3
#define CONFIG_ETH_MCUX_0_MAC4 NXP_KINETIS_ETHERNET_400C0004_LOCAL_MAC_ADDRESS_4 #define CONFIG_ETH_MCUX_0_MAC4 DT_NXP_KINETIS_ETHERNET_400C0004_LOCAL_MAC_ADDRESS_4
#define CONFIG_ETH_MCUX_0_MAC5 NXP_KINETIS_ETHERNET_400C0004_LOCAL_MAC_ADDRESS_5 #define CONFIG_ETH_MCUX_0_MAC5 DT_NXP_KINETIS_ETHERNET_400C0004_LOCAL_MAC_ADDRESS_5
/* IRQs */ /* IRQs */
#define CONFIG_IRQ_ETH_IEEE1588_TMR NXP_KINETIS_ETHERNET_400C0004_IRQ_ERR_MISC #define CONFIG_IRQ_ETH_IEEE1588_TMR DT_NXP_KINETIS_ETHERNET_400C0004_IRQ_ERR_MISC
#define CONFIG_IRQ_ETH_RX NXP_KINETIS_ETHERNET_400C0004_IRQ_RX #define CONFIG_IRQ_ETH_RX DT_NXP_KINETIS_ETHERNET_400C0004_IRQ_RX
#define CONFIG_IRQ_ETH_TX NXP_KINETIS_ETHERNET_400C0004_IRQ_TX #define CONFIG_IRQ_ETH_TX DT_NXP_KINETIS_ETHERNET_400C0004_IRQ_TX
#define CONFIG_IRQ_ETH_ERR_MISC NXP_KINETIS_ETHERNET_400C0004_IRQ_ERR_MISC #define CONFIG_IRQ_ETH_ERR_MISC DT_NXP_KINETIS_ETHERNET_400C0004_IRQ_ERR_MISC
#define CONFIG_ETH_MCUX_0_IRQ_PRI NXP_KINETIS_ETHERNET_400C0004_IRQ_RX_PRIORITY #define CONFIG_ETH_MCUX_0_IRQ_PRI DT_NXP_KINETIS_ETHERNET_400C0004_IRQ_RX_PRIORITY
#define CONFIG_ENTROPY_MCUX_RNGA_BASE_ADDRESS NXP_KINETIS_RNGA_40029000_BASE_ADDRESS #define CONFIG_ENTROPY_MCUX_RNGA_BASE_ADDRESS DT_NXP_KINETIS_RNGA_40029000_BASE_ADDRESS
#define CONFIG_ENTROPY_MCUX_RNGA_IRQ NXP_KINETIS_RNGA_40029000_IRQ_0 #define CONFIG_ENTROPY_MCUX_RNGA_IRQ DT_NXP_KINETIS_RNGA_40029000_IRQ_0
#define CONFIG_ENTROPY_MCUX_RNGA_IRQ_PRI NXP_KINETIS_RNGA_40029000_IRQ_0_PRIORITY #define CONFIG_ENTROPY_MCUX_RNGA_IRQ_PRI DT_NXP_KINETIS_RNGA_40029000_IRQ_0_PRIORITY
#define CONFIG_ENTROPY_MCUX_RNGA_NAME NXP_KINETIS_RNGA_40029000_LABEL #define CONFIG_ENTROPY_MCUX_RNGA_NAME DT_NXP_KINETIS_RNGA_40029000_LABEL
#define CONFIG_ENTROPY_NAME NXP_KINETIS_RNGA_40029000_LABEL #define CONFIG_ENTROPY_NAME DT_NXP_KINETIS_RNGA_40029000_LABEL
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

44
soc/arm/nxp_kinetis/kl2x/dts_fixup.h
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@ -1,30 +1,30 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_MCUX_LPSCI_0_NAME NXP_KINETIS_LPSCI_4006A000_LABEL #define CONFIG_UART_MCUX_LPSCI_0_NAME DT_NXP_KINETIS_LPSCI_4006A000_LABEL
#define CONFIG_UART_MCUX_LPSCI_0_CLOCK_NAME NXP_KINETIS_LPSCI_4006A000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_LPSCI_0_CLOCK_NAME DT_NXP_KINETIS_LPSCI_4006A000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_LPSCI_0_CLOCK_SUBSYS NXP_KINETIS_LPSCI_4006A000_CLOCK_NAME #define CONFIG_UART_MCUX_LPSCI_0_CLOCK_SUBSYS DT_NXP_KINETIS_LPSCI_4006A000_CLOCK_NAME
#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS #define CONFIG_ADC_0_BASE_ADDRESS DT_NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS
#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0 #define CONFIG_ADC_0_IRQ DT_NXP_KINETIS_ADC16_4003B000_IRQ_0
#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY #define CONFIG_ADC_0_IRQ_PRI DT_NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL #define CONFIG_ADC_0_NAME DT_NXP_KINETIS_ADC16_4003B000_LABEL
#define CONFIG_SIM_BASE_ADDRESS NXP_KINETIS_SIM_40047000_BASE_ADDRESS #define CONFIG_SIM_BASE_ADDRESS DT_NXP_KINETIS_SIM_40047000_BASE_ADDRESS
#define CONFIG_SIM_NAME NXP_KINETIS_SIM_40047000_LABEL #define CONFIG_SIM_NAME DT_NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_I2C_0_NAME NXP_KINETIS_I2C_40066000_LABEL #define CONFIG_I2C_0_NAME DT_NXP_KINETIS_I2C_40066000_LABEL
#define CONFIG_I2C_MCUX_0_BASE_ADDRESS NXP_KINETIS_I2C_40066000_BASE_ADDRESS #define CONFIG_I2C_MCUX_0_BASE_ADDRESS DT_NXP_KINETIS_I2C_40066000_BASE_ADDRESS
#define CONFIG_I2C_MCUX_0_IRQ NXP_KINETIS_I2C_40066000_IRQ_0 #define CONFIG_I2C_MCUX_0_IRQ DT_NXP_KINETIS_I2C_40066000_IRQ_0
#define CONFIG_I2C_MCUX_0_IRQ_PRI NXP_KINETIS_I2C_40066000_IRQ_0_PRIORITY #define CONFIG_I2C_MCUX_0_IRQ_PRI DT_NXP_KINETIS_I2C_40066000_IRQ_0_PRIORITY
#define CONFIG_I2C_MCUX_0_BITRATE NXP_KINETIS_I2C_40066000_CLOCK_FREQUENCY #define CONFIG_I2C_MCUX_0_BITRATE DT_NXP_KINETIS_I2C_40066000_CLOCK_FREQUENCY
#define FLASH_DEV_BASE_ADDRESS NXP_KINETIS_FTFA_40020000_BASE_ADDRESS #define FLASH_DEV_BASE_ADDRESS DT_NXP_KINETIS_FTFA_40020000_BASE_ADDRESS
#define FLASH_DEV_NAME NXP_KINETIS_FTFA_40020000_LABEL #define FLASH_DEV_NAME DT_NXP_KINETIS_FTFA_40020000_LABEL
#define CONFIG_USBD_KINETIS_NAME NXP_KINETIS_USBD_40072000_LABEL #define CONFIG_USBD_KINETIS_NAME DT_NXP_KINETIS_USBD_40072000_LABEL
#define CONFIG_USBD_KINETIS_IRQ NXP_KINETIS_USBD_40072000_IRQ_USB_OTG #define CONFIG_USBD_KINETIS_IRQ DT_NXP_KINETIS_USBD_40072000_IRQ_USB_OTG
#define CONFIG_USBD_KINETIS_IRQ_PRI NXP_KINETIS_USBD_40072000_IRQ_USB_OTG_PRIORITY #define CONFIG_USBD_KINETIS_IRQ_PRI DT_NXP_KINETIS_USBD_40072000_IRQ_USB_OTG_PRIORITY
#define CONFIG_USBD_KINETIS_BASE_ADDRESS NXP_KINETIS_USBD_40072000_BASE_ADDRESS #define CONFIG_USBD_KINETIS_BASE_ADDRESS DT_NXP_KINETIS_USBD_40072000_BASE_ADDRESS
#define CONFIG_USBD_KINETIS_NUM_BIDIR_EP NXP_KINETIS_USBD_40072000_NUM_BIDIR_ENDPOINTS #define CONFIG_USBD_KINETIS_NUM_BIDIR_EP DT_NXP_KINETIS_USBD_40072000_NUM_BIDIR_ENDPOINTS
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

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soc/arm/nxp_kinetis/kwx/dts_fixup.h
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@ -1,155 +1,155 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS #define CONFIG_ADC_0_BASE_ADDRESS DT_NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS
#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0 #define CONFIG_ADC_0_IRQ DT_NXP_KINETIS_ADC16_4003B000_IRQ_0
#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY #define CONFIG_ADC_0_IRQ_PRI DT_NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL #define CONFIG_ADC_0_NAME DT_NXP_KINETIS_ADC16_4003B000_LABEL
#define CONFIG_I2C_0_NAME NXP_KINETIS_I2C_40066000_LABEL #define CONFIG_I2C_0_NAME DT_NXP_KINETIS_I2C_40066000_LABEL
#define CONFIG_I2C_MCUX_0_BASE_ADDRESS NXP_KINETIS_I2C_40066000_BASE_ADDRESS #define CONFIG_I2C_MCUX_0_BASE_ADDRESS DT_NXP_KINETIS_I2C_40066000_BASE_ADDRESS
#define CONFIG_I2C_MCUX_0_IRQ NXP_KINETIS_I2C_40066000_IRQ_0 #define CONFIG_I2C_MCUX_0_IRQ DT_NXP_KINETIS_I2C_40066000_IRQ_0
#define CONFIG_I2C_MCUX_0_IRQ_PRI NXP_KINETIS_I2C_40066000_IRQ_0_PRIORITY #define CONFIG_I2C_MCUX_0_IRQ_PRI DT_NXP_KINETIS_I2C_40066000_IRQ_0_PRIORITY
#define CONFIG_I2C_MCUX_0_BITRATE NXP_KINETIS_I2C_40066000_CLOCK_FREQUENCY #define CONFIG_I2C_MCUX_0_BITRATE DT_NXP_KINETIS_I2C_40066000_CLOCK_FREQUENCY
#define CONFIG_I2C_1_NAME NXP_KINETIS_I2C_40067000_LABEL #define CONFIG_I2C_1_NAME DT_NXP_KINETIS_I2C_40067000_LABEL
#define CONFIG_I2C_MCUX_1_BASE_ADDRESS NXP_KINETIS_I2C_40067000_BASE_ADDRESS #define CONFIG_I2C_MCUX_1_BASE_ADDRESS DT_NXP_KINETIS_I2C_40067000_BASE_ADDRESS
#define CONFIG_I2C_MCUX_1_IRQ NXP_KINETIS_I2C_40067000_IRQ_0 #define CONFIG_I2C_MCUX_1_IRQ DT_NXP_KINETIS_I2C_40067000_IRQ_0
#define CONFIG_I2C_MCUX_1_IRQ_PRI NXP_KINETIS_I2C_40067000_IRQ_0_PRIORITY #define CONFIG_I2C_MCUX_1_IRQ_PRI DT_NXP_KINETIS_I2C_40067000_IRQ_0_PRIORITY
#define CONFIG_I2C_MCUX_1_BITRATE NXP_KINETIS_I2C_40067000_CLOCK_FREQUENCY #define CONFIG_I2C_MCUX_1_BITRATE DT_NXP_KINETIS_I2C_40067000_CLOCK_FREQUENCY
#define CONFIG_FTM_1_BASE_ADDRESS NXP_KINETIS_FTM_40039000_BASE_ADDRESS #define CONFIG_FTM_1_BASE_ADDRESS DT_NXP_KINETIS_FTM_40039000_BASE_ADDRESS
#define CONFIG_FTM_1_IRQ NXP_KINETIS_FTM_40039000_IRQ_0 #define CONFIG_FTM_1_IRQ DT_NXP_KINETIS_FTM_40039000_IRQ_0
#define CONFIG_FTM_1_IRQ_PRI NXP_KINETIS_FTM_40039000_IRQ_0_PRIORITY #define CONFIG_FTM_1_IRQ_PRI DT_NXP_KINETIS_FTM_40039000_IRQ_0_PRIORITY
#define CONFIG_FTM_1_NAME NXP_KINETIS_FTM_40039000_LABEL #define CONFIG_FTM_1_NAME DT_NXP_KINETIS_FTM_40039000_LABEL
#define CONFIG_SIM_BASE_ADDRESS NXP_KINETIS_SIM_40047000_BASE_ADDRESS #define CONFIG_SIM_BASE_ADDRESS DT_NXP_KINETIS_SIM_40047000_BASE_ADDRESS
#define CONFIG_SIM_NAME NXP_KINETIS_SIM_40047000_LABEL #define CONFIG_SIM_NAME DT_NXP_KINETIS_SIM_40047000_LABEL
#define CONFIG_RTC_MCUX_0_BASE_ADDRESS NXP_KINETIS_RTC_4003D000_BASE_ADDRESS #define CONFIG_RTC_MCUX_0_BASE_ADDRESS DT_NXP_KINETIS_RTC_4003D000_BASE_ADDRESS
#define CONFIG_RTC_MCUX_0_IRQ_PRI NXP_KINETIS_RTC_4003D000_IRQ_0_PRIORITY #define CONFIG_RTC_MCUX_0_IRQ_PRI DT_NXP_KINETIS_RTC_4003D000_IRQ_0_PRIORITY
#define CONFIG_RTC_MCUX_0_IRQ NXP_KINETIS_RTC_4003D000_IRQ_0 #define CONFIG_RTC_MCUX_0_IRQ DT_NXP_KINETIS_RTC_4003D000_IRQ_0
#define CONFIG_RTC_MCUX_0_NAME NXP_KINETIS_RTC_4003D000_LABEL #define CONFIG_RTC_MCUX_0_NAME DT_NXP_KINETIS_RTC_4003D000_LABEL
#define CONFIG_RTC_PRESCALER NXP_KINETIS_RTC_4003D000_PRESCALER #define CONFIG_RTC_PRESCALER DT_NXP_KINETIS_RTC_4003D000_PRESCALER
#define CONFIG_RTC_0_NAME NXP_KINETIS_RTC_4003D000_LABEL #define CONFIG_RTC_0_NAME DT_NXP_KINETIS_RTC_4003D000_LABEL
#if defined(CONFIG_SOC_MKW22D5) || defined(CONFIG_SOC_MKW24D5) #if defined(CONFIG_SOC_MKW22D5) || defined(CONFIG_SOC_MKW24D5)
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_MCUX_0_BAUD_RATE NXP_KINETIS_UART_4006A000_CURRENT_SPEED #define CONFIG_UART_MCUX_0_BAUD_RATE DT_NXP_KINETIS_UART_4006A000_CURRENT_SPEED
#define CONFIG_UART_MCUX_0_NAME NXP_KINETIS_UART_4006A000_LABEL #define CONFIG_UART_MCUX_0_NAME DT_NXP_KINETIS_UART_4006A000_LABEL
#define CONFIG_UART_MCUX_0_IRQ_ERROR NXP_KINETIS_UART_4006A000_IRQ_ERROR #define CONFIG_UART_MCUX_0_IRQ_ERROR DT_NXP_KINETIS_UART_4006A000_IRQ_ERROR
#define CONFIG_UART_MCUX_0_IRQ_ERROR_PRI NXP_KINETIS_UART_4006A000_IRQ_ERROR_PRIORITY #define CONFIG_UART_MCUX_0_IRQ_ERROR_PRI DT_NXP_KINETIS_UART_4006A000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_0_IRQ_STATUS NXP_KINETIS_UART_4006A000_IRQ_STATUS #define CONFIG_UART_MCUX_0_IRQ_STATUS DT_NXP_KINETIS_UART_4006A000_IRQ_STATUS
#define CONFIG_UART_MCUX_0_IRQ_STATUS_PRI NXP_KINETIS_UART_4006A000_IRQ_STATUS_PRIORITY #define CONFIG_UART_MCUX_0_IRQ_STATUS_PRI DT_NXP_KINETIS_UART_4006A000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_0_CLOCK_NAME NXP_KINETIS_UART_4006A000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_0_CLOCK_NAME DT_NXP_KINETIS_UART_4006A000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_0_CLOCK_SUBSYS NXP_KINETIS_UART_4006A000_CLOCK_NAME #define CONFIG_UART_MCUX_0_CLOCK_SUBSYS DT_NXP_KINETIS_UART_4006A000_CLOCK_NAME
#define CONFIG_UART_MCUX_1_BAUD_RATE NXP_KINETIS_UART_4006B000_CURRENT_SPEED #define CONFIG_UART_MCUX_1_BAUD_RATE DT_NXP_KINETIS_UART_4006B000_CURRENT_SPEED
#define CONFIG_UART_MCUX_1_NAME NXP_KINETIS_UART_4006B000_LABEL #define CONFIG_UART_MCUX_1_NAME DT_NXP_KINETIS_UART_4006B000_LABEL
#define CONFIG_UART_MCUX_1_IRQ_ERROR NXP_KINETIS_UART_4006B000_IRQ_ERROR #define CONFIG_UART_MCUX_1_IRQ_ERROR DT_NXP_KINETIS_UART_4006B000_IRQ_ERROR
#define CONFIG_UART_MCUX_1_IRQ_ERROR_PRI NXP_KINETIS_UART_4006B000_IRQ_ERROR_PRIORITY #define CONFIG_UART_MCUX_1_IRQ_ERROR_PRI DT_NXP_KINETIS_UART_4006B000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_1_IRQ_STATUS NXP_KINETIS_UART_4006B000_IRQ_STATUS #define CONFIG_UART_MCUX_1_IRQ_STATUS DT_NXP_KINETIS_UART_4006B000_IRQ_STATUS
#define CONFIG_UART_MCUX_1_IRQ_STATUS_PRI NXP_KINETIS_UART_4006B000_IRQ_STATUS_PRIORITY #define CONFIG_UART_MCUX_1_IRQ_STATUS_PRI DT_NXP_KINETIS_UART_4006B000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_1_CLOCK_NAME NXP_KINETIS_UART_4006B000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_1_CLOCK_NAME DT_NXP_KINETIS_UART_4006B000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_1_CLOCK_SUBSYS NXP_KINETIS_UART_4006B000_CLOCK_NAME #define CONFIG_UART_MCUX_1_CLOCK_SUBSYS DT_NXP_KINETIS_UART_4006B000_CLOCK_NAME
#define CONFIG_UART_MCUX_2_BAUD_RATE NXP_KINETIS_UART_4006C000_CURRENT_SPEED #define CONFIG_UART_MCUX_2_BAUD_RATE DT_NXP_KINETIS_UART_4006C000_CURRENT_SPEED
#define CONFIG_UART_MCUX_2_NAME NXP_KINETIS_UART_4006C000_LABEL #define CONFIG_UART_MCUX_2_NAME DT_NXP_KINETIS_UART_4006C000_LABEL
#define CONFIG_UART_MCUX_2_IRQ_ERROR NXP_KINETIS_UART_4006C000_IRQ_ERROR #define CONFIG_UART_MCUX_2_IRQ_ERROR DT_NXP_KINETIS_UART_4006C000_IRQ_ERROR
#define CONFIG_UART_MCUX_2_IRQ_ERROR_PRI NXP_KINETIS_UART_4006C000_IRQ_ERROR_PRIORITY #define CONFIG_UART_MCUX_2_IRQ_ERROR_PRI DT_NXP_KINETIS_UART_4006C000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_2_IRQ_STATUS NXP_KINETIS_UART_4006C000_IRQ_STATUS #define CONFIG_UART_MCUX_2_IRQ_STATUS DT_NXP_KINETIS_UART_4006C000_IRQ_STATUS
#define CONFIG_UART_MCUX_2_IRQ_STATUS_PRI NXP_KINETIS_UART_4006C000_IRQ_STATUS_PRIORITY #define CONFIG_UART_MCUX_2_IRQ_STATUS_PRI DT_NXP_KINETIS_UART_4006C000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_2_CLOCK_NAME NXP_KINETIS_UART_4006C000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_2_CLOCK_NAME DT_NXP_KINETIS_UART_4006C000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_2_CLOCK_SUBSYS NXP_KINETIS_UART_4006C000_CLOCK_NAME #define CONFIG_UART_MCUX_2_CLOCK_SUBSYS DT_NXP_KINETIS_UART_4006C000_CLOCK_NAME
#define CONFIG_UART_MCUX_3_BAUD_RATE NXP_KINETIS_UART_4006D000_CURRENT_SPEED #define CONFIG_UART_MCUX_3_BAUD_RATE DT_NXP_KINETIS_UART_4006D000_CURRENT_SPEED
#define CONFIG_UART_MCUX_3_NAME NXP_KINETIS_UART_4006D000_LABEL #define CONFIG_UART_MCUX_3_NAME DT_NXP_KINETIS_UART_4006D000_LABEL
#define CONFIG_UART_MCUX_3_IRQ_ERROR NXP_KINETIS_UART_4006D000_IRQ_ERROR #define CONFIG_UART_MCUX_3_IRQ_ERROR DT_NXP_KINETIS_UART_4006D000_IRQ_ERROR
#define CONFIG_UART_MCUX_3_IRQ_ERROR_PRI NXP_KINETIS_UART_4006D000_IRQ_ERROR_PRIORITY #define CONFIG_UART_MCUX_3_IRQ_ERROR_PRI DT_NXP_KINETIS_UART_4006D000_IRQ_ERROR_PRIORITY
#define CONFIG_UART_MCUX_3_IRQ_STATUS NXP_KINETIS_UART_4006D000_IRQ_STATUS #define CONFIG_UART_MCUX_3_IRQ_STATUS DT_NXP_KINETIS_UART_4006D000_IRQ_STATUS
#define CONFIG_UART_MCUX_3_IRQ_STATUS_PRI NXP_KINETIS_UART_4006D000_IRQ_STATUS_PRIORITY #define CONFIG_UART_MCUX_3_IRQ_STATUS_PRI DT_NXP_KINETIS_UART_4006D000_IRQ_STATUS_PRIORITY
#define CONFIG_UART_MCUX_3_CLOCK_NAME NXP_KINETIS_UART_4006D000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_3_CLOCK_NAME DT_NXP_KINETIS_UART_4006D000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_3_CLOCK_SUBSYS NXP_KINETIS_UART_4006D000_CLOCK_NAME #define CONFIG_UART_MCUX_3_CLOCK_SUBSYS DT_NXP_KINETIS_UART_4006D000_CLOCK_NAME
#define FLASH_DEV_BASE_ADDRESS NXP_KINETIS_FTFL_40020000_BASE_ADDRESS #define FLASH_DEV_BASE_ADDRESS DT_NXP_KINETIS_FTFL_40020000_BASE_ADDRESS
#define FLASH_DEV_NAME NXP_KINETIS_FTFL_40020000_LABEL #define FLASH_DEV_NAME DT_NXP_KINETIS_FTFL_40020000_LABEL
#define CONFIG_WDT_0_NAME NXP_KINETIS_WDOG_40052000_LABEL #define CONFIG_WDT_0_NAME DT_NXP_KINETIS_WDOG_40052000_LABEL
#define CONFIG_WDT_0_BASE_ADDRESS NXP_KINETIS_WDOG_40052000_BASE_ADDRESS #define CONFIG_WDT_0_BASE_ADDRESS DT_NXP_KINETIS_WDOG_40052000_BASE_ADDRESS
#define CONFIG_WDT_0_IRQ NXP_KINETIS_WDOG_40052000_IRQ_0 #define CONFIG_WDT_0_IRQ DT_NXP_KINETIS_WDOG_40052000_IRQ_0
#define CONFIG_WDT_0_IRQ_PRI NXP_KINETIS_WDOG_40052000_IRQ_0_PRIORITY #define CONFIG_WDT_0_IRQ_PRI DT_NXP_KINETIS_WDOG_40052000_IRQ_0_PRIORITY
#define CONFIG_WDT_0_CLOCK_NAME NXP_KINETIS_WDOG_40052000_CLOCK_CONTROLLER #define CONFIG_WDT_0_CLOCK_NAME DT_NXP_KINETIS_WDOG_40052000_CLOCK_CONTROLLER
#define CONFIG_WDT_0_CLOCK_SUBSYS NXP_KINETIS_WDOG_40052000_CLOCK_NAME #define CONFIG_WDT_0_CLOCK_SUBSYS DT_NXP_KINETIS_WDOG_40052000_CLOCK_NAME
#define CONFIG_SPI_0_NAME NXP_KINETIS_DSPI_4002C000_LABEL #define CONFIG_SPI_0_NAME DT_NXP_KINETIS_DSPI_4002C000_LABEL
#define CONFIG_SPI_0_BASE_ADDRESS NXP_KINETIS_DSPI_4002C000_BASE_ADDRESS #define CONFIG_SPI_0_BASE_ADDRESS DT_NXP_KINETIS_DSPI_4002C000_BASE_ADDRESS
#define CONFIG_SPI_0_IRQ NXP_KINETIS_DSPI_4002C000_IRQ_0 #define CONFIG_SPI_0_IRQ DT_NXP_KINETIS_DSPI_4002C000_IRQ_0
#define CONFIG_SPI_0_IRQ_PRI NXP_KINETIS_DSPI_4002C000_IRQ_0_PRIORITY #define CONFIG_SPI_0_IRQ_PRI DT_NXP_KINETIS_DSPI_4002C000_IRQ_0_PRIORITY
#define CONFIG_SPI_0_CLOCK_NAME NXP_KINETIS_DSPI_4002C000_CLOCK_CONTROLLER #define CONFIG_SPI_0_CLOCK_NAME DT_NXP_KINETIS_DSPI_4002C000_CLOCK_CONTROLLER
#define CONFIG_SPI_0_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002C000_CLOCK_NAME #define CONFIG_SPI_0_CLOCK_SUBSYS DT_NXP_KINETIS_DSPI_4002C000_CLOCK_NAME
#define CONFIG_SPI_1_NAME NXP_KINETIS_DSPI_4002D000_LABEL #define CONFIG_SPI_1_NAME DT_NXP_KINETIS_DSPI_4002D000_LABEL
#define CONFIG_SPI_1_BASE_ADDRESS NXP_KINETIS_DSPI_4002D000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_NXP_KINETIS_DSPI_4002D000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ NXP_KINETIS_DSPI_4002D000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_NXP_KINETIS_DSPI_4002D000_IRQ_0
#define CONFIG_SPI_1_IRQ_PRI NXP_KINETIS_DSPI_4002D000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_NXP_KINETIS_DSPI_4002D000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_CLOCK_NAME NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER #define CONFIG_SPI_1_CLOCK_NAME DT_NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER
#define CONFIG_SPI_1_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002D000_CLOCK_NAME #define CONFIG_SPI_1_CLOCK_SUBSYS DT_NXP_KINETIS_DSPI_4002D000_CLOCK_NAME
#define CONFIG_IEEE802154_MCR20A_SPI_DRV_NAME NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_BUS_NAME #define CONFIG_IEEE802154_MCR20A_SPI_DRV_NAME DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_BUS_NAME
#define CONFIG_IEEE802154_MCR20A_SPI_SLAVE NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_BASE_ADDRESS #define CONFIG_IEEE802154_MCR20A_SPI_SLAVE DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_BASE_ADDRESS
#define CONFIG_IEEE802154_MCR20A_SPI_FREQ NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_SPI_MAX_FREQUENCY #define CONFIG_IEEE802154_MCR20A_SPI_FREQ DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_SPI_MAX_FREQUENCY
#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME NXP_KINETIS_DSPI_4002D000_CS_GPIOS_CONTROLLER #define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME DT_NXP_KINETIS_DSPI_4002D000_CS_GPIOS_CONTROLLER
#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_PIN NXP_KINETIS_DSPI_4002D000_CS_GPIOS_PIN #define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_PIN DT_NXP_KINETIS_DSPI_4002D000_CS_GPIOS_PIN
#define CONFIG_MCR20A_GPIO_IRQ_B_NAME NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_IRQB_GPIOS_CONTROLLER #define CONFIG_MCR20A_GPIO_IRQ_B_NAME DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_IRQB_GPIOS_CONTROLLER
#define CONFIG_MCR20A_GPIO_IRQ_B_PIN NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_IRQB_GPIOS_PIN #define CONFIG_MCR20A_GPIO_IRQ_B_PIN DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_IRQB_GPIOS_PIN
#define CONFIG_MCR20A_GPIO_RESET_NAME NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_RESET_GPIOS_CONTROLLER #define CONFIG_MCR20A_GPIO_RESET_NAME DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_RESET_GPIOS_CONTROLLER
#define CONFIG_MCR20A_GPIO_RESET_PIN NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_RESET_GPIOS_PIN #define CONFIG_MCR20A_GPIO_RESET_PIN DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_RESET_GPIOS_PIN
#define CONFIG_USBD_KINETIS_NAME NXP_KINETIS_USBD_40072000_LABEL #define CONFIG_USBD_KINETIS_NAME DT_NXP_KINETIS_USBD_40072000_LABEL
#define CONFIG_USBD_KINETIS_IRQ NXP_KINETIS_USBD_40072000_IRQ_USB_OTG #define CONFIG_USBD_KINETIS_IRQ DT_NXP_KINETIS_USBD_40072000_IRQ_USB_OTG
#define CONFIG_USBD_KINETIS_IRQ_PRI NXP_KINETIS_USBD_40072000_IRQ_USB_OTG_PRIORITY #define CONFIG_USBD_KINETIS_IRQ_PRI DT_NXP_KINETIS_USBD_40072000_IRQ_USB_OTG_PRIORITY
#define CONFIG_USBD_KINETIS_BASE_ADDRESS NXP_KINETIS_USBD_40072000_BASE_ADDRESS #define CONFIG_USBD_KINETIS_BASE_ADDRESS DT_NXP_KINETIS_USBD_40072000_BASE_ADDRESS
#define CONFIG_USBD_KINETIS_NUM_BIDIR_EP NXP_KINETIS_USBD_40072000_NUM_BIDIR_ENDPOINTS #define CONFIG_USBD_KINETIS_NUM_BIDIR_EP DT_NXP_KINETIS_USBD_40072000_NUM_BIDIR_ENDPOINTS
#define CONFIG_ENTROPY_MCUX_RNGA_BASE_ADDRESS NXP_KINETIS_RNGA_40029000_BASE_ADDRESS #define CONFIG_ENTROPY_MCUX_RNGA_BASE_ADDRESS DT_NXP_KINETIS_RNGA_40029000_BASE_ADDRESS
#define CONFIG_ENTROPY_MCUX_RNGA_IRQ NXP_KINETIS_RNGA_40029000_IRQ_0 #define CONFIG_ENTROPY_MCUX_RNGA_IRQ DT_NXP_KINETIS_RNGA_40029000_IRQ_0
#define CONFIG_ENTROPY_MCUX_RNGA_IRQ_PRI NXP_KINETIS_RNGA_40029000_IRQ_0_PRIORITY #define CONFIG_ENTROPY_MCUX_RNGA_IRQ_PRI DT_NXP_KINETIS_RNGA_40029000_IRQ_0_PRIORITY
#define CONFIG_ENTROPY_MCUX_RNGA_NAME NXP_KINETIS_RNGA_40029000_LABEL #define CONFIG_ENTROPY_MCUX_RNGA_NAME DT_NXP_KINETIS_RNGA_40029000_LABEL
#define CONFIG_ENTROPY_NAME NXP_KINETIS_RNGA_40029000_LABEL #define CONFIG_ENTROPY_NAME DT_NXP_KINETIS_RNGA_40029000_LABEL
#endif /* CONFIG_SOC_MKW22D5 || CONFIG_SOC_MKW24D5 */ #endif /* CONFIG_SOC_MKW22D5 || CONFIG_SOC_MKW24D5 */
#if defined(CONFIG_SOC_MKW40Z4) || defined(CONFIG_SOC_MKW41Z4) #if defined(CONFIG_SOC_MKW40Z4) || defined(CONFIG_SOC_MKW41Z4)
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_MCUX_LPUART_0_BAUD_RATE NXP_KINETIS_LPUART_40054000_CURRENT_SPEED #define CONFIG_UART_MCUX_LPUART_0_BAUD_RATE DT_NXP_KINETIS_LPUART_40054000_CURRENT_SPEED
#define CONFIG_UART_MCUX_LPUART_0_IRQ NXP_KINETIS_LPUART_40054000_IRQ_0 #define CONFIG_UART_MCUX_LPUART_0_IRQ DT_NXP_KINETIS_LPUART_40054000_IRQ_0
#define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI NXP_KINETIS_LPUART_40054000_IRQ_0_PRIORITY #define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI DT_NXP_KINETIS_LPUART_40054000_IRQ_0_PRIORITY
#define CONFIG_UART_MCUX_LPUART_0_NAME NXP_KINETIS_LPUART_40054000_LABEL #define CONFIG_UART_MCUX_LPUART_0_NAME DT_NXP_KINETIS_LPUART_40054000_LABEL
#define CONFIG_UART_MCUX_LPUART_0_CLOCK_NAME NXP_KINETIS_LPUART_40054000_CLOCK_CONTROLLER #define CONFIG_UART_MCUX_LPUART_0_CLOCK_NAME DT_NXP_KINETIS_LPUART_40054000_CLOCK_CONTROLLER
#define CONFIG_UART_MCUX_LPUART_0_CLOCK_SUBSYS NXP_KINETIS_LPUART_40054000_CLOCK_NAME #define CONFIG_UART_MCUX_LPUART_0_CLOCK_SUBSYS DT_NXP_KINETIS_LPUART_40054000_CLOCK_NAME
#define FLASH_DEV_BASE_ADDRESS NXP_KINETIS_FTFA_40020000_BASE_ADDRESS #define FLASH_DEV_BASE_ADDRESS DT_NXP_KINETIS_FTFA_40020000_BASE_ADDRESS
#define FLASH_DEV_NAME NXP_KINETIS_FTFA_40020000_LABEL #define FLASH_DEV_NAME DT_NXP_KINETIS_FTFA_40020000_LABEL
#define CONFIG_SPI_0_NAME NXP_KINETIS_DSPI_4002C000_LABEL #define CONFIG_SPI_0_NAME DT_NXP_KINETIS_DSPI_4002C000_LABEL
#define CONFIG_SPI_0_BASE_ADDRESS NXP_KINETIS_DSPI_4002C000_BASE_ADDRESS #define CONFIG_SPI_0_BASE_ADDRESS DT_NXP_KINETIS_DSPI_4002C000_BASE_ADDRESS
#define CONFIG_SPI_0_IRQ NXP_KINETIS_DSPI_4002C000_IRQ_0 #define CONFIG_SPI_0_IRQ DT_NXP_KINETIS_DSPI_4002C000_IRQ_0
#define CONFIG_SPI_0_IRQ_PRI NXP_KINETIS_DSPI_4002C000_IRQ_0_PRIORITY #define CONFIG_SPI_0_IRQ_PRI DT_NXP_KINETIS_DSPI_4002C000_IRQ_0_PRIORITY
#define CONFIG_SPI_0_CLOCK_NAME NXP_KINETIS_DSPI_4002C000_CLOCK_CONTROLLER #define CONFIG_SPI_0_CLOCK_NAME DT_NXP_KINETIS_DSPI_4002C000_CLOCK_CONTROLLER
#define CONFIG_SPI_0_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002C000_CLOCK_NAME #define CONFIG_SPI_0_CLOCK_SUBSYS DT_NXP_KINETIS_DSPI_4002C000_CLOCK_NAME
#define CONFIG_SPI_1_NAME NXP_KINETIS_DSPI_4002D000_LABEL #define CONFIG_SPI_1_NAME DT_NXP_KINETIS_DSPI_4002D000_LABEL
#define CONFIG_SPI_1_BASE_ADDRESS NXP_KINETIS_DSPI_4002D000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_NXP_KINETIS_DSPI_4002D000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ NXP_KINETIS_DSPI_4002D000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_NXP_KINETIS_DSPI_4002D000_IRQ_0
#define CONFIG_SPI_1_IRQ_PRI NXP_KINETIS_DSPI_4002D000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_NXP_KINETIS_DSPI_4002D000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_CLOCK_NAME NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER #define CONFIG_SPI_1_CLOCK_NAME DT_NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER
#define CONFIG_SPI_1_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002D000_CLOCK_NAME #define CONFIG_SPI_1_CLOCK_SUBSYS DT_NXP_KINETIS_DSPI_4002D000_CLOCK_NAME
#define CONFIG_ENTROPY_MCUX_TRNG_BASE_ADDRESS NXP_KINETIS_TRNG_40029000_BASE_ADDRESS #define CONFIG_ENTROPY_MCUX_TRNG_BASE_ADDRESS DT_NXP_KINETIS_TRNG_40029000_BASE_ADDRESS
#define CONFIG_ENTROPY_MCUX_TRNG_IRQ NXP_KINETIS_TRNG_40029000_IRQ_0 #define CONFIG_ENTROPY_MCUX_TRNG_IRQ DT_NXP_KINETIS_TRNG_40029000_IRQ_0
#define CONFIG_ENTROPY_MCUX_TRNG_IRQ_PRI NXP_KINETIS_TRNG_40029000_IRQ_0_PRIORITY #define CONFIG_ENTROPY_MCUX_TRNG_IRQ_PRI DT_NXP_KINETIS_TRNG_40029000_IRQ_0_PRIORITY
#define CONFIG_ENTROPY_MCUX_TRNG_NAME NXP_KINETIS_TRNG_40029000_LABEL #define CONFIG_ENTROPY_MCUX_TRNG_NAME DT_NXP_KINETIS_TRNG_40029000_LABEL
#define CONFIG_ENTROPY_NAME NXP_KINETIS_TRNG_40029000_LABEL #define CONFIG_ENTROPY_NAME DT_NXP_KINETIS_TRNG_40029000_LABEL
#endif /* CONFIG_SOC_MKW40Z4 || CONFIG_SOC_MKW41Z4 */ #endif /* CONFIG_SOC_MKW40Z4 || CONFIG_SOC_MKW41Z4 */
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

20
soc/arm/nxp_lpc/lpc54xxx/dts_fixup.h
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@ -7,19 +7,19 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#if defined(CONFIG_SOC_LPC54114_M0) #if defined(CONFIG_SOC_LPC54114_M0)
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#else #else
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#endif #endif
#define CONFIG_USART_MCUX_LPC_0_BASE_ADDRESS NXP_LPC_USART_40086000_BASE_ADDRESS #define CONFIG_USART_MCUX_LPC_0_BASE_ADDRESS DT_NXP_LPC_USART_40086000_BASE_ADDRESS
#define CONFIG_USART_MCUX_LPC_0_BAUD_RATE NXP_LPC_USART_40086000_CURRENT_SPEED #define CONFIG_USART_MCUX_LPC_0_BAUD_RATE DT_NXP_LPC_USART_40086000_CURRENT_SPEED
#define CONFIG_USART_MCUX_LPC_0_IRQ_PRI NXP_LPC_USART_40086000_IRQ_0_PRIORITY #define CONFIG_USART_MCUX_LPC_0_IRQ_PRI DT_NXP_LPC_USART_40086000_IRQ_0_PRIORITY
#define CONFIG_USART_MCUX_LPC_0_NAME NXP_LPC_USART_40086000_LABEL #define CONFIG_USART_MCUX_LPC_0_NAME DT_NXP_LPC_USART_40086000_LABEL
#define CONFIG_MAILBOX_MCUX_MAILBOX_0_IRQ NXP_LPC_MAILBOX_4008B000_IRQ_0 #define CONFIG_MAILBOX_MCUX_MAILBOX_0_IRQ DT_NXP_LPC_MAILBOX_4008B000_IRQ_0
#define CONFIG_MAILBOX_MCUX_MAILBOX_0_IRQ_PRI NXP_LPC_MAILBOX_4008B000_IRQ_0_PRIORITY #define CONFIG_MAILBOX_MCUX_MAILBOX_0_IRQ_PRI DT_NXP_LPC_MAILBOX_4008B000_IRQ_0_PRIORITY
#define CONFIG_MAILBOX_MCUX_MAILBOX_0_NAME NXP_LPC_MAILBOX_4008B000_LABEL #define CONFIG_MAILBOX_MCUX_MAILBOX_0_NAME DT_NXP_LPC_MAILBOX_4008B000_LABEL
#define CONFIG_MAILBOX_MCUX_MAILBOX_0_BASE_ADDRESS NXP_LPC_MAILBOX_4008B000_BASE_ADDRESS #define CONFIG_MAILBOX_MCUX_MAILBOX_0_BASE_ADDRESS DT_NXP_LPC_MAILBOX_4008B000_BASE_ADDRESS
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

64
soc/arm/silabs_exx32/efm32hg/dts_fixup.h
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@ -6,42 +6,42 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define FLASH_DEV_BASE_ADDRESS SILABS_GECKO_FLASH_CONTROLLER_400C0000_BASE_ADDRESS #define FLASH_DEV_BASE_ADDRESS DT_SILABS_GECKO_FLASH_CONTROLLER_400C0000_BASE_ADDRESS
#define FLASH_DEV_NAME SILABS_GECKO_FLASH_CONTROLLER_400C0000_LABEL #define FLASH_DEV_NAME DT_SILABS_GECKO_FLASH_CONTROLLER_400C0000_LABEL
#define CONFIG_USART_GECKO_0_BASE_ADDRESS SILABS_GECKO_USART_4000C000_BASE_ADDRESS #define CONFIG_USART_GECKO_0_BASE_ADDRESS DT_SILABS_GECKO_USART_4000C000_BASE_ADDRESS
#define CONFIG_USART_GECKO_0_CURRENT_SPEED SILABS_GECKO_USART_4000C000_CURRENT_SPEED #define CONFIG_USART_GECKO_0_CURRENT_SPEED DT_SILABS_GECKO_USART_4000C000_CURRENT_SPEED
#define CONFIG_USART_GECKO_0_IRQ_RX SILABS_GECKO_USART_4000C000_IRQ_0 #define CONFIG_USART_GECKO_0_IRQ_RX DT_SILABS_GECKO_USART_4000C000_IRQ_0
#define CONFIG_USART_GECKO_0_IRQ_RX_PRIORITY SILABS_GECKO_USART_4000C000_IRQ_0_PRIORITY #define CONFIG_USART_GECKO_0_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_4000C000_IRQ_0_PRIORITY
#define CONFIG_USART_GECKO_0_IRQ_TX SILABS_GECKO_USART_4000C000_IRQ_1 #define CONFIG_USART_GECKO_0_IRQ_TX DT_SILABS_GECKO_USART_4000C000_IRQ_1
#define CONFIG_USART_GECKO_0_IRQ_TX_PRIORITY SILABS_GECKO_USART_4000C000_IRQ_1_PRIORITY #define CONFIG_USART_GECKO_0_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_4000C000_IRQ_1_PRIORITY
#define CONFIG_USART_GECKO_0_LABEL SILABS_GECKO_USART_4000C000_LABEL #define CONFIG_USART_GECKO_0_LABEL DT_SILABS_GECKO_USART_4000C000_LABEL
#define CONFIG_USART_GECKO_0_LOCATION SILABS_GECKO_USART_4000C000_LOCATION #define CONFIG_USART_GECKO_0_LOCATION DT_SILABS_GECKO_USART_4000C000_LOCATION
#define CONFIG_USART_GECKO_0_SIZE SILABS_GECKO_USART_4000C000_SIZE #define CONFIG_USART_GECKO_0_SIZE DT_SILABS_GECKO_USART_4000C000_SIZE
#define CONFIG_USART_GECKO_1_BASE_ADDRESS SILABS_GECKO_USART_4000C400_BASE_ADDRESS #define CONFIG_USART_GECKO_1_BASE_ADDRESS DT_SILABS_GECKO_USART_4000C400_BASE_ADDRESS
#define CONFIG_USART_GECKO_1_CURRENT_SPEED SILABS_GECKO_USART_4000C400_CURRENT_SPEED #define CONFIG_USART_GECKO_1_CURRENT_SPEED DT_SILABS_GECKO_USART_4000C400_CURRENT_SPEED
#define CONFIG_USART_GECKO_1_IRQ_RX SILABS_GECKO_USART_4000C400_IRQ_0 #define CONFIG_USART_GECKO_1_IRQ_RX DT_SILABS_GECKO_USART_4000C400_IRQ_0
#define CONFIG_USART_GECKO_1_IRQ_RX_PRIORITY SILABS_GECKO_USART_4000C400_IRQ_0_PRIORITY #define CONFIG_USART_GECKO_1_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_4000C400_IRQ_0_PRIORITY
#define CONFIG_USART_GECKO_1_IRQ_TX SILABS_GECKO_USART_4000C400_IRQ_1 #define CONFIG_USART_GECKO_1_IRQ_TX DT_SILABS_GECKO_USART_4000C400_IRQ_1
#define CONFIG_USART_GECKO_1_IRQ_TX_PRIORITY SILABS_GECKO_USART_4000C400_IRQ_1_PRIORITY #define CONFIG_USART_GECKO_1_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_4000C400_IRQ_1_PRIORITY
#define CONFIG_USART_GECKO_1_LABEL SILABS_GECKO_USART_4000C400_LABEL #define CONFIG_USART_GECKO_1_LABEL DT_SILABS_GECKO_USART_4000C400_LABEL
#define CONFIG_USART_GECKO_1_LOCATION SILABS_GECKO_USART_4000C400_LOCATION #define CONFIG_USART_GECKO_1_LOCATION DT_SILABS_GECKO_USART_4000C400_LOCATION
#define CONFIG_USART_GECKO_1_SIZE SILABS_GECKO_USART_4000C400_SIZE #define CONFIG_USART_GECKO_1_SIZE DT_SILABS_GECKO_USART_4000C400_SIZE
#define CONFIG_GPIO_GECKO_COMMON_NAME SILABS_EFM32_GPIO_40006100_LABEL #define CONFIG_GPIO_GECKO_COMMON_NAME DT_SILABS_EFM32_GPIO_40006100_LABEL
#define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ SILABS_EFM32_GPIO_40006100_IRQ_GPIO_EVEN #define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ DT_SILABS_EFM32_GPIO_40006100_IRQ_GPIO_EVEN
#define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI SILABS_EFM32_GPIO_40006100_IRQ_GPIO_EVEN_PRIORITY #define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI DT_SILABS_EFM32_GPIO_40006100_IRQ_GPIO_EVEN_PRIORITY
#define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ SILABS_EFM32_GPIO_40006100_IRQ_GPIO_ODD #define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ DT_SILABS_EFM32_GPIO_40006100_IRQ_GPIO_ODD
#define CONFIG_GPIO_GECKO_COMMON_ODD_PRI SILABS_EFM32_GPIO_40006100_IRQ_GPIO_ODD_PRIORITY #define CONFIG_GPIO_GECKO_COMMON_ODD_PRI DT_SILABS_EFM32_GPIO_40006100_IRQ_GPIO_ODD_PRIORITY
#define CONFIG_GPIO_GECKO_PORTA_NAME SILABS_EFM32_GPIO_PORT_40006000_LABEL #define CONFIG_GPIO_GECKO_PORTA_NAME DT_SILABS_EFM32_GPIO_PORT_40006000_LABEL
#define CONFIG_GPIO_GECKO_PORTB_NAME SILABS_EFM32_GPIO_PORT_40006024_LABEL #define CONFIG_GPIO_GECKO_PORTB_NAME DT_SILABS_EFM32_GPIO_PORT_40006024_LABEL
#define CONFIG_GPIO_GECKO_PORTC_NAME SILABS_EFM32_GPIO_PORT_40006048_LABEL #define CONFIG_GPIO_GECKO_PORTC_NAME DT_SILABS_EFM32_GPIO_PORT_40006048_LABEL
#define CONFIG_GPIO_GECKO_PORTD_NAME SILABS_EFM32_GPIO_PORT_4000606C_LABEL #define CONFIG_GPIO_GECKO_PORTD_NAME DT_SILABS_EFM32_GPIO_PORT_4000606C_LABEL
#define CONFIG_GPIO_GECKO_PORTE_NAME SILABS_EFM32_GPIO_PORT_40006090_LABEL #define CONFIG_GPIO_GECKO_PORTE_NAME DT_SILABS_EFM32_GPIO_PORT_40006090_LABEL
#define CONFIG_GPIO_GECKO_PORTF_NAME SILABS_EFM32_GPIO_PORT_400060B4_LABEL #define CONFIG_GPIO_GECKO_PORTF_NAME DT_SILABS_EFM32_GPIO_PORT_400060B4_LABEL
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

118
soc/arm/silabs_exx32/efm32wg/dts_fixup.h
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@ -6,73 +6,73 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define FLASH_DEV_BASE_ADDRESS SILABS_GECKO_FLASH_CONTROLLER_400C0000_BASE_ADDRESS #define FLASH_DEV_BASE_ADDRESS DT_SILABS_GECKO_FLASH_CONTROLLER_400C0000_BASE_ADDRESS
#define FLASH_DEV_NAME SILABS_GECKO_FLASH_CONTROLLER_400C0000_LABEL #define FLASH_DEV_NAME DT_SILABS_GECKO_FLASH_CONTROLLER_400C0000_LABEL
#define CONFIG_USART_GECKO_0_BASE_ADDRESS SILABS_GECKO_USART_4000C000_BASE_ADDRESS #define CONFIG_USART_GECKO_0_BASE_ADDRESS DT_SILABS_GECKO_USART_4000C000_BASE_ADDRESS
#define CONFIG_USART_GECKO_0_CURRENT_SPEED SILABS_GECKO_USART_4000C000_CURRENT_SPEED #define CONFIG_USART_GECKO_0_CURRENT_SPEED DT_SILABS_GECKO_USART_4000C000_CURRENT_SPEED
#define CONFIG_USART_GECKO_0_IRQ_RX SILABS_GECKO_USART_4000C000_IRQ_0 #define CONFIG_USART_GECKO_0_IRQ_RX DT_SILABS_GECKO_USART_4000C000_IRQ_0
#define CONFIG_USART_GECKO_0_IRQ_RX_PRIORITY SILABS_GECKO_USART_4000C000_IRQ_0_PRIORITY #define CONFIG_USART_GECKO_0_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_4000C000_IRQ_0_PRIORITY
#define CONFIG_USART_GECKO_0_IRQ_TX SILABS_GECKO_USART_4000C000_IRQ_1 #define CONFIG_USART_GECKO_0_IRQ_TX DT_SILABS_GECKO_USART_4000C000_IRQ_1
#define CONFIG_USART_GECKO_0_IRQ_TX_PRIORITY SILABS_GECKO_USART_4000C000_IRQ_1_PRIORITY #define CONFIG_USART_GECKO_0_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_4000C000_IRQ_1_PRIORITY
#define CONFIG_USART_GECKO_0_LABEL SILABS_GECKO_USART_4000C000_LABEL #define CONFIG_USART_GECKO_0_LABEL DT_SILABS_GECKO_USART_4000C000_LABEL
#define CONFIG_USART_GECKO_0_LOCATION SILABS_GECKO_USART_4000C000_LOCATION #define CONFIG_USART_GECKO_0_LOCATION DT_SILABS_GECKO_USART_4000C000_LOCATION
#define CONFIG_USART_GECKO_0_SIZE SILABS_GECKO_USART_4000C000_SIZE #define CONFIG_USART_GECKO_0_SIZE DT_SILABS_GECKO_USART_4000C000_SIZE
#define CONFIG_USART_GECKO_1_BASE_ADDRESS SILABS_GECKO_USART_4000C400_BASE_ADDRESS #define CONFIG_USART_GECKO_1_BASE_ADDRESS DT_SILABS_GECKO_USART_4000C400_BASE_ADDRESS
#define CONFIG_USART_GECKO_1_CURRENT_SPEED SILABS_GECKO_USART_4000C400_CURRENT_SPEED #define CONFIG_USART_GECKO_1_CURRENT_SPEED DT_SILABS_GECKO_USART_4000C400_CURRENT_SPEED
#define CONFIG_USART_GECKO_1_IRQ_RX SILABS_GECKO_USART_4000C400_IRQ_0 #define CONFIG_USART_GECKO_1_IRQ_RX DT_SILABS_GECKO_USART_4000C400_IRQ_0
#define CONFIG_USART_GECKO_1_IRQ_RX_PRIORITY SILABS_GECKO_USART_4000C400_IRQ_0_PRIORITY #define CONFIG_USART_GECKO_1_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_4000C400_IRQ_0_PRIORITY
#define CONFIG_USART_GECKO_1_IRQ_TX SILABS_GECKO_USART_4000C400_IRQ_1 #define CONFIG_USART_GECKO_1_IRQ_TX DT_SILABS_GECKO_USART_4000C400_IRQ_1
#define CONFIG_USART_GECKO_1_IRQ_TX_PRIORITY SILABS_GECKO_USART_4000C400_IRQ_1_PRIORITY #define CONFIG_USART_GECKO_1_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_4000C400_IRQ_1_PRIORITY
#define CONFIG_USART_GECKO_1_LABEL SILABS_GECKO_USART_4000C400_LABEL #define CONFIG_USART_GECKO_1_LABEL DT_SILABS_GECKO_USART_4000C400_LABEL
#define CONFIG_USART_GECKO_1_LOCATION SILABS_GECKO_USART_4000C400_LOCATION #define CONFIG_USART_GECKO_1_LOCATION DT_SILABS_GECKO_USART_4000C400_LOCATION
#define CONFIG_USART_GECKO_1_SIZE SILABS_GECKO_USART_4000C400_SIZE #define CONFIG_USART_GECKO_1_SIZE DT_SILABS_GECKO_USART_4000C400_SIZE
#define CONFIG_USART_GECKO_2_BASE_ADDRESS SILABS_GECKO_USART_4000C800_BASE_ADDRESS #define CONFIG_USART_GECKO_2_BASE_ADDRESS DT_SILABS_GECKO_USART_4000C800_BASE_ADDRESS
#define CONFIG_USART_GECKO_2_CURRENT_SPEED SILABS_GECKO_USART_4000C800_CURRENT_SPEED #define CONFIG_USART_GECKO_2_CURRENT_SPEED DT_SILABS_GECKO_USART_4000C800_CURRENT_SPEED
#define CONFIG_USART_GECKO_2_IRQ_RX SILABS_GECKO_USART_4000C800_IRQ_0 #define CONFIG_USART_GECKO_2_IRQ_RX DT_SILABS_GECKO_USART_4000C800_IRQ_0
#define CONFIG_USART_GECKO_2_IRQ_RX_PRIORITY SILABS_GECKO_USART_4000C800_IRQ_0_PRIORITY #define CONFIG_USART_GECKO_2_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_4000C800_IRQ_0_PRIORITY
#define CONFIG_USART_GECKO_2_IRQ_TX SILABS_GECKO_USART_4000C800_IRQ_1 #define CONFIG_USART_GECKO_2_IRQ_TX DT_SILABS_GECKO_USART_4000C800_IRQ_1
#define CONFIG_USART_GECKO_2_IRQ_TX_PRIORITY SILABS_GECKO_USART_4000C800_IRQ_1_PRIORITY #define CONFIG_USART_GECKO_2_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_4000C800_IRQ_1_PRIORITY
#define CONFIG_USART_GECKO_2_LABEL SILABS_GECKO_USART_4000C800_LABEL #define CONFIG_USART_GECKO_2_LABEL DT_SILABS_GECKO_USART_4000C800_LABEL
#define CONFIG_USART_GECKO_2_LOCATION SILABS_GECKO_USART_4000C800_LOCATION #define CONFIG_USART_GECKO_2_LOCATION DT_SILABS_GECKO_USART_4000C800_LOCATION
#define CONFIG_USART_GECKO_2_SIZE SILABS_GECKO_USART_4000C800_SIZE #define CONFIG_USART_GECKO_2_SIZE DT_SILABS_GECKO_USART_4000C800_SIZE
#define CONFIG_UART_GECKO_0_BASE_ADDRESS SILABS_GECKO_UART_4000E000_BASE_ADDRESS #define CONFIG_UART_GECKO_0_BASE_ADDRESS DT_SILABS_GECKO_UART_4000E000_BASE_ADDRESS
#define CONFIG_UART_GECKO_0_CURRENT_SPEED SILABS_GECKO_UART_4000E000_CURRENT_SPEED #define CONFIG_UART_GECKO_0_CURRENT_SPEED DT_SILABS_GECKO_UART_4000E000_CURRENT_SPEED
#define CONFIG_UART_GECKO_0_IRQ_RX SILABS_GECKO_UART_4000E000_IRQ_0 #define CONFIG_UART_GECKO_0_IRQ_RX DT_SILABS_GECKO_UART_4000E000_IRQ_0
#define CONFIG_UART_GECKO_0_IRQ_RX_PRIORITY SILABS_GECKO_UART_4000E000_IRQ_0_PRIORITY #define CONFIG_UART_GECKO_0_IRQ_RX_PRIORITY DT_SILABS_GECKO_UART_4000E000_IRQ_0_PRIORITY
#define CONFIG_UART_GECKO_0_IRQ_TX SILABS_GECKO_UART_4000E000_IRQ_1 #define CONFIG_UART_GECKO_0_IRQ_TX DT_SILABS_GECKO_UART_4000E000_IRQ_1
#define CONFIG_UART_GECKO_0_IRQ_TX_PRIORITY SILABS_GECKO_UART_4000E000_IRQ_1_PRIORITY #define CONFIG_UART_GECKO_0_IRQ_TX_PRIORITY DT_SILABS_GECKO_UART_4000E000_IRQ_1_PRIORITY
#define CONFIG_UART_GECKO_0_LABEL SILABS_GECKO_UART_4000E000_LABEL #define CONFIG_UART_GECKO_0_LABEL DT_SILABS_GECKO_UART_4000E000_LABEL
#define CONFIG_UART_GECKO_0_LOCATION SILABS_GECKO_UART_4000E000_LOCATION #define CONFIG_UART_GECKO_0_LOCATION DT_SILABS_GECKO_UART_4000E000_LOCATION
#define CONFIG_UART_GECKO_0_SIZE SILABS_GECKO_UART_4000E000_SIZE #define CONFIG_UART_GECKO_0_SIZE DT_SILABS_GECKO_UART_4000E000_SIZE
#define CONFIG_UART_GECKO_1_BASE_ADDRESS SILABS_GECKO_UART_4000E400_BASE_ADDRESS #define CONFIG_UART_GECKO_1_BASE_ADDRESS DT_SILABS_GECKO_UART_4000E400_BASE_ADDRESS
#define CONFIG_UART_GECKO_1_CURRENT_SPEED SILABS_GECKO_UART_4000E400_CURRENT_SPEED #define CONFIG_UART_GECKO_1_CURRENT_SPEED DT_SILABS_GECKO_UART_4000E400_CURRENT_SPEED
#define CONFIG_UART_GECKO_1_IRQ_RX SILABS_GECKO_UART_4000E400_IRQ_0 #define CONFIG_UART_GECKO_1_IRQ_RX DT_SILABS_GECKO_UART_4000E400_IRQ_0
#define CONFIG_UART_GECKO_1_IRQ_RX_PRIORITY SILABS_GECKO_UART_4000E400_IRQ_0_PRIORITY #define CONFIG_UART_GECKO_1_IRQ_RX_PRIORITY DT_SILABS_GECKO_UART_4000E400_IRQ_0_PRIORITY
#define CONFIG_UART_GECKO_1_IRQ_TX SILABS_GECKO_UART_4000E400_IRQ_1 #define CONFIG_UART_GECKO_1_IRQ_TX DT_SILABS_GECKO_UART_4000E400_IRQ_1
#define CONFIG_UART_GECKO_1_IRQ_TX_PRIORITY SILABS_GECKO_UART_4000E400_IRQ_1_PRIORITY #define CONFIG_UART_GECKO_1_IRQ_TX_PRIORITY DT_SILABS_GECKO_UART_4000E400_IRQ_1_PRIORITY
#define CONFIG_UART_GECKO_1_LABEL SILABS_GECKO_UART_4000E400_LABEL #define CONFIG_UART_GECKO_1_LABEL DT_SILABS_GECKO_UART_4000E400_LABEL
#define CONFIG_UART_GECKO_1_LOCATION SILABS_GECKO_UART_4000E400_LOCATION #define CONFIG_UART_GECKO_1_LOCATION DT_SILABS_GECKO_UART_4000E400_LOCATION
#define CONFIG_UART_GECKO_1_SIZE SILABS_GECKO_UART_4000E400_SIZE #define CONFIG_UART_GECKO_1_SIZE DT_SILABS_GECKO_UART_4000E400_SIZE
#define CONFIG_GPIO_GECKO_COMMON_NAME SILABS_EFM32_GPIO_40006100_LABEL #define CONFIG_GPIO_GECKO_COMMON_NAME DT_SILABS_EFM32_GPIO_40006100_LABEL
#define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ SILABS_EFM32_GPIO_40006100_IRQ_GPIO_EVEN #define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ DT_SILABS_EFM32_GPIO_40006100_IRQ_GPIO_EVEN
#define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI SILABS_EFM32_GPIO_40006100_IRQ_GPIO_EVEN_PRIORITY #define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI DT_SILABS_EFM32_GPIO_40006100_IRQ_GPIO_EVEN_PRIORITY
#define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ SILABS_EFM32_GPIO_40006100_IRQ_GPIO_ODD #define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ DT_SILABS_EFM32_GPIO_40006100_IRQ_GPIO_ODD
#define CONFIG_GPIO_GECKO_COMMON_ODD_PRI SILABS_EFM32_GPIO_40006100_IRQ_GPIO_ODD_PRIORITY #define CONFIG_GPIO_GECKO_COMMON_ODD_PRI DT_SILABS_EFM32_GPIO_40006100_IRQ_GPIO_ODD_PRIORITY
#define CONFIG_GPIO_GECKO_PORTA_NAME SILABS_EFM32_GPIO_PORT_40006000_LABEL #define CONFIG_GPIO_GECKO_PORTA_NAME DT_SILABS_EFM32_GPIO_PORT_40006000_LABEL
#define CONFIG_GPIO_GECKO_PORTB_NAME SILABS_EFM32_GPIO_PORT_40006024_LABEL #define CONFIG_GPIO_GECKO_PORTB_NAME DT_SILABS_EFM32_GPIO_PORT_40006024_LABEL
#define CONFIG_GPIO_GECKO_PORTC_NAME SILABS_EFM32_GPIO_PORT_40006048_LABEL #define CONFIG_GPIO_GECKO_PORTC_NAME DT_SILABS_EFM32_GPIO_PORT_40006048_LABEL
#define CONFIG_GPIO_GECKO_PORTD_NAME SILABS_EFM32_GPIO_PORT_4000606C_LABEL #define CONFIG_GPIO_GECKO_PORTD_NAME DT_SILABS_EFM32_GPIO_PORT_4000606C_LABEL
#define CONFIG_GPIO_GECKO_PORTE_NAME SILABS_EFM32_GPIO_PORT_40006090_LABEL #define CONFIG_GPIO_GECKO_PORTE_NAME DT_SILABS_EFM32_GPIO_PORT_40006090_LABEL
#define CONFIG_GPIO_GECKO_PORTF_NAME SILABS_EFM32_GPIO_PORT_400060B4_LABEL #define CONFIG_GPIO_GECKO_PORTF_NAME DT_SILABS_EFM32_GPIO_PORT_400060B4_LABEL
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

64
soc/arm/silabs_exx32/efr32fg1p/dts_fixup.h
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@ -6,42 +6,42 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define FLASH_DEV_BASE_ADDRESS SILABS_GECKO_FLASH_CONTROLLER_400E0000_BASE_ADDRESS #define FLASH_DEV_BASE_ADDRESS DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_BASE_ADDRESS
#define FLASH_DEV_NAME SILABS_GECKO_FLASH_CONTROLLER_400E0000_LABEL #define FLASH_DEV_NAME DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_LABEL
#define CONFIG_USART_GECKO_0_BASE_ADDRESS SILABS_GECKO_USART_40010000_BASE_ADDRESS #define CONFIG_USART_GECKO_0_BASE_ADDRESS DT_SILABS_GECKO_USART_40010000_BASE_ADDRESS
#define CONFIG_USART_GECKO_0_CURRENT_SPEED SILABS_GECKO_USART_40010000_CURRENT_SPEED #define CONFIG_USART_GECKO_0_CURRENT_SPEED DT_SILABS_GECKO_USART_40010000_CURRENT_SPEED
#define CONFIG_USART_GECKO_0_IRQ_RX SILABS_GECKO_USART_40010000_IRQ_0 #define CONFIG_USART_GECKO_0_IRQ_RX DT_SILABS_GECKO_USART_40010000_IRQ_0
#define CONFIG_USART_GECKO_0_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010000_IRQ_0_PRIORITY #define CONFIG_USART_GECKO_0_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_40010000_IRQ_0_PRIORITY
#define CONFIG_USART_GECKO_0_IRQ_TX SILABS_GECKO_USART_40010000_IRQ_1 #define CONFIG_USART_GECKO_0_IRQ_TX DT_SILABS_GECKO_USART_40010000_IRQ_1
#define CONFIG_USART_GECKO_0_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010000_IRQ_1_PRIORITY #define CONFIG_USART_GECKO_0_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_40010000_IRQ_1_PRIORITY
#define CONFIG_USART_GECKO_0_LABEL SILABS_GECKO_USART_40010000_LABEL #define CONFIG_USART_GECKO_0_LABEL DT_SILABS_GECKO_USART_40010000_LABEL
#define CONFIG_USART_GECKO_0_LOCATION SILABS_GECKO_USART_40010000_LOCATION #define CONFIG_USART_GECKO_0_LOCATION DT_SILABS_GECKO_USART_40010000_LOCATION
#define CONFIG_USART_GECKO_0_SIZE SILABS_GECKO_USART_40010000_SIZE #define CONFIG_USART_GECKO_0_SIZE DT_SILABS_GECKO_USART_40010000_SIZE
#define CONFIG_USART_GECKO_1_BASE_ADDRESS SILABS_GECKO_USART_40010400_BASE_ADDRESS #define CONFIG_USART_GECKO_1_BASE_ADDRESS DT_SILABS_GECKO_USART_40010400_BASE_ADDRESS
#define CONFIG_USART_GECKO_1_CURRENT_SPEED SILABS_GECKO_USART_40010400_CURRENT_SPEED #define CONFIG_USART_GECKO_1_CURRENT_SPEED DT_SILABS_GECKO_USART_40010400_CURRENT_SPEED
#define CONFIG_USART_GECKO_1_IRQ_RX SILABS_GECKO_USART_40010400_IRQ_0 #define CONFIG_USART_GECKO_1_IRQ_RX DT_SILABS_GECKO_USART_40010400_IRQ_0
#define CONFIG_USART_GECKO_1_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010400_IRQ_0_PRIORITY #define CONFIG_USART_GECKO_1_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_40010400_IRQ_0_PRIORITY
#define CONFIG_USART_GECKO_1_IRQ_TX SILABS_GECKO_USART_40010400_IRQ_1 #define CONFIG_USART_GECKO_1_IRQ_TX DT_SILABS_GECKO_USART_40010400_IRQ_1
#define CONFIG_USART_GECKO_1_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010400_IRQ_1_PRIORITY #define CONFIG_USART_GECKO_1_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_40010400_IRQ_1_PRIORITY
#define CONFIG_USART_GECKO_1_LABEL SILABS_GECKO_USART_40010400_LABEL #define CONFIG_USART_GECKO_1_LABEL DT_SILABS_GECKO_USART_40010400_LABEL
#define CONFIG_USART_GECKO_1_LOCATION SILABS_GECKO_USART_40010400_LOCATION #define CONFIG_USART_GECKO_1_LOCATION DT_SILABS_GECKO_USART_40010400_LOCATION
#define CONFIG_USART_GECKO_1_SIZE SILABS_GECKO_USART_40010400_SIZE #define CONFIG_USART_GECKO_1_SIZE DT_SILABS_GECKO_USART_40010400_SIZE
#define CONFIG_GPIO_GECKO_COMMON_NAME SILABS_EFR32XG1_GPIO_4000A400_LABEL #define CONFIG_GPIO_GECKO_COMMON_NAME DT_SILABS_EFR32XG1_GPIO_4000A400_LABEL
#define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_EVEN #define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ DT_SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_EVEN
#define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_EVEN_PRIORITY #define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI DT_SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_EVEN_PRIORITY
#define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_ODD #define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ DT_SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_ODD
#define CONFIG_GPIO_GECKO_COMMON_ODD_PRI SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_ODD_PRIORITY #define CONFIG_GPIO_GECKO_COMMON_ODD_PRI DT_SILABS_EFR32XG1_GPIO_4000A400_IRQ_GPIO_ODD_PRIORITY
#define CONFIG_GPIO_GECKO_PORTA_NAME SILABS_EFR32XG1_GPIO_PORT_4000A000_LABEL #define CONFIG_GPIO_GECKO_PORTA_NAME DT_SILABS_EFR32XG1_GPIO_PORT_4000A000_LABEL
#define CONFIG_GPIO_GECKO_PORTB_NAME SILABS_EFR32XG1_GPIO_PORT_4000A030_LABEL #define CONFIG_GPIO_GECKO_PORTB_NAME DT_SILABS_EFR32XG1_GPIO_PORT_4000A030_LABEL
#define CONFIG_GPIO_GECKO_PORTC_NAME SILABS_EFR32XG1_GPIO_PORT_4000A060_LABEL #define CONFIG_GPIO_GECKO_PORTC_NAME DT_SILABS_EFR32XG1_GPIO_PORT_4000A060_LABEL
#define CONFIG_GPIO_GECKO_PORTD_NAME SILABS_EFR32XG1_GPIO_PORT_4000A090_LABEL #define CONFIG_GPIO_GECKO_PORTD_NAME DT_SILABS_EFR32XG1_GPIO_PORT_4000A090_LABEL
#define CONFIG_GPIO_GECKO_PORTE_NAME SILABS_EFR32XG1_GPIO_PORT_4000A0C0_LABEL #define CONFIG_GPIO_GECKO_PORTE_NAME DT_SILABS_EFR32XG1_GPIO_PORT_4000A0C0_LABEL
#define CONFIG_GPIO_GECKO_PORTF_NAME SILABS_EFR32XG1_GPIO_PORT_4000A0F0_LABEL #define CONFIG_GPIO_GECKO_PORTF_NAME DT_SILABS_EFR32XG1_GPIO_PORT_4000A0F0_LABEL
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

142
soc/arm/silabs_exx32/efr32mg12p/dts_fixup.h
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@ -6,86 +6,86 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define FLASH_DEV_BASE_ADDRESS SILABS_GECKO_FLASH_CONTROLLER_400E0000_BASE_ADDRESS #define FLASH_DEV_BASE_ADDRESS DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_BASE_ADDRESS
#define FLASH_DEV_NAME SILABS_GECKO_FLASH_CONTROLLER_400E0000_LABEL #define FLASH_DEV_NAME DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_LABEL
#define CONFIG_USART_GECKO_0_BASE_ADDRESS SILABS_GECKO_USART_40010000_BASE_ADDRESS #define CONFIG_USART_GECKO_0_BASE_ADDRESS DT_SILABS_GECKO_USART_40010000_BASE_ADDRESS
#define CONFIG_USART_GECKO_0_CURRENT_SPEED SILABS_GECKO_USART_40010000_CURRENT_SPEED #define CONFIG_USART_GECKO_0_CURRENT_SPEED DT_SILABS_GECKO_USART_40010000_CURRENT_SPEED
#define CONFIG_USART_GECKO_0_IRQ_RX SILABS_GECKO_USART_40010000_IRQ_0 #define CONFIG_USART_GECKO_0_IRQ_RX DT_SILABS_GECKO_USART_40010000_IRQ_0
#define CONFIG_USART_GECKO_0_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010000_IRQ_0_PRIORITY #define CONFIG_USART_GECKO_0_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_40010000_IRQ_0_PRIORITY
#define CONFIG_USART_GECKO_0_IRQ_TX SILABS_GECKO_USART_40010000_IRQ_1 #define CONFIG_USART_GECKO_0_IRQ_TX DT_SILABS_GECKO_USART_40010000_IRQ_1
#define CONFIG_USART_GECKO_0_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010000_IRQ_1_PRIORITY #define CONFIG_USART_GECKO_0_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_40010000_IRQ_1_PRIORITY
#define CONFIG_USART_GECKO_0_LABEL SILABS_GECKO_USART_40010000_LABEL #define CONFIG_USART_GECKO_0_LABEL DT_SILABS_GECKO_USART_40010000_LABEL
#define CONFIG_USART_GECKO_0_LOCATION SILABS_GECKO_USART_40010000_LOCATION #define CONFIG_USART_GECKO_0_LOCATION DT_SILABS_GECKO_USART_40010000_LOCATION
#define CONFIG_USART_GECKO_0_SIZE SILABS_GECKO_USART_40010000_SIZE #define CONFIG_USART_GECKO_0_SIZE DT_SILABS_GECKO_USART_40010000_SIZE
#define CONFIG_USART_GECKO_1_BASE_ADDRESS SILABS_GECKO_USART_40010400_BASE_ADDRESS #define CONFIG_USART_GECKO_1_BASE_ADDRESS DT_SILABS_GECKO_USART_40010400_BASE_ADDRESS
#define CONFIG_USART_GECKO_1_CURRENT_SPEED SILABS_GECKO_USART_40010400_CURRENT_SPEED #define CONFIG_USART_GECKO_1_CURRENT_SPEED DT_SILABS_GECKO_USART_40010400_CURRENT_SPEED
#define CONFIG_USART_GECKO_1_IRQ_RX SILABS_GECKO_USART_40010400_IRQ_0 #define CONFIG_USART_GECKO_1_IRQ_RX DT_SILABS_GECKO_USART_40010400_IRQ_0
#define CONFIG_USART_GECKO_1_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010400_IRQ_0_PRIORITY #define CONFIG_USART_GECKO_1_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_40010400_IRQ_0_PRIORITY
#define CONFIG_USART_GECKO_1_IRQ_TX SILABS_GECKO_USART_40010400_IRQ_1 #define CONFIG_USART_GECKO_1_IRQ_TX DT_SILABS_GECKO_USART_40010400_IRQ_1
#define CONFIG_USART_GECKO_1_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010400_IRQ_1_PRIORITY #define CONFIG_USART_GECKO_1_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_40010400_IRQ_1_PRIORITY
#define CONFIG_USART_GECKO_1_LABEL SILABS_GECKO_USART_40010400_LABEL #define CONFIG_USART_GECKO_1_LABEL DT_SILABS_GECKO_USART_40010400_LABEL
#define CONFIG_USART_GECKO_1_LOCATION SILABS_GECKO_USART_40010400_LOCATION #define CONFIG_USART_GECKO_1_LOCATION DT_SILABS_GECKO_USART_40010400_LOCATION
#define CONFIG_USART_GECKO_1_SIZE SILABS_GECKO_USART_40010400_SIZE #define CONFIG_USART_GECKO_1_SIZE DT_SILABS_GECKO_USART_40010400_SIZE
#define CONFIG_USART_GECKO_2_BASE_ADDRESS SILABS_GECKO_USART_40010800_BASE_ADDRESS #define CONFIG_USART_GECKO_2_BASE_ADDRESS DT_SILABS_GECKO_USART_40010800_BASE_ADDRESS
#define CONFIG_USART_GECKO_2_CURRENT_SPEED SILABS_GECKO_USART_40010800_CURRENT_SPEED #define CONFIG_USART_GECKO_2_CURRENT_SPEED DT_SILABS_GECKO_USART_40010800_CURRENT_SPEED
#define CONFIG_USART_GECKO_2_IRQ_RX SILABS_GECKO_USART_40010800_IRQ_0 #define CONFIG_USART_GECKO_2_IRQ_RX DT_SILABS_GECKO_USART_40010800_IRQ_0
#define CONFIG_USART_GECKO_2_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010800_IRQ_0_PRIORITY #define CONFIG_USART_GECKO_2_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_40010800_IRQ_0_PRIORITY
#define CONFIG_USART_GECKO_2_IRQ_TX SILABS_GECKO_USART_40010800_IRQ_1 #define CONFIG_USART_GECKO_2_IRQ_TX DT_SILABS_GECKO_USART_40010800_IRQ_1
#define CONFIG_USART_GECKO_2_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010800_IRQ_1_PRIORITY #define CONFIG_USART_GECKO_2_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_40010800_IRQ_1_PRIORITY
#define CONFIG_USART_GECKO_2_LABEL SILABS_GECKO_USART_40010800_LABEL #define CONFIG_USART_GECKO_2_LABEL DT_SILABS_GECKO_USART_40010800_LABEL
#define CONFIG_USART_GECKO_2_LOCATION SILABS_GECKO_USART_40010800_LOCATION #define CONFIG_USART_GECKO_2_LOCATION DT_SILABS_GECKO_USART_40010800_LOCATION
#define CONFIG_USART_GECKO_2_SIZE SILABS_GECKO_USART_40010800_SIZE #define CONFIG_USART_GECKO_2_SIZE DT_SILABS_GECKO_USART_40010800_SIZE
#define CONFIG_USART_GECKO_3_BASE_ADDRESS SILABS_GECKO_USART_40010C00_BASE_ADDRESS #define CONFIG_USART_GECKO_3_BASE_ADDRESS DT_SILABS_GECKO_USART_40010C00_BASE_ADDRESS
#define CONFIG_USART_GECKO_3_CURRENT_SPEED SILABS_GECKO_USART_40010C00_CURRENT_SPEED #define CONFIG_USART_GECKO_3_CURRENT_SPEED DT_SILABS_GECKO_USART_40010C00_CURRENT_SPEED
#define CONFIG_USART_GECKO_3_IRQ_RX SILABS_GECKO_USART_40010C00_IRQ_0 #define CONFIG_USART_GECKO_3_IRQ_RX DT_SILABS_GECKO_USART_40010C00_IRQ_0
#define CONFIG_USART_GECKO_3_IRQ_RX_PRIORITY SILABS_GECKO_USART_40010C00_IRQ_0_PRIORITY #define CONFIG_USART_GECKO_3_IRQ_RX_PRIORITY DT_SILABS_GECKO_USART_40010C00_IRQ_0_PRIORITY
#define CONFIG_USART_GECKO_3_IRQ_TX SILABS_GECKO_USART_40010C00_IRQ_1 #define CONFIG_USART_GECKO_3_IRQ_TX DT_SILABS_GECKO_USART_40010C00_IRQ_1
#define CONFIG_USART_GECKO_3_IRQ_TX_PRIORITY SILABS_GECKO_USART_40010C00_IRQ_1_PRIORITY #define CONFIG_USART_GECKO_3_IRQ_TX_PRIORITY DT_SILABS_GECKO_USART_40010C00_IRQ_1_PRIORITY
#define CONFIG_USART_GECKO_3_LABEL SILABS_GECKO_USART_40010C00_LABEL #define CONFIG_USART_GECKO_3_LABEL DT_SILABS_GECKO_USART_40010C00_LABEL
#define CONFIG_USART_GECKO_3_LOCATION SILABS_GECKO_USART_40010C00_LOCATION #define CONFIG_USART_GECKO_3_LOCATION DT_SILABS_GECKO_USART_40010C00_LOCATION
#define CONFIG_USART_GECKO_3_SIZE SILABS_GECKO_USART_40010C00_SIZE #define CONFIG_USART_GECKO_3_SIZE DT_SILABS_GECKO_USART_40010C00_SIZE
#define CONFIG_LEUART_GECKO_0_BASE_ADDRESS SILABS_GECKO_LEUART_4004A000_BASE_ADDRESS #define CONFIG_LEUART_GECKO_0_BASE_ADDRESS DT_SILABS_GECKO_LEUART_4004A000_BASE_ADDRESS
#define CONFIG_LEUART_GECKO_0_CURRENT_SPEED SILABS_GECKO_LEUART_4004A000_CURRENT_SPEED #define CONFIG_LEUART_GECKO_0_CURRENT_SPEED DT_SILABS_GECKO_LEUART_4004A000_CURRENT_SPEED
#define CONFIG_LEUART_GECKO_0_IRQ SILABS_GECKO_LEUART_4004A000_IRQ_0 #define CONFIG_LEUART_GECKO_0_IRQ DT_SILABS_GECKO_LEUART_4004A000_IRQ_0
#define CONFIG_LEUART_GECKO_0_IRQ_PRIORITY SILABS_GECKO_LEUART_4004A000_IRQ_0_PRIORITY #define CONFIG_LEUART_GECKO_0_IRQ_PRIORITY DT_SILABS_GECKO_LEUART_4004A000_IRQ_0_PRIORITY
#define CONFIG_LEUART_GECKO_0_LABEL SILABS_GECKO_LEUART_4004A000_LABEL #define CONFIG_LEUART_GECKO_0_LABEL DT_SILABS_GECKO_LEUART_4004A000_LABEL
#define CONFIG_LEUART_GECKO_0_LOCATION SILABS_GECKO_LEUART_4004A000_LOCATION #define CONFIG_LEUART_GECKO_0_LOCATION DT_SILABS_GECKO_LEUART_4004A000_LOCATION
#define CONFIG_LEUART_GECKO_0_SIZE SILABS_GECKO_LEUART_4004A000_SIZE #define CONFIG_LEUART_GECKO_0_SIZE DT_SILABS_GECKO_LEUART_4004A000_SIZE
#define CONFIG_GPIO_GECKO_COMMON_NAME SILABS_EFR32MG_GPIO_4000A400_LABEL #define CONFIG_GPIO_GECKO_COMMON_NAME DT_SILABS_EFR32MG_GPIO_4000A400_LABEL
#define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_EVEN #define CONFIG_GPIO_GECKO_COMMON_EVEN_IRQ DT_SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_EVEN
#define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_EVEN_PRIORITY #define CONFIG_GPIO_GECKO_COMMON_EVEN_PRI DT_SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_EVEN_PRIORITY
#define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_ODD #define CONFIG_GPIO_GECKO_COMMON_ODD_IRQ DT_SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_ODD
#define CONFIG_GPIO_GECKO_COMMON_ODD_PRI SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_ODD_PRIORITY #define CONFIG_GPIO_GECKO_COMMON_ODD_PRI DT_SILABS_EFR32MG_GPIO_4000A400_IRQ_GPIO_ODD_PRIORITY
#define CONFIG_GPIO_GECKO_PORTA_NAME SILABS_EFR32MG_GPIO_PORT_4000A000_LABEL #define CONFIG_GPIO_GECKO_PORTA_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A000_LABEL
#define CONFIG_GPIO_GECKO_PORTB_NAME SILABS_EFR32MG_GPIO_PORT_4000A030_LABEL #define CONFIG_GPIO_GECKO_PORTB_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A030_LABEL
#define CONFIG_GPIO_GECKO_PORTC_NAME SILABS_EFR32MG_GPIO_PORT_4000A060_LABEL #define CONFIG_GPIO_GECKO_PORTC_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A060_LABEL
#define CONFIG_GPIO_GECKO_PORTD_NAME SILABS_EFR32MG_GPIO_PORT_4000A090_LABEL #define CONFIG_GPIO_GECKO_PORTD_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A090_LABEL
#define CONFIG_GPIO_GECKO_PORTE_NAME SILABS_EFR32MG_GPIO_PORT_4000A0C0_LABEL #define CONFIG_GPIO_GECKO_PORTE_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A0C0_LABEL
#define CONFIG_GPIO_GECKO_PORTF_NAME SILABS_EFR32MG_GPIO_PORT_4000A0F0_LABEL #define CONFIG_GPIO_GECKO_PORTF_NAME DT_SILABS_EFR32MG_GPIO_PORT_4000A0F0_LABEL
#define CONFIG_I2C_GECKO_0_BASE_ADDRESS SILABS_GECKO_I2C_4000C000_BASE_ADDRESS #define CONFIG_I2C_GECKO_0_BASE_ADDRESS DT_SILABS_GECKO_I2C_4000C000_BASE_ADDRESS
#define CONFIG_I2C_GECKO_0_CLOCK_FREQUENCY SILABS_GECKO_I2C_4000C000_CLOCK_FREQUENCY #define CONFIG_I2C_GECKO_0_CLOCK_FREQUENCY DT_SILABS_GECKO_I2C_4000C000_CLOCK_FREQUENCY
#define CONFIG_I2C_GECKO_0_IRQ SILABS_GECKO_I2C_4000C000_IRQ_0 #define CONFIG_I2C_GECKO_0_IRQ DT_SILABS_GECKO_I2C_4000C000_IRQ_0
#define CONFIG_I2C_GECKO_0_IRQ_PRIORITY SILABS_GECKO_I2C_4000C000_IRQ_0_PRIORITY #define CONFIG_I2C_GECKO_0_IRQ_PRIORITY DT_SILABS_GECKO_I2C_4000C000_IRQ_0_PRIORITY
#define CONFIG_I2C_GECKO_0_LABEL SILABS_GECKO_I2C_4000C000_LABEL #define CONFIG_I2C_GECKO_0_LABEL DT_SILABS_GECKO_I2C_4000C000_LABEL
#define CONFIG_I2C_GECKO_0_LOCATION SILABS_GECKO_I2C_4000C000_LOCATION #define CONFIG_I2C_GECKO_0_LOCATION DT_SILABS_GECKO_I2C_4000C000_LOCATION
#define CONFIG_I2C_GECKO_0_SIZE SILABS_GECKO_I2C_4000C000_SIZE #define CONFIG_I2C_GECKO_0_SIZE DT_SILABS_GECKO_I2C_4000C000_SIZE
#define CONFIG_I2C_GECKO_1_BASE_ADDRESS SILABS_GECKO_I2C_4000C400_BASE_ADDRESS #define CONFIG_I2C_GECKO_1_BASE_ADDRESS DT_SILABS_GECKO_I2C_4000C400_BASE_ADDRESS
#define CONFIG_I2C_GECKO_1_CLOCK_FREQUENCY SILABS_GECKO_I2C_4000C400_CLOCK_FREQUENCY #define CONFIG_I2C_GECKO_1_CLOCK_FREQUENCY DT_SILABS_GECKO_I2C_4000C400_CLOCK_FREQUENCY
#define CONFIG_I2C_GECKO_1_IRQ SILABS_GECKO_I2C_4000C400_IRQ_0 #define CONFIG_I2C_GECKO_1_IRQ DT_SILABS_GECKO_I2C_4000C400_IRQ_0
#define CONFIG_I2C_GECKO_1_IRQ_PRIORITY SILABS_GECKO_I2C_4000C400_IRQ_0_PRIORITY #define CONFIG_I2C_GECKO_1_IRQ_PRIORITY DT_SILABS_GECKO_I2C_4000C400_IRQ_0_PRIORITY
#define CONFIG_I2C_GECKO_1_LABEL SILABS_GECKO_I2C_4000C400_LABEL #define CONFIG_I2C_GECKO_1_LABEL DT_SILABS_GECKO_I2C_4000C400_LABEL
#define CONFIG_I2C_GECKO_1_LOCATION SILABS_GECKO_I2C_4000C400_LOCATION #define CONFIG_I2C_GECKO_1_LOCATION DT_SILABS_GECKO_I2C_4000C400_LOCATION
#define CONFIG_I2C_GECKO_1_SIZE SILABS_GECKO_I2C_4000C400_SIZE #define CONFIG_I2C_GECKO_1_SIZE DT_SILABS_GECKO_I2C_4000C400_SIZE
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

240
soc/arm/st_stm32/stm32f0/dts_fixup.h
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@ -1,148 +1,148 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_48000000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS DT_ST_STM32_GPIO_48000000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_48000000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 DT_ST_STM32_GPIO_48000000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_48000000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 DT_ST_STM32_GPIO_48000000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_48000000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48000000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_48000000_LABEL #define CONFIG_GPIO_STM32_GPIOA_LABEL DT_ST_STM32_GPIO_48000000_LABEL
#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_48000000_SIZE #define CONFIG_GPIO_STM32_GPIOA_SIZE DT_ST_STM32_GPIO_48000000_SIZE
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_48000000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS DT_ST_STM32_GPIO_48000000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_48000000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS DT_ST_STM32_GPIO_48000000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_48000400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS DT_ST_STM32_GPIO_48000400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_48000400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 DT_ST_STM32_GPIO_48000400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_48000400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 DT_ST_STM32_GPIO_48000400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_48000400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48000400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_48000400_LABEL #define CONFIG_GPIO_STM32_GPIOB_LABEL DT_ST_STM32_GPIO_48000400_LABEL
#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_48000400_SIZE #define CONFIG_GPIO_STM32_GPIOB_SIZE DT_ST_STM32_GPIO_48000400_SIZE
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_48000400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS DT_ST_STM32_GPIO_48000400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_48000400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS DT_ST_STM32_GPIO_48000400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_48000800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS DT_ST_STM32_GPIO_48000800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_48000800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 DT_ST_STM32_GPIO_48000800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_48000800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 DT_ST_STM32_GPIO_48000800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_48000800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48000800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_48000800_LABEL #define CONFIG_GPIO_STM32_GPIOC_LABEL DT_ST_STM32_GPIO_48000800_LABEL
#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_48000800_SIZE #define CONFIG_GPIO_STM32_GPIOC_SIZE DT_ST_STM32_GPIO_48000800_SIZE
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_48000800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS DT_ST_STM32_GPIO_48000800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_48000800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS DT_ST_STM32_GPIO_48000800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_48000C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS DT_ST_STM32_GPIO_48000C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_48000C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 DT_ST_STM32_GPIO_48000C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_48000C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 DT_ST_STM32_GPIO_48000C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_48000C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48000C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_48000C00_LABEL #define CONFIG_GPIO_STM32_GPIOD_LABEL DT_ST_STM32_GPIO_48000C00_LABEL
#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_48000C00_SIZE #define CONFIG_GPIO_STM32_GPIOD_SIZE DT_ST_STM32_GPIO_48000C00_SIZE
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_48000C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS DT_ST_STM32_GPIO_48000C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_48000C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS DT_ST_STM32_GPIO_48000C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_48001000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS DT_ST_STM32_GPIO_48001000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_48001000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 DT_ST_STM32_GPIO_48001000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_48001000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 DT_ST_STM32_GPIO_48001000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_48001000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48001000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_48001000_LABEL #define CONFIG_GPIO_STM32_GPIOE_LABEL DT_ST_STM32_GPIO_48001000_LABEL
#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_48001000_SIZE #define CONFIG_GPIO_STM32_GPIOE_SIZE DT_ST_STM32_GPIO_48001000_SIZE
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_48001000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS DT_ST_STM32_GPIO_48001000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_48001000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS DT_ST_STM32_GPIO_48001000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_48001400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS DT_ST_STM32_GPIO_48001400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_48001400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 DT_ST_STM32_GPIO_48001400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_48001400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 DT_ST_STM32_GPIO_48001400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_48001400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48001400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_48001400_LABEL #define CONFIG_GPIO_STM32_GPIOF_LABEL DT_ST_STM32_GPIO_48001400_LABEL
#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_48001400_SIZE #define CONFIG_GPIO_STM32_GPIOF_SIZE DT_ST_STM32_GPIO_48001400_SIZE
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_48001400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS DT_ST_STM32_GPIO_48001400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_48001400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS DT_ST_STM32_GPIO_48001400_CLOCK_BUS
#define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS DT_ST_STM32_USART_40013800_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_BAUD_RATE DT_ST_STM32_USART_40013800_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_1_IRQ_PRI DT_ST_STM32_USART_40013800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_1_NAME ST_STM32_USART_40013800_LABEL #define CONFIG_UART_STM32_USART_1_NAME DT_ST_STM32_USART_40013800_LABEL
#define USART_1_IRQ ST_STM32_USART_40013800_IRQ_0 #define USART_1_IRQ DT_ST_STM32_USART_40013800_IRQ_0
#define CONFIG_UART_STM32_USART_1_CLOCK_BITS ST_STM32_USART_40013800_CLOCK_BITS #define CONFIG_UART_STM32_USART_1_CLOCK_BITS DT_ST_STM32_USART_40013800_CLOCK_BITS
#define CONFIG_UART_STM32_USART_1_CLOCK_BUS ST_STM32_USART_40013800_CLOCK_BUS #define CONFIG_UART_STM32_USART_1_CLOCK_BUS DT_ST_STM32_USART_40013800_CLOCK_BUS
#define CONFIG_UART_STM32_USART_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS #define CONFIG_UART_STM32_USART_2_BASE_ADDRESS DT_ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED #define CONFIG_UART_STM32_USART_2_BAUD_RATE DT_ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_2_IRQ_PRI DT_ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_2_NAME ST_STM32_USART_40004400_LABEL #define CONFIG_UART_STM32_USART_2_NAME DT_ST_STM32_USART_40004400_LABEL
#define USART_2_IRQ ST_STM32_USART_40004400_IRQ_0 #define USART_2_IRQ DT_ST_STM32_USART_40004400_IRQ_0
#define CONFIG_UART_STM32_USART_2_CLOCK_BITS ST_STM32_USART_40004400_CLOCK_BITS #define CONFIG_UART_STM32_USART_2_CLOCK_BITS DT_ST_STM32_USART_40004400_CLOCK_BITS
#define CONFIG_UART_STM32_USART_2_CLOCK_BUS ST_STM32_USART_40004400_CLOCK_BUS #define CONFIG_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
#define CONFIG_I2C_1_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY #define CONFIG_I2C_1_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL #define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
#define CONFIG_I2C_1_COMBINED_IRQ ST_STM32_I2C_V2_40005400_IRQ_COMBINED #define CONFIG_I2C_1_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V2_40005400_CLOCK_BITS #define CONFIG_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V2_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V2_40005400_CLOCK_BUS #define CONFIG_I2C_1_CLOCK_BUS DT_ST_STM32_I2C_V2_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS #define CONFIG_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY #define CONFIG_I2C_2_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL #define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
#define CONFIG_I2C_2_COMBINED_IRQ ST_STM32_I2C_V2_40005800_IRQ_COMBINED #define CONFIG_I2C_2_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY #define CONFIG_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V2_40005800_CLOCK_BITS #define CONFIG_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V2_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V2_40005800_CLOCK_BUS #define CONFIG_I2C_2_CLOCK_BUS DT_ST_STM32_I2C_V2_40005800_CLOCK_BUS
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_NAME ST_STM32_SPI_FIFO_40013000_LABEL #define CONFIG_SPI_1_NAME DT_ST_STM32_SPI_FIFO_40013000_LABEL
#define CONFIG_SPI_1_IRQ ST_STM32_SPI_FIFO_40013000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_ST_STM32_SPI_FIFO_40013000_IRQ_0
#define CONFIG_SPI_2_BASE_ADDRESS ST_STM32_SPI_FIFO_40003800_BASE_ADDRESS #define CONFIG_SPI_2_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40003800_BASE_ADDRESS
#define CONFIG_SPI_2_IRQ_PRI ST_STM32_SPI_FIFO_40003800_IRQ_0_PRIORITY #define CONFIG_SPI_2_IRQ_PRI DT_ST_STM32_SPI_FIFO_40003800_IRQ_0_PRIORITY
#define CONFIG_SPI_2_NAME ST_STM32_SPI_FIFO_40003800_LABEL #define CONFIG_SPI_2_NAME DT_ST_STM32_SPI_FIFO_40003800_LABEL
#define CONFIG_SPI_2_IRQ ST_STM32_SPI_FIFO_40003800_IRQ_0 #define CONFIG_SPI_2_IRQ DT_ST_STM32_SPI_FIFO_40003800_IRQ_0
#define CONFIG_CAN_1_BASE_ADDRESS ST_STM32_CAN_40006400_BASE_ADDRESS #define CONFIG_CAN_1_BASE_ADDRESS DT_ST_STM32_CAN_40006400_BASE_ADDRESS
#define CONFIG_CAN_1_BUS_SPEED ST_STM32_CAN_40006400_BUS_SPEED #define CONFIG_CAN_1_BUS_SPEED DT_ST_STM32_CAN_40006400_BUS_SPEED
#define CONFIG_CAN_1_NAME ST_STM32_CAN_40006400_LABEL #define CONFIG_CAN_1_NAME DT_ST_STM32_CAN_40006400_LABEL
#define CONFIG_CAN_1_IRQ ST_STM32_CAN_40006400_IRQ_0 #define CONFIG_CAN_1_IRQ DT_ST_STM32_CAN_40006400_IRQ_0
#define CONFIG_CAN_1_IRQ_PRIORITY ST_STM32_CAN_40006400_IRQ_0_PRIORITY #define CONFIG_CAN_1_IRQ_PRIORITY DT_ST_STM32_CAN_40006400_IRQ_0_PRIORITY
#define CONFIG_CAN_1_SJW ST_STM32_CAN_40006400_SJW #define CONFIG_CAN_1_SJW DT_ST_STM32_CAN_40006400_SJW
#define CONFIG_CAN_1_PROP_SEG_PHASE_SEG1 ST_STM32_CAN_40006400_PROP_SEG_PHASE_SEG1 #define CONFIG_CAN_1_PROP_SEG_PHASE_SEG1 DT_ST_STM32_CAN_40006400_PROP_SEG_PHASE_SEG1
#define CONFIG_CAN_1_PHASE_SEG2 ST_STM32_CAN_40006400_PHASE_SEG2 #define CONFIG_CAN_1_PHASE_SEG2 DT_ST_STM32_CAN_40006400_PHASE_SEG2
#define CONFIG_CAN_1_CLOCK_BUS ST_STM32_CAN_40006400_CLOCK_BUS #define CONFIG_CAN_1_CLOCK_BUS DT_ST_STM32_CAN_40006400_CLOCK_BUS
#define CONFIG_CAN_1_CLOCK_BITS ST_STM32_CAN_40006400_CLOCK_BITS #define CONFIG_CAN_1_CLOCK_BITS DT_ST_STM32_CAN_40006400_CLOCK_BITS
#define FLASH_DEV_BASE_ADDRESS ST_STM32F0_FLASH_CONTROLLER_40022000_BASE_ADDRESS #define FLASH_DEV_BASE_ADDRESS DT_ST_STM32F0_FLASH_CONTROLLER_40022000_BASE_ADDRESS
#define FLASH_DEV_NAME ST_STM32F0_FLASH_CONTROLLER_40022000_LABEL #define FLASH_DEV_NAME DT_ST_STM32F0_FLASH_CONTROLLER_40022000_LABEL
#define CONFIG_USB_BASE_ADDRESS ST_STM32_USB_40005C00_BASE_ADDRESS #define CONFIG_USB_BASE_ADDRESS DT_ST_STM32_USB_40005C00_BASE_ADDRESS
#define CONFIG_USB_IRQ ST_STM32_USB_40005C00_IRQ_USB #define CONFIG_USB_IRQ DT_ST_STM32_USB_40005C00_IRQ_USB
#define CONFIG_USB_IRQ_PRI ST_STM32_USB_40005C00_IRQ_USB_PRIORITY #define CONFIG_USB_IRQ_PRI DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS #define CONFIG_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
#define CONFIG_USB_RAM_SIZE ST_STM32_USB_40005C00_RAM_SIZE #define CONFIG_USB_RAM_SIZE DT_ST_STM32_USB_40005C00_RAM_SIZE
#define CONFIG_PWM_STM32_1_DEV_NAME ST_STM32_PWM_40012C00_PWM_LABEL #define CONFIG_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40012C00_PWM_LABEL
#define CONFIG_PWM_STM32_1_PRESCALER ST_STM32_PWM_40012C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_1_PRESCALER DT_ST_STM32_PWM_40012C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_2_DEV_NAME ST_STM32_PWM_40000000_PWM_LABEL #define CONFIG_PWM_STM32_2_DEV_NAME DT_ST_STM32_PWM_40000000_PWM_LABEL
#define CONFIG_PWM_STM32_2_PRESCALER ST_STM32_PWM_40000000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_2_PRESCALER DT_ST_STM32_PWM_40000000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_3_DEV_NAME ST_STM32_PWM_40000400_PWM_LABEL #define CONFIG_PWM_STM32_3_DEV_NAME DT_ST_STM32_PWM_40000400_PWM_LABEL
#define CONFIG_PWM_STM32_3_PRESCALER ST_STM32_PWM_40000400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_3_PRESCALER DT_ST_STM32_PWM_40000400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_6_DEV_NAME ST_STM32_PWM_40001000_PWM_LABEL #define CONFIG_PWM_STM32_6_DEV_NAME DT_ST_STM32_PWM_40001000_PWM_LABEL
#define CONFIG_PWM_STM32_6_PRESCALER ST_STM32_PWM_40001000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_6_PRESCALER DT_ST_STM32_PWM_40001000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_7_DEV_NAME ST_STM32_PWM_40001400_PWM_LABEL #define CONFIG_PWM_STM32_7_DEV_NAME DT_ST_STM32_PWM_40001400_PWM_LABEL
#define CONFIG_PWM_STM32_7_PRESCALER ST_STM32_PWM_40001400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_7_PRESCALER DT_ST_STM32_PWM_40001400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_14_DEV_NAME ST_STM32_PWM_40002000_PWM_LABEL #define CONFIG_PWM_STM32_14_DEV_NAME DT_ST_STM32_PWM_40002000_PWM_LABEL
#define CONFIG_PWM_STM32_14_PRESCALER ST_STM32_PWM_40002000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_14_PRESCALER DT_ST_STM32_PWM_40002000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_15_DEV_NAME ST_STM32_PWM_40014000_PWM_LABEL #define CONFIG_PWM_STM32_15_DEV_NAME DT_ST_STM32_PWM_40014000_PWM_LABEL
#define CONFIG_PWM_STM32_15_PRESCALER ST_STM32_PWM_40014000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_15_PRESCALER DT_ST_STM32_PWM_40014000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_16_DEV_NAME ST_STM32_PWM_40014400_PWM_LABEL #define CONFIG_PWM_STM32_16_DEV_NAME DT_ST_STM32_PWM_40014400_PWM_LABEL
#define CONFIG_PWM_STM32_16_PRESCALER ST_STM32_PWM_40014400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_16_PRESCALER DT_ST_STM32_PWM_40014400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_17_DEV_NAME ST_STM32_PWM_40014800_PWM_LABEL #define CONFIG_PWM_STM32_17_DEV_NAME DT_ST_STM32_PWM_40014800_PWM_LABEL
#define CONFIG_PWM_STM32_17_PRESCALER ST_STM32_PWM_40014800_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_17_PRESCALER DT_ST_STM32_PWM_40014800_PWM_ST_PRESCALER
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

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soc/arm/st_stm32/stm32f1/dts_fixup.h
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@ -1,165 +1,165 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_40010800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS DT_ST_STM32_GPIO_40010800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_40010800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 DT_ST_STM32_GPIO_40010800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_40010800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 DT_ST_STM32_GPIO_40010800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_40010800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40010800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_40010800_LABEL #define CONFIG_GPIO_STM32_GPIOA_LABEL DT_ST_STM32_GPIO_40010800_LABEL
#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_40010800_SIZE #define CONFIG_GPIO_STM32_GPIOA_SIZE DT_ST_STM32_GPIO_40010800_SIZE
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_40010800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS DT_ST_STM32_GPIO_40010800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_40010800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS DT_ST_STM32_GPIO_40010800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_40010C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS DT_ST_STM32_GPIO_40010C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_40010C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 DT_ST_STM32_GPIO_40010C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_40010C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 DT_ST_STM32_GPIO_40010C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_40010C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40010C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_40010C00_LABEL #define CONFIG_GPIO_STM32_GPIOB_LABEL DT_ST_STM32_GPIO_40010C00_LABEL
#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_40010C00_SIZE #define CONFIG_GPIO_STM32_GPIOB_SIZE DT_ST_STM32_GPIO_40010C00_SIZE
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_40010C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS DT_ST_STM32_GPIO_40010C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_40010C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS DT_ST_STM32_GPIO_40010C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_40011000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS DT_ST_STM32_GPIO_40011000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_40011000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 DT_ST_STM32_GPIO_40011000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_40011000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 DT_ST_STM32_GPIO_40011000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_40011000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40011000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_40011000_LABEL #define CONFIG_GPIO_STM32_GPIOC_LABEL DT_ST_STM32_GPIO_40011000_LABEL
#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_40011000_SIZE #define CONFIG_GPIO_STM32_GPIOC_SIZE DT_ST_STM32_GPIO_40011000_SIZE
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_40011000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS DT_ST_STM32_GPIO_40011000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_40011000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS DT_ST_STM32_GPIO_40011000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_40011400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS DT_ST_STM32_GPIO_40011400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_40011400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 DT_ST_STM32_GPIO_40011400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_40011400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 DT_ST_STM32_GPIO_40011400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_40011400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40011400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_40011400_LABEL #define CONFIG_GPIO_STM32_GPIOD_LABEL DT_ST_STM32_GPIO_40011400_LABEL
#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_40011400_SIZE #define CONFIG_GPIO_STM32_GPIOD_SIZE DT_ST_STM32_GPIO_40011400_SIZE
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_40011400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS DT_ST_STM32_GPIO_40011400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_40011400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS DT_ST_STM32_GPIO_40011400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_40011800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS DT_ST_STM32_GPIO_40011800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_40011800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 DT_ST_STM32_GPIO_40011800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_40011800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 DT_ST_STM32_GPIO_40011800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_40011800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40011800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_40011800_LABEL #define CONFIG_GPIO_STM32_GPIOE_LABEL DT_ST_STM32_GPIO_40011800_LABEL
#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_40011800_SIZE #define CONFIG_GPIO_STM32_GPIOE_SIZE DT_ST_STM32_GPIO_40011800_SIZE
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_40011800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS DT_ST_STM32_GPIO_40011800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_40011800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS DT_ST_STM32_GPIO_40011800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_40011C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS DT_ST_STM32_GPIO_40011C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_40011C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 DT_ST_STM32_GPIO_40011C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_40011C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 DT_ST_STM32_GPIO_40011C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_40011C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40011C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_40011C00_LABEL #define CONFIG_GPIO_STM32_GPIOF_LABEL DT_ST_STM32_GPIO_40011C00_LABEL
#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_40011C00_SIZE #define CONFIG_GPIO_STM32_GPIOF_SIZE DT_ST_STM32_GPIO_40011C00_SIZE
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_40011C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS DT_ST_STM32_GPIO_40011C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_40011C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS DT_ST_STM32_GPIO_40011C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS ST_STM32_GPIO_40012000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS DT_ST_STM32_GPIO_40012000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 ST_STM32_GPIO_40012000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 DT_ST_STM32_GPIO_40012000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 ST_STM32_GPIO_40012000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 DT_ST_STM32_GPIO_40012000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER ST_STM32_GPIO_40012000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40012000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOG_LABEL ST_STM32_GPIO_40012000_LABEL #define CONFIG_GPIO_STM32_GPIOG_LABEL DT_ST_STM32_GPIO_40012000_LABEL
#define CONFIG_GPIO_STM32_GPIOG_SIZE ST_STM32_GPIO_40012000_SIZE #define CONFIG_GPIO_STM32_GPIOG_SIZE DT_ST_STM32_GPIO_40012000_SIZE
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS ST_STM32_GPIO_40012000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS DT_ST_STM32_GPIO_40012000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS ST_STM32_GPIO_40012000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS DT_ST_STM32_GPIO_40012000_CLOCK_BUS
#define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS DT_ST_STM32_USART_40013800_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_BAUD_RATE DT_ST_STM32_USART_40013800_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_1_IRQ_PRI DT_ST_STM32_USART_40013800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_1_NAME ST_STM32_USART_40013800_LABEL #define CONFIG_UART_STM32_USART_1_NAME DT_ST_STM32_USART_40013800_LABEL
#define USART_1_IRQ ST_STM32_USART_40013800_IRQ_0 #define USART_1_IRQ DT_ST_STM32_USART_40013800_IRQ_0
#define CONFIG_UART_STM32_USART_1_CLOCK_BITS ST_STM32_USART_40013800_CLOCK_BITS #define CONFIG_UART_STM32_USART_1_CLOCK_BITS DT_ST_STM32_USART_40013800_CLOCK_BITS
#define CONFIG_UART_STM32_USART_1_CLOCK_BUS ST_STM32_USART_40013800_CLOCK_BUS #define CONFIG_UART_STM32_USART_1_CLOCK_BUS DT_ST_STM32_USART_40013800_CLOCK_BUS
#define CONFIG_UART_STM32_USART_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS #define CONFIG_UART_STM32_USART_2_BASE_ADDRESS DT_ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED #define CONFIG_UART_STM32_USART_2_BAUD_RATE DT_ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_2_IRQ_PRI DT_ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_2_NAME ST_STM32_USART_40004400_LABEL #define CONFIG_UART_STM32_USART_2_NAME DT_ST_STM32_USART_40004400_LABEL
#define USART_2_IRQ ST_STM32_USART_40004400_IRQ_0 #define USART_2_IRQ DT_ST_STM32_USART_40004400_IRQ_0
#define CONFIG_UART_STM32_USART_2_CLOCK_BITS ST_STM32_USART_40004400_CLOCK_BITS #define CONFIG_UART_STM32_USART_2_CLOCK_BITS DT_ST_STM32_USART_40004400_CLOCK_BITS
#define CONFIG_UART_STM32_USART_2_CLOCK_BUS ST_STM32_USART_40004400_CLOCK_BUS #define CONFIG_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
#define CONFIG_UART_STM32_USART_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_3_BASE_ADDRESS DT_ST_STM32_USART_40004800_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_3_BAUD_RATE ST_STM32_USART_40004800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_3_BAUD_RATE DT_ST_STM32_USART_40004800_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_3_IRQ_PRI ST_STM32_USART_40004800_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_3_IRQ_PRI DT_ST_STM32_USART_40004800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_3_NAME ST_STM32_USART_40004800_LABEL #define CONFIG_UART_STM32_USART_3_NAME DT_ST_STM32_USART_40004800_LABEL
#define USART_3_IRQ ST_STM32_USART_40004800_IRQ_0 #define USART_3_IRQ DT_ST_STM32_USART_40004800_IRQ_0
#define CONFIG_UART_STM32_USART_3_CLOCK_BITS ST_STM32_USART_40004800_CLOCK_BITS #define CONFIG_UART_STM32_USART_3_CLOCK_BITS DT_ST_STM32_USART_40004800_CLOCK_BITS
#define CONFIG_UART_STM32_USART_3_CLOCK_BUS ST_STM32_USART_40004800_CLOCK_BUS #define CONFIG_UART_STM32_USART_3_CLOCK_BUS DT_ST_STM32_USART_40004800_CLOCK_BUS
#define CONFIG_UART_STM32_UART_4_BASE_ADDRESS ST_STM32_UART_40004C00_BASE_ADDRESS #define CONFIG_UART_STM32_UART_4_BASE_ADDRESS DT_ST_STM32_UART_40004C00_BASE_ADDRESS
#define CONFIG_UART_STM32_UART_4_BAUD_RATE ST_STM32_UART_40004C00_CURRENT_SPEED #define CONFIG_UART_STM32_UART_4_BAUD_RATE DT_ST_STM32_UART_40004C00_CURRENT_SPEED
#define CONFIG_UART_STM32_UART_4_IRQ_PRI ST_STM32_UART_40004C00_IRQ_0_PRIORITY #define CONFIG_UART_STM32_UART_4_IRQ_PRI DT_ST_STM32_UART_40004C00_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_UART_4_NAME ST_STM32_UART_40004C00_LABEL #define CONFIG_UART_STM32_UART_4_NAME DT_ST_STM32_UART_40004C00_LABEL
#define UART_4_IRQ ST_STM32_UART_40004C00_IRQ_0 #define UART_4_IRQ DT_ST_STM32_UART_40004C00_IRQ_0
#define CONFIG_UART_STM32_UART_4_CLOCK_BITS ST_STM32_UART_40004C00_CLOCK_BITS #define CONFIG_UART_STM32_UART_4_CLOCK_BITS DT_ST_STM32_UART_40004C00_CLOCK_BITS
#define CONFIG_UART_STM32_UART_4_CLOCK_BUS ST_STM32_UART_40004C00_CLOCK_BUS #define CONFIG_UART_STM32_UART_4_CLOCK_BUS DT_ST_STM32_UART_40004C00_CLOCK_BUS
#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V1_40005400_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005400_BASE_ADDRESS
#define CONFIG_I2C_1_EVENT_IRQ_PRI ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY #define CONFIG_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_1_ERROR_IRQ_PRI ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY #define CONFIG_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V1_40005400_LABEL #define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V1_40005400_LABEL
#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V1_40005400_IRQ_EVENT #define CONFIG_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT
#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V1_40005400_IRQ_ERROR #define CONFIG_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V1_40005400_CLOCK_BITS #define CONFIG_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V1_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V1_40005400_CLOCK_BUS #define CONFIG_I2C_1_CLOCK_BUS DT_ST_STM32_I2C_V1_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V1_40005800_BASE_ADDRESS #define CONFIG_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY #define CONFIG_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_2_ERROR_IRQ_PRI ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY #define CONFIG_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V1_40005800_LABEL #define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V1_40005800_LABEL
#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V1_40005800_IRQ_EVENT #define CONFIG_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT
#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V1_40005800_IRQ_ERROR #define CONFIG_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY #define CONFIG_I2C_2_BITRATE DT_ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V1_40005800_CLOCK_BITS #define CONFIG_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V1_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V1_40005800_CLOCK_BUS #define CONFIG_I2C_2_CLOCK_BUS DT_ST_STM32_I2C_V1_40005800_CLOCK_BUS
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_40013000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_ST_STM32_SPI_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_40013000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_ST_STM32_SPI_40013000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_NAME ST_STM32_SPI_40013000_LABEL #define CONFIG_SPI_1_NAME DT_ST_STM32_SPI_40013000_LABEL
#define CONFIG_SPI_1_IRQ ST_STM32_SPI_40013000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_ST_STM32_SPI_40013000_IRQ_0
#define CONFIG_SPI_2_BASE_ADDRESS ST_STM32_SPI_40003800_BASE_ADDRESS #define CONFIG_SPI_2_BASE_ADDRESS DT_ST_STM32_SPI_40003800_BASE_ADDRESS
#define CONFIG_SPI_2_IRQ_PRI ST_STM32_SPI_40003800_IRQ_0_PRIORITY #define CONFIG_SPI_2_IRQ_PRI DT_ST_STM32_SPI_40003800_IRQ_0_PRIORITY
#define CONFIG_SPI_2_NAME ST_STM32_SPI_40003800_LABEL #define CONFIG_SPI_2_NAME DT_ST_STM32_SPI_40003800_LABEL
#define CONFIG_SPI_2_IRQ ST_STM32_SPI_40003800_IRQ_0 #define CONFIG_SPI_2_IRQ DT_ST_STM32_SPI_40003800_IRQ_0
#define CONFIG_SPI_3_BASE_ADDRESS ST_STM32_SPI_40003C00_BASE_ADDRESS #define CONFIG_SPI_3_BASE_ADDRESS DT_ST_STM32_SPI_40003C00_BASE_ADDRESS
#define CONFIG_SPI_3_IRQ_PRI ST_STM32_SPI_40003C00_IRQ_0_PRIORITY #define CONFIG_SPI_3_IRQ_PRI DT_ST_STM32_SPI_40003C00_IRQ_0_PRIORITY
#define CONFIG_SPI_3_NAME ST_STM32_SPI_40003C00_LABEL #define CONFIG_SPI_3_NAME DT_ST_STM32_SPI_40003C00_LABEL
#define CONFIG_SPI_3_IRQ ST_STM32_SPI_40003C00_IRQ_0 #define CONFIG_SPI_3_IRQ DT_ST_STM32_SPI_40003C00_IRQ_0
#define CONFIG_USB_BASE_ADDRESS ST_STM32_USB_40005C00_BASE_ADDRESS #define CONFIG_USB_BASE_ADDRESS DT_ST_STM32_USB_40005C00_BASE_ADDRESS
#define CONFIG_USB_IRQ ST_STM32_USB_40005C00_IRQ_USB #define CONFIG_USB_IRQ DT_ST_STM32_USB_40005C00_IRQ_USB
#define CONFIG_USB_IRQ_PRI ST_STM32_USB_40005C00_IRQ_USB_PRIORITY #define CONFIG_USB_IRQ_PRI DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS #define CONFIG_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
#define CONFIG_USB_RAM_SIZE ST_STM32_USB_40005C00_RAM_SIZE #define CONFIG_USB_RAM_SIZE DT_ST_STM32_USB_40005C00_RAM_SIZE
#define CONFIG_PWM_STM32_1_DEV_NAME ST_STM32_PWM_40012C00_PWM_LABEL #define CONFIG_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40012C00_PWM_LABEL
#define CONFIG_PWM_STM32_1_PRESCALER ST_STM32_PWM_40012C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_1_PRESCALER DT_ST_STM32_PWM_40012C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_2_DEV_NAME ST_STM32_PWM_40000000_PWM_LABEL #define CONFIG_PWM_STM32_2_DEV_NAME DT_ST_STM32_PWM_40000000_PWM_LABEL
#define CONFIG_PWM_STM32_2_PRESCALER ST_STM32_PWM_40000000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_2_PRESCALER DT_ST_STM32_PWM_40000000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_3_DEV_NAME ST_STM32_PWM_40000400_PWM_LABEL #define CONFIG_PWM_STM32_3_DEV_NAME DT_ST_STM32_PWM_40000400_PWM_LABEL
#define CONFIG_PWM_STM32_3_PRESCALER ST_STM32_PWM_40000400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_3_PRESCALER DT_ST_STM32_PWM_40000400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_4_DEV_NAME ST_STM32_PWM_40000800_PWM_LABEL #define CONFIG_PWM_STM32_4_DEV_NAME DT_ST_STM32_PWM_40000800_PWM_LABEL
#define CONFIG_PWM_STM32_4_PRESCALER ST_STM32_PWM_40000800_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_4_PRESCALER DT_ST_STM32_PWM_40000800_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_5_DEV_NAME ST_STM32_PWM_40000C00_PWM_LABEL #define CONFIG_PWM_STM32_5_DEV_NAME DT_ST_STM32_PWM_40000C00_PWM_LABEL
#define CONFIG_PWM_STM32_5_PRESCALER ST_STM32_PWM_40000C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_5_PRESCALER DT_ST_STM32_PWM_40000C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_6_DEV_NAME ST_STM32_PWM_40001000_PWM_LABEL #define CONFIG_PWM_STM32_6_DEV_NAME DT_ST_STM32_PWM_40001000_PWM_LABEL
#define CONFIG_PWM_STM32_6_PRESCALER ST_STM32_PWM_40001000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_6_PRESCALER DT_ST_STM32_PWM_40001000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_7_DEV_NAME ST_STM32_PWM_40001400_PWM_LABEL #define CONFIG_PWM_STM32_7_DEV_NAME DT_ST_STM32_PWM_40001400_PWM_LABEL
#define CONFIG_PWM_STM32_7_PRESCALER ST_STM32_PWM_40001400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_7_PRESCALER DT_ST_STM32_PWM_40001400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_8_DEV_NAME ST_STM32_PWM_40013400_PWM_LABEL #define CONFIG_PWM_STM32_8_DEV_NAME DT_ST_STM32_PWM_40013400_PWM_LABEL
#define CONFIG_PWM_STM32_8_PRESCALER ST_STM32_PWM_40013400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_8_PRESCALER DT_ST_STM32_PWM_40013400_PWM_ST_PRESCALER
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

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soc/arm/st_stm32/stm32f2/dts_fixup.h
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@ -1,141 +1,141 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_40020000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS DT_ST_STM32_GPIO_40020000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_40020000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_40020000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_40020000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_40020000_LABEL #define CONFIG_GPIO_STM32_GPIOA_LABEL DT_ST_STM32_GPIO_40020000_LABEL
#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_40020000_SIZE #define CONFIG_GPIO_STM32_GPIOA_SIZE DT_ST_STM32_GPIO_40020000_SIZE
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_40020000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS DT_ST_STM32_GPIO_40020000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_40020000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS DT_ST_STM32_GPIO_40020000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_40020400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS DT_ST_STM32_GPIO_40020400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_40020400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_40020400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_40020400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_40020400_LABEL #define CONFIG_GPIO_STM32_GPIOB_LABEL DT_ST_STM32_GPIO_40020400_LABEL
#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_40020400_SIZE #define CONFIG_GPIO_STM32_GPIOB_SIZE DT_ST_STM32_GPIO_40020400_SIZE
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_40020400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS DT_ST_STM32_GPIO_40020400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_40020400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS DT_ST_STM32_GPIO_40020400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_40020800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS DT_ST_STM32_GPIO_40020800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_40020800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_40020800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_40020800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_40020800_LABEL #define CONFIG_GPIO_STM32_GPIOC_LABEL DT_ST_STM32_GPIO_40020800_LABEL
#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_40020800_SIZE #define CONFIG_GPIO_STM32_GPIOC_SIZE DT_ST_STM32_GPIO_40020800_SIZE
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_40020800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS DT_ST_STM32_GPIO_40020800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_40020800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS DT_ST_STM32_GPIO_40020800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_40020C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS DT_ST_STM32_GPIO_40020C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_40020C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_40020C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_40020C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_40020C00_LABEL #define CONFIG_GPIO_STM32_GPIOD_LABEL DT_ST_STM32_GPIO_40020C00_LABEL
#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_40020C00_SIZE #define CONFIG_GPIO_STM32_GPIOD_SIZE DT_ST_STM32_GPIO_40020C00_SIZE
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_40020C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS DT_ST_STM32_GPIO_40020C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_40020C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS DT_ST_STM32_GPIO_40020C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_40021000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS DT_ST_STM32_GPIO_40021000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_40021000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_40021000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_40021000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_40021000_LABEL #define CONFIG_GPIO_STM32_GPIOE_LABEL DT_ST_STM32_GPIO_40021000_LABEL
#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_40021000_SIZE #define CONFIG_GPIO_STM32_GPIOE_SIZE DT_ST_STM32_GPIO_40021000_SIZE
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_40021000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS DT_ST_STM32_GPIO_40021000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_40021000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS DT_ST_STM32_GPIO_40021000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_40021400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS DT_ST_STM32_GPIO_40021400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_40021400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_40021400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_40021400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_40021400_LABEL #define CONFIG_GPIO_STM32_GPIOF_LABEL DT_ST_STM32_GPIO_40021400_LABEL
#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_40021400_SIZE #define CONFIG_GPIO_STM32_GPIOF_SIZE DT_ST_STM32_GPIO_40021400_SIZE
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_40021400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS DT_ST_STM32_GPIO_40021400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_40021400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS DT_ST_STM32_GPIO_40021400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS ST_STM32_GPIO_40021800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS DT_ST_STM32_GPIO_40021800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 ST_STM32_GPIO_40021800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 ST_STM32_GPIO_40021800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER ST_STM32_GPIO_40021800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOG_LABEL ST_STM32_GPIO_40021800_LABEL #define CONFIG_GPIO_STM32_GPIOG_LABEL DT_ST_STM32_GPIO_40021800_LABEL
#define CONFIG_GPIO_STM32_GPIOG_SIZE ST_STM32_GPIO_40021800_SIZE #define CONFIG_GPIO_STM32_GPIOG_SIZE DT_ST_STM32_GPIO_40021800_SIZE
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS ST_STM32_GPIO_40021800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS DT_ST_STM32_GPIO_40021800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS ST_STM32_GPIO_40021800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS DT_ST_STM32_GPIO_40021800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS ST_STM32_GPIO_40021C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS DT_ST_STM32_GPIO_40021C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 ST_STM32_GPIO_40021C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 ST_STM32_GPIO_40021C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER ST_STM32_GPIO_40021C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOH_LABEL ST_STM32_GPIO_40021C00_LABEL #define CONFIG_GPIO_STM32_GPIOH_LABEL DT_ST_STM32_GPIO_40021C00_LABEL
#define CONFIG_GPIO_STM32_GPIOH_SIZE ST_STM32_GPIO_40021C00_SIZE #define CONFIG_GPIO_STM32_GPIOH_SIZE DT_ST_STM32_GPIO_40021C00_SIZE
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS ST_STM32_GPIO_40021C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS DT_ST_STM32_GPIO_40021C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS ST_STM32_GPIO_40021C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS DT_ST_STM32_GPIO_40021C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOI_BASE_ADDRESS ST_STM32_GPIO_40022000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOI_BASE_ADDRESS DT_ST_STM32_GPIO_40022000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS_0 ST_STM32_GPIO_40022000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS_0 DT_ST_STM32_GPIO_40022000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS_0 ST_STM32_GPIO_40022000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS_0 DT_ST_STM32_GPIO_40022000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_CONTROLLER ST_STM32_GPIO_40022000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOI_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40022000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOI_LABEL ST_STM32_GPIO_40022000_LABEL #define CONFIG_GPIO_STM32_GPIOI_LABEL DT_ST_STM32_GPIO_40022000_LABEL
#define CONFIG_GPIO_STM32_GPIOI_SIZE ST_STM32_GPIO_40022000_SIZE #define CONFIG_GPIO_STM32_GPIOI_SIZE DT_ST_STM32_GPIO_40022000_SIZE
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS ST_STM32_GPIO_40022000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS DT_ST_STM32_GPIO_40022000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS ST_STM32_GPIO_40022000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS DT_ST_STM32_GPIO_40022000_CLOCK_BUS
#define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40011000_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS DT_ST_STM32_USART_40011000_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40011000_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_BAUD_RATE DT_ST_STM32_USART_40011000_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40011000_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_1_IRQ_PRI DT_ST_STM32_USART_40011000_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_1_NAME ST_STM32_USART_40011000_LABEL #define CONFIG_UART_STM32_USART_1_NAME DT_ST_STM32_USART_40011000_LABEL
#define USART_1_IRQ ST_STM32_USART_40011000_IRQ_0 #define USART_1_IRQ DT_ST_STM32_USART_40011000_IRQ_0
#define CONFIG_UART_STM32_USART_1_CLOCK_BITS ST_STM32_USART_40011000_CLOCK_BITS #define CONFIG_UART_STM32_USART_1_CLOCK_BITS DT_ST_STM32_USART_40011000_CLOCK_BITS
#define CONFIG_UART_STM32_USART_1_CLOCK_BUS ST_STM32_USART_40011000_CLOCK_BUS #define CONFIG_UART_STM32_USART_1_CLOCK_BUS DT_ST_STM32_USART_40011000_CLOCK_BUS
#define CONFIG_UART_STM32_USART_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS #define CONFIG_UART_STM32_USART_2_BASE_ADDRESS DT_ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED #define CONFIG_UART_STM32_USART_2_BAUD_RATE DT_ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_2_IRQ_PRI DT_ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_2_NAME ST_STM32_USART_40004400_LABEL #define CONFIG_UART_STM32_USART_2_NAME DT_ST_STM32_USART_40004400_LABEL
#define USART_2_IRQ ST_STM32_USART_40004400_IRQ_0 #define USART_2_IRQ DT_ST_STM32_USART_40004400_IRQ_0
#define CONFIG_UART_STM32_USART_2_CLOCK_BITS ST_STM32_USART_40004400_CLOCK_BITS #define CONFIG_UART_STM32_USART_2_CLOCK_BITS DT_ST_STM32_USART_40004400_CLOCK_BITS
#define CONFIG_UART_STM32_USART_2_CLOCK_BUS ST_STM32_USART_40004400_CLOCK_BUS #define CONFIG_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
#define CONFIG_UART_STM32_USART_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_3_BASE_ADDRESS DT_ST_STM32_USART_40004800_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_3_BAUD_RATE ST_STM32_USART_40004800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_3_BAUD_RATE DT_ST_STM32_USART_40004800_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_3_IRQ_PRI ST_STM32_USART_40004800_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_3_IRQ_PRI DT_ST_STM32_USART_40004800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_3_NAME ST_STM32_USART_40004800_LABEL #define CONFIG_UART_STM32_USART_3_NAME DT_ST_STM32_USART_40004800_LABEL
#define USART_3_IRQ ST_STM32_USART_40004800_IRQ_0 #define USART_3_IRQ DT_ST_STM32_USART_40004800_IRQ_0
#define CONFIG_UART_STM32_USART_3_CLOCK_BITS ST_STM32_USART_40004800_CLOCK_BITS #define CONFIG_UART_STM32_USART_3_CLOCK_BITS DT_ST_STM32_USART_40004800_CLOCK_BITS
#define CONFIG_UART_STM32_USART_3_CLOCK_BUS ST_STM32_USART_40004800_CLOCK_BUS #define CONFIG_UART_STM32_USART_3_CLOCK_BUS DT_ST_STM32_USART_40004800_CLOCK_BUS
#define CONFIG_UART_STM32_USART_6_NAME ST_STM32_USART_40011400_LABEL #define CONFIG_UART_STM32_USART_6_NAME DT_ST_STM32_USART_40011400_LABEL
#define CONFIG_UART_STM32_USART_6_BASE_ADDRESS ST_STM32_USART_40011400_BASE_ADDRESS #define CONFIG_UART_STM32_USART_6_BASE_ADDRESS DT_ST_STM32_USART_40011400_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_6_BAUD_RATE ST_STM32_USART_40011400_CURRENT_SPEED #define CONFIG_UART_STM32_USART_6_BAUD_RATE DT_ST_STM32_USART_40011400_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_6_IRQ_PRI ST_STM32_USART_40011400_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_6_IRQ_PRI DT_ST_STM32_USART_40011400_IRQ_0_PRIORITY
#define USART_6_IRQ ST_STM32_USART_40011400_IRQ_0 #define USART_6_IRQ DT_ST_STM32_USART_40011400_IRQ_0
#define CONFIG_UART_STM32_USART_6_CLOCK_BITS ST_STM32_USART_40011400_CLOCK_BITS #define CONFIG_UART_STM32_USART_6_CLOCK_BITS DT_ST_STM32_USART_40011400_CLOCK_BITS
#define CONFIG_UART_STM32_USART_6_CLOCK_BUS ST_STM32_USART_40011400_CLOCK_BUS #define CONFIG_UART_STM32_USART_6_CLOCK_BUS DT_ST_STM32_USART_40011400_CLOCK_BUS
#define CONFIG_UART_STM32_UART_4_NAME ST_STM32_UART_40004C00_LABEL #define CONFIG_UART_STM32_UART_4_NAME DT_ST_STM32_UART_40004C00_LABEL
#define CONFIG_UART_STM32_UART_4_BASE_ADDRESS ST_STM32_UART_40004C00_BASE_ADDRESS #define CONFIG_UART_STM32_UART_4_BASE_ADDRESS DT_ST_STM32_UART_40004C00_BASE_ADDRESS
#define CONFIG_UART_STM32_UART_4_BAUD_RATE ST_STM32_UART_40004C00_CURRENT_SPEED #define CONFIG_UART_STM32_UART_4_BAUD_RATE DT_ST_STM32_UART_40004C00_CURRENT_SPEED
#define CONFIG_UART_STM32_UART_4_IRQ_PRI ST_STM32_UART_40004C00_IRQ_0_PRIORITY #define CONFIG_UART_STM32_UART_4_IRQ_PRI DT_ST_STM32_UART_40004C00_IRQ_0_PRIORITY
#define UART_4_IRQ ST_STM32_UART_40004C00_IRQ_0 #define UART_4_IRQ DT_ST_STM32_UART_40004C00_IRQ_0
#define CONFIG_UART_STM32_UART_4_CLOCK_BITS ST_STM32_UART_40004C00_CLOCK_BITS #define CONFIG_UART_STM32_UART_4_CLOCK_BITS DT_ST_STM32_UART_40004C00_CLOCK_BITS
#define CONFIG_UART_STM32_UART_4_CLOCK_BUS ST_STM32_UART_40004C00_CLOCK_BUS #define CONFIG_UART_STM32_UART_4_CLOCK_BUS DT_ST_STM32_UART_40004C00_CLOCK_BUS
#define CONFIG_UART_STM32_UART_5_NAME ST_STM32_UART_40005000_LABEL #define CONFIG_UART_STM32_UART_5_NAME DT_ST_STM32_UART_40005000_LABEL
#define CONFIG_UART_STM32_UART_5_BASE_ADDRESS ST_STM32_UART_40005000_BASE_ADDRESS #define CONFIG_UART_STM32_UART_5_BASE_ADDRESS DT_ST_STM32_UART_40005000_BASE_ADDRESS
#define CONFIG_UART_STM32_UART_5_BAUD_RATE ST_STM32_UART_40005000_CURRENT_SPEED #define CONFIG_UART_STM32_UART_5_BAUD_RATE DT_ST_STM32_UART_40005000_CURRENT_SPEED
#define CONFIG_UART_STM32_UART_5_IRQ_PRI ST_STM32_UART_40005000_IRQ_0_PRIORITY #define CONFIG_UART_STM32_UART_5_IRQ_PRI DT_ST_STM32_UART_40005000_IRQ_0_PRIORITY
#define UART_5_IRQ ST_STM32_UART_40005000_IRQ_0 #define UART_5_IRQ DT_ST_STM32_UART_40005000_IRQ_0
#define CONFIG_UART_STM32_UART_5_CLOCK_BITS ST_STM32_UART_40005000_CLOCK_BITS #define CONFIG_UART_STM32_UART_5_CLOCK_BITS DT_ST_STM32_UART_40005000_CLOCK_BITS
#define CONFIG_UART_STM32_UART_5_CLOCK_BUS ST_STM32_UART_40005000_CLOCK_BUS #define CONFIG_UART_STM32_UART_5_CLOCK_BUS DT_ST_STM32_UART_40005000_CLOCK_BUS
#define CONFIG_USB_BASE_ADDRESS ST_STM32_OTGFS_50000000_BASE_ADDRESS #define CONFIG_USB_BASE_ADDRESS DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS
#define CONFIG_USB_IRQ ST_STM32_OTGFS_50000000_IRQ_OTGFS #define CONFIG_USB_IRQ DT_ST_STM32_OTGFS_50000000_IRQ_OTGFS
#define CONFIG_USB_IRQ_PRI ST_STM32_OTGFS_50000000_IRQ_OTGFS_PRIORITY #define CONFIG_USB_IRQ_PRI DT_ST_STM32_OTGFS_50000000_IRQ_OTGFS_PRIORITY
#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS #define CONFIG_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
#define CONFIG_USB_RAM_SIZE ST_STM32_OTGFS_50000000_RAM_SIZE #define CONFIG_USB_RAM_SIZE DT_ST_STM32_OTGFS_50000000_RAM_SIZE
#define CONFIG_USB_MAXIMUM_SPEED ST_STM32_OTGFS_50000000_MAXIMUM_SPEED #define CONFIG_USB_MAXIMUM_SPEED DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

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soc/arm/st_stm32/stm32f3/dts_fixup.h
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@ -1,198 +1,198 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_48000000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS DT_ST_STM32_GPIO_48000000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_48000000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 DT_ST_STM32_GPIO_48000000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_48000000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 DT_ST_STM32_GPIO_48000000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_48000000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48000000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_48000000_LABEL #define CONFIG_GPIO_STM32_GPIOA_LABEL DT_ST_STM32_GPIO_48000000_LABEL
#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_48000000_SIZE #define CONFIG_GPIO_STM32_GPIOA_SIZE DT_ST_STM32_GPIO_48000000_SIZE
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_48000000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS DT_ST_STM32_GPIO_48000000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_48000000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS DT_ST_STM32_GPIO_48000000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_48000400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS DT_ST_STM32_GPIO_48000400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_48000400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 DT_ST_STM32_GPIO_48000400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_48000400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 DT_ST_STM32_GPIO_48000400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_48000400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48000400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_48000400_LABEL #define CONFIG_GPIO_STM32_GPIOB_LABEL DT_ST_STM32_GPIO_48000400_LABEL
#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_48000400_SIZE #define CONFIG_GPIO_STM32_GPIOB_SIZE DT_ST_STM32_GPIO_48000400_SIZE
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_48000400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS DT_ST_STM32_GPIO_48000400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_48000400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS DT_ST_STM32_GPIO_48000400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_48000800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS DT_ST_STM32_GPIO_48000800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_48000800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 DT_ST_STM32_GPIO_48000800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_48000800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 DT_ST_STM32_GPIO_48000800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_48000800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48000800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_48000800_LABEL #define CONFIG_GPIO_STM32_GPIOC_LABEL DT_ST_STM32_GPIO_48000800_LABEL
#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_48000800_SIZE #define CONFIG_GPIO_STM32_GPIOC_SIZE DT_ST_STM32_GPIO_48000800_SIZE
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_48000800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS DT_ST_STM32_GPIO_48000800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_48000800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS DT_ST_STM32_GPIO_48000800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_48000C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS DT_ST_STM32_GPIO_48000C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_48000C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 DT_ST_STM32_GPIO_48000C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_48000C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 DT_ST_STM32_GPIO_48000C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_48000C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48000C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_48000C00_LABEL #define CONFIG_GPIO_STM32_GPIOD_LABEL DT_ST_STM32_GPIO_48000C00_LABEL
#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_48000C00_SIZE #define CONFIG_GPIO_STM32_GPIOD_SIZE DT_ST_STM32_GPIO_48000C00_SIZE
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_48000C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS DT_ST_STM32_GPIO_48000C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_48000C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS DT_ST_STM32_GPIO_48000C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_48001000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS DT_ST_STM32_GPIO_48001000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_48001000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 DT_ST_STM32_GPIO_48001000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_48001000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 DT_ST_STM32_GPIO_48001000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_48001000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48001000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_48001000_LABEL #define CONFIG_GPIO_STM32_GPIOE_LABEL DT_ST_STM32_GPIO_48001000_LABEL
#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_48001000_SIZE #define CONFIG_GPIO_STM32_GPIOE_SIZE DT_ST_STM32_GPIO_48001000_SIZE
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_48001000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS DT_ST_STM32_GPIO_48001000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_48001000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS DT_ST_STM32_GPIO_48001000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_48001400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS DT_ST_STM32_GPIO_48001400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_48001400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 DT_ST_STM32_GPIO_48001400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_48001400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 DT_ST_STM32_GPIO_48001400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_48001400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48001400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_48001400_LABEL #define CONFIG_GPIO_STM32_GPIOF_LABEL DT_ST_STM32_GPIO_48001400_LABEL
#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_48001400_SIZE #define CONFIG_GPIO_STM32_GPIOF_SIZE DT_ST_STM32_GPIO_48001400_SIZE
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_48001400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS DT_ST_STM32_GPIO_48001400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_48001400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS DT_ST_STM32_GPIO_48001400_CLOCK_BUS
#define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS DT_ST_STM32_USART_40013800_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_BAUD_RATE DT_ST_STM32_USART_40013800_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_1_IRQ_PRI DT_ST_STM32_USART_40013800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_1_NAME ST_STM32_USART_40013800_LABEL #define CONFIG_UART_STM32_USART_1_NAME DT_ST_STM32_USART_40013800_LABEL
#define USART_1_IRQ ST_STM32_USART_40013800_IRQ_0 #define USART_1_IRQ DT_ST_STM32_USART_40013800_IRQ_0
#define CONFIG_UART_STM32_USART_1_CLOCK_BITS ST_STM32_USART_40013800_CLOCK_BITS #define CONFIG_UART_STM32_USART_1_CLOCK_BITS DT_ST_STM32_USART_40013800_CLOCK_BITS
#define CONFIG_UART_STM32_USART_1_CLOCK_BUS ST_STM32_USART_40013800_CLOCK_BUS #define CONFIG_UART_STM32_USART_1_CLOCK_BUS DT_ST_STM32_USART_40013800_CLOCK_BUS
#define CONFIG_UART_STM32_USART_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS #define CONFIG_UART_STM32_USART_2_BASE_ADDRESS DT_ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED #define CONFIG_UART_STM32_USART_2_BAUD_RATE DT_ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_2_IRQ_PRI DT_ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_2_NAME ST_STM32_USART_40004400_LABEL #define CONFIG_UART_STM32_USART_2_NAME DT_ST_STM32_USART_40004400_LABEL
#define USART_2_IRQ ST_STM32_USART_40004400_IRQ_0 #define USART_2_IRQ DT_ST_STM32_USART_40004400_IRQ_0
#define CONFIG_UART_STM32_USART_2_CLOCK_BITS ST_STM32_USART_40004400_CLOCK_BITS #define CONFIG_UART_STM32_USART_2_CLOCK_BITS DT_ST_STM32_USART_40004400_CLOCK_BITS
#define CONFIG_UART_STM32_USART_2_CLOCK_BUS ST_STM32_USART_40004400_CLOCK_BUS #define CONFIG_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
#define CONFIG_UART_STM32_USART_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_3_BASE_ADDRESS DT_ST_STM32_USART_40004800_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_3_BAUD_RATE ST_STM32_USART_40004800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_3_BAUD_RATE DT_ST_STM32_USART_40004800_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_3_IRQ_PRI ST_STM32_USART_40004800_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_3_IRQ_PRI DT_ST_STM32_USART_40004800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_3_NAME ST_STM32_USART_40004800_LABEL #define CONFIG_UART_STM32_USART_3_NAME DT_ST_STM32_USART_40004800_LABEL
#define USART_3_IRQ ST_STM32_USART_40004800_IRQ_0 #define USART_3_IRQ DT_ST_STM32_USART_40004800_IRQ_0
#define CONFIG_UART_STM32_USART_3_CLOCK_BITS ST_STM32_USART_40004800_CLOCK_BITS #define CONFIG_UART_STM32_USART_3_CLOCK_BITS DT_ST_STM32_USART_40004800_CLOCK_BITS
#define CONFIG_UART_STM32_USART_3_CLOCK_BUS ST_STM32_USART_40004800_CLOCK_BUS #define CONFIG_UART_STM32_USART_3_CLOCK_BUS DT_ST_STM32_USART_40004800_CLOCK_BUS
#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
#define CONFIG_I2C_1_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY #define CONFIG_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_1_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY #define CONFIG_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL #define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V2_40005400_IRQ_EVENT #define CONFIG_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V2_40005400_IRQ_ERROR #define CONFIG_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V2_40005400_CLOCK_BITS #define CONFIG_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V2_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V2_40005400_CLOCK_BUS #define CONFIG_I2C_1_CLOCK_BUS DT_ST_STM32_I2C_V2_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS #define CONFIG_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY #define CONFIG_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_2_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY #define CONFIG_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL #define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V2_40005800_IRQ_EVENT #define CONFIG_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT
#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V2_40005800_IRQ_ERROR #define CONFIG_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY #define CONFIG_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V2_40005800_CLOCK_BITS #define CONFIG_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V2_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V2_40005800_CLOCK_BUS #define CONFIG_I2C_2_CLOCK_BUS DT_ST_STM32_I2C_V2_40005800_CLOCK_BUS
#define CONFIG_I2C_3_BASE_ADDRESS ST_STM32_I2C_V2_40007800_BASE_ADDRESS #define CONFIG_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40007800_BASE_ADDRESS
#define CONFIG_I2C_3_EVENT_IRQ_PRI ST_STM32_I2C_V2_40007800_IRQ_EVENT_PRIORITY #define CONFIG_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40007800_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_3_ERROR_IRQ_PRI ST_STM32_I2C_V2_40007800_IRQ_ERROR_PRIORITY #define CONFIG_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40007800_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_3_NAME ST_STM32_I2C_V2_40007800_LABEL #define CONFIG_I2C_3_NAME DT_ST_STM32_I2C_V2_40007800_LABEL
#define CONFIG_I2C_3_EVENT_IRQ ST_STM32_I2C_V2_40007800_IRQ_EVENT #define CONFIG_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40007800_IRQ_EVENT
#define CONFIG_I2C_3_ERROR_IRQ ST_STM32_I2C_V2_40007800_IRQ_ERROR #define CONFIG_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40007800_IRQ_ERROR
#define CONFIG_I2C_3_BITRATE ST_STM32_I2C_V2_40007800_CLOCK_FREQUENCY #define CONFIG_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40007800_CLOCK_FREQUENCY
#define CONFIG_I2C_3_CLOCK_BITS ST_STM32_I2C_V2_40007800_CLOCK_BITS #define CONFIG_I2C_3_CLOCK_BITS DT_ST_STM32_I2C_V2_40007800_CLOCK_BITS
#define CONFIG_I2C_3_CLOCK_BUS ST_STM32_I2C_V2_40007800_CLOCK_BUS #define CONFIG_I2C_3_CLOCK_BUS DT_ST_STM32_I2C_V2_40007800_CLOCK_BUS
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_NAME ST_STM32_SPI_FIFO_40013000_LABEL #define CONFIG_SPI_1_NAME DT_ST_STM32_SPI_FIFO_40013000_LABEL
#define CONFIG_SPI_1_IRQ ST_STM32_SPI_FIFO_40013000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_ST_STM32_SPI_FIFO_40013000_IRQ_0
#define CONFIG_SPI_2_BASE_ADDRESS ST_STM32_SPI_FIFO_40003800_BASE_ADDRESS #define CONFIG_SPI_2_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40003800_BASE_ADDRESS
#define CONFIG_SPI_2_IRQ_PRI ST_STM32_SPI_FIFO_40003800_IRQ_0_PRIORITY #define CONFIG_SPI_2_IRQ_PRI DT_ST_STM32_SPI_FIFO_40003800_IRQ_0_PRIORITY
#define CONFIG_SPI_2_NAME ST_STM32_SPI_FIFO_40003800_LABEL #define CONFIG_SPI_2_NAME DT_ST_STM32_SPI_FIFO_40003800_LABEL
#define CONFIG_SPI_2_IRQ ST_STM32_SPI_FIFO_40003800_IRQ_0 #define CONFIG_SPI_2_IRQ DT_ST_STM32_SPI_FIFO_40003800_IRQ_0
#define CONFIG_SPI_3_BASE_ADDRESS ST_STM32_SPI_FIFO_40003C00_BASE_ADDRESS #define CONFIG_SPI_3_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40003C00_BASE_ADDRESS
#define CONFIG_SPI_3_IRQ_PRI ST_STM32_SPI_FIFO_40003C00_IRQ_0_PRIORITY #define CONFIG_SPI_3_IRQ_PRI DT_ST_STM32_SPI_FIFO_40003C00_IRQ_0_PRIORITY
#define CONFIG_SPI_3_NAME ST_STM32_SPI_FIFO_40003C00_LABEL #define CONFIG_SPI_3_NAME DT_ST_STM32_SPI_FIFO_40003C00_LABEL
#define CONFIG_SPI_3_IRQ ST_STM32_SPI_FIFO_40003C00_IRQ_0 #define CONFIG_SPI_3_IRQ DT_ST_STM32_SPI_FIFO_40003C00_IRQ_0
#define CONFIG_SPI_4_BASE_ADDRESS ST_STM32_SPI_FIFO_40013C00_BASE_ADDRESS #define CONFIG_SPI_4_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40013C00_BASE_ADDRESS
#define CONFIG_SPI_4_IRQ_PRI ST_STM32_SPI_FIFO_40013C00_IRQ_0_PRIORITY #define CONFIG_SPI_4_IRQ_PRI DT_ST_STM32_SPI_FIFO_40013C00_IRQ_0_PRIORITY
#define CONFIG_SPI_4_NAME ST_STM32_SPI_FIFO_40013C00_LABEL #define CONFIG_SPI_4_NAME DT_ST_STM32_SPI_FIFO_40013C00_LABEL
#define CONFIG_SPI_4_IRQ ST_STM32_SPI_FIFO_40013C00_IRQ_0 #define CONFIG_SPI_4_IRQ DT_ST_STM32_SPI_FIFO_40013C00_IRQ_0
#define FLASH_DEV_BASE_ADDRESS ST_STM32F3_FLASH_CONTROLLER_40022000_BASE_ADDRESS #define FLASH_DEV_BASE_ADDRESS DT_ST_STM32F3_FLASH_CONTROLLER_40022000_BASE_ADDRESS
#define FLASH_DEV_NAME ST_STM32F3_FLASH_CONTROLLER_40022000_LABEL #define FLASH_DEV_NAME DT_ST_STM32F3_FLASH_CONTROLLER_40022000_LABEL
#define CONFIG_USB_BASE_ADDRESS ST_STM32_USB_40005C00_BASE_ADDRESS #define CONFIG_USB_BASE_ADDRESS DT_ST_STM32_USB_40005C00_BASE_ADDRESS
#define CONFIG_USB_IRQ ST_STM32_USB_40005C00_IRQ_USB #define CONFIG_USB_IRQ DT_ST_STM32_USB_40005C00_IRQ_USB
#define CONFIG_USB_IRQ_PRI ST_STM32_USB_40005C00_IRQ_USB_PRIORITY #define CONFIG_USB_IRQ_PRI DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS #define CONFIG_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
#define CONFIG_USB_RAM_SIZE ST_STM32_USB_40005C00_RAM_SIZE #define CONFIG_USB_RAM_SIZE DT_ST_STM32_USB_40005C00_RAM_SIZE
#define CONFIG_PWM_STM32_1_DEV_NAME ST_STM32_PWM_40012C00_PWM_LABEL #define CONFIG_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40012C00_PWM_LABEL
#define CONFIG_PWM_STM32_1_PRESCALER ST_STM32_PWM_40012C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_1_PRESCALER DT_ST_STM32_PWM_40012C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_2_DEV_NAME ST_STM32_PWM_40000000_PWM_LABEL #define CONFIG_PWM_STM32_2_DEV_NAME DT_ST_STM32_PWM_40000000_PWM_LABEL
#define CONFIG_PWM_STM32_2_PRESCALER ST_STM32_PWM_40000000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_2_PRESCALER DT_ST_STM32_PWM_40000000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_3_DEV_NAME ST_STM32_PWM_40000400_PWM_LABEL #define CONFIG_PWM_STM32_3_DEV_NAME DT_ST_STM32_PWM_40000400_PWM_LABEL
#define CONFIG_PWM_STM32_3_PRESCALER ST_STM32_PWM_40000400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_3_PRESCALER DT_ST_STM32_PWM_40000400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_4_DEV_NAME ST_STM32_PWM_40000800_PWM_LABEL #define CONFIG_PWM_STM32_4_DEV_NAME DT_ST_STM32_PWM_40000800_PWM_LABEL
#define CONFIG_PWM_STM32_4_PRESCALER ST_STM32_PWM_40000800_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_4_PRESCALER DT_ST_STM32_PWM_40000800_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_5_DEV_NAME ST_STM32_PWM_40000C00_PWM_LABEL #define CONFIG_PWM_STM32_5_DEV_NAME DT_ST_STM32_PWM_40000C00_PWM_LABEL
#define CONFIG_PWM_STM32_5_PRESCALER ST_STM32_PWM_40000C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_5_PRESCALER DT_ST_STM32_PWM_40000C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_6_DEV_NAME ST_STM32_PWM_40001000_PWM_LABEL #define CONFIG_PWM_STM32_6_DEV_NAME DT_ST_STM32_PWM_40001000_PWM_LABEL
#define CONFIG_PWM_STM32_6_PRESCALER ST_STM32_PWM_40001000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_6_PRESCALER DT_ST_STM32_PWM_40001000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_7_DEV_NAME ST_STM32_PWM_40001400_PWM_LABEL #define CONFIG_PWM_STM32_7_DEV_NAME DT_ST_STM32_PWM_40001400_PWM_LABEL
#define CONFIG_PWM_STM32_7_PRESCALER ST_STM32_PWM_40001400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_7_PRESCALER DT_ST_STM32_PWM_40001400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_8_DEV_NAME ST_STM32_PWM_40013400_PWM_LABEL #define CONFIG_PWM_STM32_8_DEV_NAME DT_ST_STM32_PWM_40013400_PWM_LABEL
#define CONFIG_PWM_STM32_8_PRESCALER ST_STM32_PWM_40013400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_8_PRESCALER DT_ST_STM32_PWM_40013400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_12_DEV_NAME ST_STM32_PWM_40001800_PWM_LABEL #define CONFIG_PWM_STM32_12_DEV_NAME DT_ST_STM32_PWM_40001800_PWM_LABEL
#define CONFIG_PWM_STM32_12_PRESCALER ST_STM32_PWM_40001800_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_12_PRESCALER DT_ST_STM32_PWM_40001800_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_13_DEV_NAME ST_STM32_PWM_40001C00_PWM_LABEL #define CONFIG_PWM_STM32_13_DEV_NAME DT_ST_STM32_PWM_40001C00_PWM_LABEL
#define CONFIG_PWM_STM32_13_PRESCALER ST_STM32_PWM_40001C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_13_PRESCALER DT_ST_STM32_PWM_40001C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_14_DEV_NAME ST_STM32_PWM_40002000_PWM_LABEL #define CONFIG_PWM_STM32_14_DEV_NAME DT_ST_STM32_PWM_40002000_PWM_LABEL
#define CONFIG_PWM_STM32_14_PRESCALER ST_STM32_PWM_40002000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_14_PRESCALER DT_ST_STM32_PWM_40002000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_15_DEV_NAME ST_STM32_PWM_40014000_PWM_LABEL #define CONFIG_PWM_STM32_15_DEV_NAME DT_ST_STM32_PWM_40014000_PWM_LABEL
#define CONFIG_PWM_STM32_15_PRESCALER ST_STM32_PWM_40014000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_15_PRESCALER DT_ST_STM32_PWM_40014000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_16_DEV_NAME ST_STM32_PWM_40014400_PWM_LABEL #define CONFIG_PWM_STM32_16_DEV_NAME DT_ST_STM32_PWM_40014400_PWM_LABEL
#define CONFIG_PWM_STM32_16_PRESCALER ST_STM32_PWM_40014400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_16_PRESCALER DT_ST_STM32_PWM_40014400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_17_DEV_NAME ST_STM32_PWM_40014800_PWM_LABEL #define CONFIG_PWM_STM32_17_DEV_NAME DT_ST_STM32_PWM_40014800_PWM_LABEL
#define CONFIG_PWM_STM32_17_PRESCALER ST_STM32_PWM_40014800_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_17_PRESCALER DT_ST_STM32_PWM_40014800_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_18_DEV_NAME ST_STM32_PWM_40009C00_PWM_LABEL #define CONFIG_PWM_STM32_18_DEV_NAME DT_ST_STM32_PWM_40009C00_PWM_LABEL
#define CONFIG_PWM_STM32_18_PRESCALER ST_STM32_PWM_40009C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_18_PRESCALER DT_ST_STM32_PWM_40009C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_19_DEV_NAME ST_STM32_PWM_40015C00_PWM_LABEL #define CONFIG_PWM_STM32_19_DEV_NAME DT_ST_STM32_PWM_40015C00_PWM_LABEL
#define CONFIG_PWM_STM32_19_PRESCALER ST_STM32_PWM_40015C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_19_PRESCALER DT_ST_STM32_PWM_40015C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_20_DEV_NAME ST_STM32_PWM_40015000_PWM_LABEL #define CONFIG_PWM_STM32_20_DEV_NAME DT_ST_STM32_PWM_40015000_PWM_LABEL
#define CONFIG_PWM_STM32_20_PRESCALER ST_STM32_PWM_40015000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_20_PRESCALER DT_ST_STM32_PWM_40015000_PWM_ST_PRESCALER
#define CONFIG_RTC_0_BASE_ADDRESS ST_STM32_RTC_40002800_BASE_ADDRESS #define CONFIG_RTC_0_BASE_ADDRESS DT_ST_STM32_RTC_40002800_BASE_ADDRESS
#define CONFIG_RTC_0_IRQ_PRI ST_STM32_RTC_40002800_IRQ_0_PRIORITY #define CONFIG_RTC_0_IRQ_PRI DT_ST_STM32_RTC_40002800_IRQ_0_PRIORITY
#define CONFIG_RTC_0_IRQ ST_STM32_RTC_40002800_IRQ_0 #define CONFIG_RTC_0_IRQ DT_ST_STM32_RTC_40002800_IRQ_0
#define CONFIG_RTC_0_NAME ST_STM32_RTC_40002800_LABEL #define CONFIG_RTC_0_NAME DT_ST_STM32_RTC_40002800_LABEL
#define CONFIG_RTC_PRESCALER ST_STM32_RTC_40002800_PRESCALER #define CONFIG_RTC_PRESCALER DT_ST_STM32_RTC_40002800_PRESCALER
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

510
soc/arm/st_stm32/stm32f4/dts_fixup.h
View file

@ -1,307 +1,307 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_40020000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS DT_ST_STM32_GPIO_40020000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_40020000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_40020000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_40020000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_40020000_LABEL #define CONFIG_GPIO_STM32_GPIOA_LABEL DT_ST_STM32_GPIO_40020000_LABEL
#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_40020000_SIZE #define CONFIG_GPIO_STM32_GPIOA_SIZE DT_ST_STM32_GPIO_40020000_SIZE
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_40020000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS DT_ST_STM32_GPIO_40020000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_40020000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS DT_ST_STM32_GPIO_40020000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_40020400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS DT_ST_STM32_GPIO_40020400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_40020400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_40020400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_40020400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_40020400_LABEL #define CONFIG_GPIO_STM32_GPIOB_LABEL DT_ST_STM32_GPIO_40020400_LABEL
#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_40020400_SIZE #define CONFIG_GPIO_STM32_GPIOB_SIZE DT_ST_STM32_GPIO_40020400_SIZE
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_40020400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS DT_ST_STM32_GPIO_40020400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_40020400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS DT_ST_STM32_GPIO_40020400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_40020800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS DT_ST_STM32_GPIO_40020800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_40020800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_40020800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_40020800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_40020800_LABEL #define CONFIG_GPIO_STM32_GPIOC_LABEL DT_ST_STM32_GPIO_40020800_LABEL
#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_40020800_SIZE #define CONFIG_GPIO_STM32_GPIOC_SIZE DT_ST_STM32_GPIO_40020800_SIZE
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_40020800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS DT_ST_STM32_GPIO_40020800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_40020800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS DT_ST_STM32_GPIO_40020800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_40020C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS DT_ST_STM32_GPIO_40020C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_40020C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_40020C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_40020C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_40020C00_LABEL #define CONFIG_GPIO_STM32_GPIOD_LABEL DT_ST_STM32_GPIO_40020C00_LABEL
#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_40020C00_SIZE #define CONFIG_GPIO_STM32_GPIOD_SIZE DT_ST_STM32_GPIO_40020C00_SIZE
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_40020C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS DT_ST_STM32_GPIO_40020C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_40020C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS DT_ST_STM32_GPIO_40020C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_40021000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS DT_ST_STM32_GPIO_40021000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_40021000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_40021000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_40021000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_40021000_LABEL #define CONFIG_GPIO_STM32_GPIOE_LABEL DT_ST_STM32_GPIO_40021000_LABEL
#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_40021000_SIZE #define CONFIG_GPIO_STM32_GPIOE_SIZE DT_ST_STM32_GPIO_40021000_SIZE
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_40021000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS DT_ST_STM32_GPIO_40021000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_40021000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS DT_ST_STM32_GPIO_40021000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_40021400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS DT_ST_STM32_GPIO_40021400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_40021400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_40021400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_40021400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_40021400_LABEL #define CONFIG_GPIO_STM32_GPIOF_LABEL DT_ST_STM32_GPIO_40021400_LABEL
#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_40021400_SIZE #define CONFIG_GPIO_STM32_GPIOF_SIZE DT_ST_STM32_GPIO_40021400_SIZE
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_40021400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS DT_ST_STM32_GPIO_40021400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_40021400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS DT_ST_STM32_GPIO_40021400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS ST_STM32_GPIO_40021800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS DT_ST_STM32_GPIO_40021800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 ST_STM32_GPIO_40021800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 ST_STM32_GPIO_40021800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER ST_STM32_GPIO_40021800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOG_LABEL ST_STM32_GPIO_40021800_LABEL #define CONFIG_GPIO_STM32_GPIOG_LABEL DT_ST_STM32_GPIO_40021800_LABEL
#define CONFIG_GPIO_STM32_GPIOG_SIZE ST_STM32_GPIO_40021800_SIZE #define CONFIG_GPIO_STM32_GPIOG_SIZE DT_ST_STM32_GPIO_40021800_SIZE
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS ST_STM32_GPIO_40021800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS DT_ST_STM32_GPIO_40021800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS ST_STM32_GPIO_40021800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS DT_ST_STM32_GPIO_40021800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS ST_STM32_GPIO_40021C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS DT_ST_STM32_GPIO_40021C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 ST_STM32_GPIO_40021C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 ST_STM32_GPIO_40021C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER ST_STM32_GPIO_40021C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOH_LABEL ST_STM32_GPIO_40021C00_LABEL #define CONFIG_GPIO_STM32_GPIOH_LABEL DT_ST_STM32_GPIO_40021C00_LABEL
#define CONFIG_GPIO_STM32_GPIOH_SIZE ST_STM32_GPIO_40021C00_SIZE #define CONFIG_GPIO_STM32_GPIOH_SIZE DT_ST_STM32_GPIO_40021C00_SIZE
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS ST_STM32_GPIO_40021C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS DT_ST_STM32_GPIO_40021C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS ST_STM32_GPIO_40021C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS DT_ST_STM32_GPIO_40021C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOI_BASE_ADDRESS ST_STM32_GPIO_40022000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOI_BASE_ADDRESS DT_ST_STM32_GPIO_40022000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS_0 ST_STM32_GPIO_40022000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS_0 DT_ST_STM32_GPIO_40022000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS_0 ST_STM32_GPIO_40022000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS_0 DT_ST_STM32_GPIO_40022000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_CONTROLLER ST_STM32_GPIO_40022000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOI_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40022000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOI_LABEL ST_STM32_GPIO_40022000_LABEL #define CONFIG_GPIO_STM32_GPIOI_LABEL DT_ST_STM32_GPIO_40022000_LABEL
#define CONFIG_GPIO_STM32_GPIOI_SIZE ST_STM32_GPIO_40022000_SIZE #define CONFIG_GPIO_STM32_GPIOI_SIZE DT_ST_STM32_GPIO_40022000_SIZE
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS ST_STM32_GPIO_40022000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS DT_ST_STM32_GPIO_40022000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS ST_STM32_GPIO_40022000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS DT_ST_STM32_GPIO_40022000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOJ_BASE_ADDRESS ST_STM32_GPIO_40022400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOJ_BASE_ADDRESS DT_ST_STM32_GPIO_40022400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BITS_0 ST_STM32_GPIO_40022400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BITS_0 DT_ST_STM32_GPIO_40022400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BUS_0 ST_STM32_GPIO_40022400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BUS_0 DT_ST_STM32_GPIO_40022400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_CONTROLLER ST_STM32_GPIO_40022400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOJ_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40022400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOJ_LABEL ST_STM32_GPIO_40022400_LABEL #define CONFIG_GPIO_STM32_GPIOJ_LABEL DT_ST_STM32_GPIO_40022400_LABEL
#define CONFIG_GPIO_STM32_GPIOJ_SIZE ST_STM32_GPIO_40022400_SIZE #define CONFIG_GPIO_STM32_GPIOJ_SIZE DT_ST_STM32_GPIO_40022400_SIZE
#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BITS ST_STM32_GPIO_40022400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BITS DT_ST_STM32_GPIO_40022400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BUS ST_STM32_GPIO_40022400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BUS DT_ST_STM32_GPIO_40022400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOK_BASE_ADDRESS ST_STM32_GPIO_40022800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOK_BASE_ADDRESS DT_ST_STM32_GPIO_40022800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BITS_0 ST_STM32_GPIO_40022800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOK_CLOCK_BITS_0 DT_ST_STM32_GPIO_40022800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BUS_0 ST_STM32_GPIO_40022800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOK_CLOCK_BUS_0 DT_ST_STM32_GPIO_40022800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOK_CLOCK_CONTROLLER ST_STM32_GPIO_40022800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOK_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40022800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOK_LABEL ST_STM32_GPIO_40022800_LABEL #define CONFIG_GPIO_STM32_GPIOK_LABEL DT_ST_STM32_GPIO_40022800_LABEL
#define CONFIG_GPIO_STM32_GPIOK_SIZE ST_STM32_GPIO_40022800_SIZE #define CONFIG_GPIO_STM32_GPIOK_SIZE DT_ST_STM32_GPIO_40022800_SIZE
#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BITS ST_STM32_GPIO_40022800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOK_CLOCK_BITS DT_ST_STM32_GPIO_40022800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BUS ST_STM32_GPIO_40022800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOK_CLOCK_BUS DT_ST_STM32_GPIO_40022800_CLOCK_BUS
#define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40011000_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS DT_ST_STM32_USART_40011000_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40011000_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_BAUD_RATE DT_ST_STM32_USART_40011000_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40011000_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_1_IRQ_PRI DT_ST_STM32_USART_40011000_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_1_NAME ST_STM32_USART_40011000_LABEL #define CONFIG_UART_STM32_USART_1_NAME DT_ST_STM32_USART_40011000_LABEL
#define USART_1_IRQ ST_STM32_USART_40011000_IRQ_0 #define USART_1_IRQ DT_ST_STM32_USART_40011000_IRQ_0
#define CONFIG_UART_STM32_USART_1_CLOCK_BITS ST_STM32_USART_40011000_CLOCK_BITS #define CONFIG_UART_STM32_USART_1_CLOCK_BITS DT_ST_STM32_USART_40011000_CLOCK_BITS
#define CONFIG_UART_STM32_USART_1_CLOCK_BUS ST_STM32_USART_40011000_CLOCK_BUS #define CONFIG_UART_STM32_USART_1_CLOCK_BUS DT_ST_STM32_USART_40011000_CLOCK_BUS
#define CONFIG_UART_STM32_USART_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS #define CONFIG_UART_STM32_USART_2_BASE_ADDRESS DT_ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED #define CONFIG_UART_STM32_USART_2_BAUD_RATE DT_ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_2_IRQ_PRI DT_ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_2_NAME ST_STM32_USART_40004400_LABEL #define CONFIG_UART_STM32_USART_2_NAME DT_ST_STM32_USART_40004400_LABEL
#define USART_2_IRQ ST_STM32_USART_40004400_IRQ_0 #define USART_2_IRQ DT_ST_STM32_USART_40004400_IRQ_0
#define CONFIG_UART_STM32_USART_2_CLOCK_BITS ST_STM32_USART_40004400_CLOCK_BITS #define CONFIG_UART_STM32_USART_2_CLOCK_BITS DT_ST_STM32_USART_40004400_CLOCK_BITS
#define CONFIG_UART_STM32_USART_2_CLOCK_BUS ST_STM32_USART_40004400_CLOCK_BUS #define CONFIG_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
#define CONFIG_UART_STM32_USART_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_3_BASE_ADDRESS DT_ST_STM32_USART_40004800_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_3_BAUD_RATE ST_STM32_USART_40004800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_3_BAUD_RATE DT_ST_STM32_USART_40004800_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_3_IRQ_PRI ST_STM32_USART_40004800_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_3_IRQ_PRI DT_ST_STM32_USART_40004800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_3_NAME ST_STM32_USART_40004800_LABEL #define CONFIG_UART_STM32_USART_3_NAME DT_ST_STM32_USART_40004800_LABEL
#define USART_3_IRQ ST_STM32_USART_40004800_IRQ_0 #define USART_3_IRQ DT_ST_STM32_USART_40004800_IRQ_0
#define CONFIG_UART_STM32_USART_3_CLOCK_BITS ST_STM32_USART_40004800_CLOCK_BITS #define CONFIG_UART_STM32_USART_3_CLOCK_BITS DT_ST_STM32_USART_40004800_CLOCK_BITS
#define CONFIG_UART_STM32_USART_3_CLOCK_BUS ST_STM32_USART_40004800_CLOCK_BUS #define CONFIG_UART_STM32_USART_3_CLOCK_BUS DT_ST_STM32_USART_40004800_CLOCK_BUS
#define CONFIG_UART_STM32_USART_6_NAME ST_STM32_USART_40011400_LABEL #define CONFIG_UART_STM32_USART_6_NAME DT_ST_STM32_USART_40011400_LABEL
#define CONFIG_UART_STM32_USART_6_BASE_ADDRESS ST_STM32_USART_40011400_BASE_ADDRESS #define CONFIG_UART_STM32_USART_6_BASE_ADDRESS DT_ST_STM32_USART_40011400_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_6_BAUD_RATE ST_STM32_USART_40011400_CURRENT_SPEED #define CONFIG_UART_STM32_USART_6_BAUD_RATE DT_ST_STM32_USART_40011400_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_6_IRQ_PRI ST_STM32_USART_40011400_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_6_IRQ_PRI DT_ST_STM32_USART_40011400_IRQ_0_PRIORITY
#define USART_6_IRQ ST_STM32_USART_40011400_IRQ_0 #define USART_6_IRQ DT_ST_STM32_USART_40011400_IRQ_0
#define CONFIG_UART_STM32_USART_6_CLOCK_BITS ST_STM32_USART_40011400_CLOCK_BITS #define CONFIG_UART_STM32_USART_6_CLOCK_BITS DT_ST_STM32_USART_40011400_CLOCK_BITS
#define CONFIG_UART_STM32_USART_6_CLOCK_BUS ST_STM32_USART_40011400_CLOCK_BUS #define CONFIG_UART_STM32_USART_6_CLOCK_BUS DT_ST_STM32_USART_40011400_CLOCK_BUS
#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V1_40005400_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005400_BASE_ADDRESS
#define CONFIG_I2C_1_EVENT_IRQ_PRI ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY #define CONFIG_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_1_ERROR_IRQ_PRI ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY #define CONFIG_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V1_40005400_LABEL #define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V1_40005400_LABEL
#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V1_40005400_IRQ_EVENT #define CONFIG_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT
#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V1_40005400_IRQ_ERROR #define CONFIG_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V1_40005400_CLOCK_BITS #define CONFIG_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V1_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V1_40005400_CLOCK_BUS #define CONFIG_I2C_1_CLOCK_BUS DT_ST_STM32_I2C_V1_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V1_40005800_BASE_ADDRESS #define CONFIG_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY #define CONFIG_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_2_ERROR_IRQ_PRI ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY #define CONFIG_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V1_40005800_LABEL #define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V1_40005800_LABEL
#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V1_40005800_IRQ_EVENT #define CONFIG_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT
#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V1_40005800_IRQ_ERROR #define CONFIG_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY #define CONFIG_I2C_2_BITRATE DT_ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V1_40005800_CLOCK_BITS #define CONFIG_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V1_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V1_40005800_CLOCK_BUS #define CONFIG_I2C_2_CLOCK_BUS DT_ST_STM32_I2C_V1_40005800_CLOCK_BUS
#define CONFIG_I2C_3_BASE_ADDRESS ST_STM32_I2C_V1_40005C00_BASE_ADDRESS #define CONFIG_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005C00_BASE_ADDRESS
#define CONFIG_I2C_3_EVENT_IRQ_PRI ST_STM32_I2C_V1_40005C00_IRQ_EVENT_PRIORITY #define CONFIG_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005C00_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_3_ERROR_IRQ_PRI ST_STM32_I2C_V1_40005C00_IRQ_ERROR_PRIORITY #define CONFIG_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005C00_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_3_NAME ST_STM32_I2C_V1_40005C00_LABEL #define CONFIG_I2C_3_NAME DT_ST_STM32_I2C_V1_40005C00_LABEL
#define CONFIG_I2C_3_EVENT_IRQ ST_STM32_I2C_V1_40005C00_IRQ_EVENT #define CONFIG_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V1_40005C00_IRQ_EVENT
#define CONFIG_I2C_3_ERROR_IRQ ST_STM32_I2C_V1_40005C00_IRQ_ERROR #define CONFIG_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V1_40005C00_IRQ_ERROR
#define CONFIG_I2C_3_BITRATE ST_STM32_I2C_V1_40005C00_CLOCK_FREQUENCY #define CONFIG_I2C_3_BITRATE DT_ST_STM32_I2C_V1_40005C00_CLOCK_FREQUENCY
#define CONFIG_I2C_3_CLOCK_BITS ST_STM32_I2C_V1_40005C00_CLOCK_BITS #define CONFIG_I2C_3_CLOCK_BITS DT_ST_STM32_I2C_V1_40005C00_CLOCK_BITS
#define CONFIG_I2C_3_CLOCK_BUS ST_STM32_I2C_V1_40005C00_CLOCK_BUS #define CONFIG_I2C_3_CLOCK_BUS DT_ST_STM32_I2C_V1_40005C00_CLOCK_BUS
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_40013000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_ST_STM32_SPI_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_40013000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_ST_STM32_SPI_40013000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_NAME ST_STM32_SPI_40013000_LABEL #define CONFIG_SPI_1_NAME DT_ST_STM32_SPI_40013000_LABEL
#define CONFIG_SPI_1_IRQ ST_STM32_SPI_40013000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_ST_STM32_SPI_40013000_IRQ_0
#define CONFIG_SPI_2_BASE_ADDRESS ST_STM32_SPI_40003800_BASE_ADDRESS #define CONFIG_SPI_2_BASE_ADDRESS DT_ST_STM32_SPI_40003800_BASE_ADDRESS
#define CONFIG_SPI_2_IRQ_PRI ST_STM32_SPI_40003800_IRQ_0_PRIORITY #define CONFIG_SPI_2_IRQ_PRI DT_ST_STM32_SPI_40003800_IRQ_0_PRIORITY
#define CONFIG_SPI_2_NAME ST_STM32_SPI_40003800_LABEL #define CONFIG_SPI_2_NAME DT_ST_STM32_SPI_40003800_LABEL
#define CONFIG_SPI_2_IRQ ST_STM32_SPI_40003800_IRQ_0 #define CONFIG_SPI_2_IRQ DT_ST_STM32_SPI_40003800_IRQ_0
#define CONFIG_SPI_3_BASE_ADDRESS ST_STM32_SPI_40003C00_BASE_ADDRESS #define CONFIG_SPI_3_BASE_ADDRESS DT_ST_STM32_SPI_40003C00_BASE_ADDRESS
#define CONFIG_SPI_3_IRQ_PRI ST_STM32_SPI_40003C00_IRQ_0_PRIORITY #define CONFIG_SPI_3_IRQ_PRI DT_ST_STM32_SPI_40003C00_IRQ_0_PRIORITY
#define CONFIG_SPI_3_NAME ST_STM32_SPI_40003C00_LABEL #define CONFIG_SPI_3_NAME DT_ST_STM32_SPI_40003C00_LABEL
#define CONFIG_SPI_3_IRQ ST_STM32_SPI_40003C00_IRQ_0 #define CONFIG_SPI_3_IRQ DT_ST_STM32_SPI_40003C00_IRQ_0
#define CONFIG_SPI_4_BASE_ADDRESS ST_STM32_SPI_40013400_BASE_ADDRESS #define CONFIG_SPI_4_BASE_ADDRESS DT_ST_STM32_SPI_40013400_BASE_ADDRESS
#define CONFIG_SPI_4_IRQ_PRI ST_STM32_SPI_40013400_IRQ_0_PRIORITY #define CONFIG_SPI_4_IRQ_PRI DT_ST_STM32_SPI_40013400_IRQ_0_PRIORITY
#define CONFIG_SPI_4_NAME ST_STM32_SPI_40013400_LABEL #define CONFIG_SPI_4_NAME DT_ST_STM32_SPI_40013400_LABEL
#define CONFIG_SPI_4_IRQ ST_STM32_SPI_40013400_IRQ_0 #define CONFIG_SPI_4_IRQ DT_ST_STM32_SPI_40013400_IRQ_0
#define CONFIG_SPI_5_BASE_ADDRESS ST_STM32_SPI_40015000_BASE_ADDRESS #define CONFIG_SPI_5_BASE_ADDRESS DT_ST_STM32_SPI_40015000_BASE_ADDRESS
#define CONFIG_SPI_5_IRQ_PRI ST_STM32_SPI_40015000_IRQ_0_PRIORITY #define CONFIG_SPI_5_IRQ_PRI DT_ST_STM32_SPI_40015000_IRQ_0_PRIORITY
#define CONFIG_SPI_5_NAME ST_STM32_SPI_40015000_LABEL #define CONFIG_SPI_5_NAME DT_ST_STM32_SPI_40015000_LABEL
#define CONFIG_SPI_5_IRQ ST_STM32_SPI_40015000_IRQ_0 #define CONFIG_SPI_5_IRQ DT_ST_STM32_SPI_40015000_IRQ_0
#define CONFIG_SPI_6_BASE_ADDRESS ST_STM32_SPI_40015400_BASE_ADDRESS #define CONFIG_SPI_6_BASE_ADDRESS DT_ST_STM32_SPI_40015400_BASE_ADDRESS
#define CONFIG_SPI_6_IRQ_PRI ST_STM32_SPI_40015400_IRQ_0_PRIORITY #define CONFIG_SPI_6_IRQ_PRI DT_ST_STM32_SPI_40015400_IRQ_0_PRIORITY
#define CONFIG_SPI_6_NAME ST_STM32_SPI_40015400_LABEL #define CONFIG_SPI_6_NAME DT_ST_STM32_SPI_40015400_LABEL
#define CONFIG_SPI_6_IRQ ST_STM32_SPI_40015400_IRQ_0 #define CONFIG_SPI_6_IRQ DT_ST_STM32_SPI_40015400_IRQ_0
#define CONFIG_I2S_1_BASE_ADDRESS ST_STM32_I2S_40013000_BASE_ADDRESS #define CONFIG_I2S_1_BASE_ADDRESS DT_ST_STM32_I2S_40013000_BASE_ADDRESS
#define CONFIG_I2S_1_IRQ_PRI ST_STM32_I2S_40013000_IRQ_0_PRIORITY #define CONFIG_I2S_1_IRQ_PRI DT_ST_STM32_I2S_40013000_IRQ_0_PRIORITY
#define CONFIG_I2S_1_NAME ST_STM32_I2S_40013000_LABEL #define CONFIG_I2S_1_NAME DT_ST_STM32_I2S_40013000_LABEL
#define CONFIG_I2S_1_IRQ ST_STM32_I2S_40013000_IRQ_0 #define CONFIG_I2S_1_IRQ DT_ST_STM32_I2S_40013000_IRQ_0
#define CONFIG_I2S_1_CLOCK_BITS ST_STM32_I2S_40013000_CLOCK_BITS #define CONFIG_I2S_1_CLOCK_BITS DT_ST_STM32_I2S_40013000_CLOCK_BITS
#define CONFIG_I2S_1_CLOCK_BUS ST_STM32_I2S_40013000_CLOCK_BUS #define CONFIG_I2S_1_CLOCK_BUS DT_ST_STM32_I2S_40013000_CLOCK_BUS
#define CONFIG_I2S_2_BASE_ADDRESS ST_STM32_I2S_40003800_BASE_ADDRESS #define CONFIG_I2S_2_BASE_ADDRESS DT_ST_STM32_I2S_40003800_BASE_ADDRESS
#define CONFIG_I2S_2_IRQ_PRI ST_STM32_I2S_40003800_IRQ_0_PRIORITY #define CONFIG_I2S_2_IRQ_PRI DT_ST_STM32_I2S_40003800_IRQ_0_PRIORITY
#define CONFIG_I2S_2_NAME ST_STM32_I2S_40003800_LABEL #define CONFIG_I2S_2_NAME DT_ST_STM32_I2S_40003800_LABEL
#define CONFIG_I2S_2_IRQ ST_STM32_I2S_40003800_IRQ_0 #define CONFIG_I2S_2_IRQ DT_ST_STM32_I2S_40003800_IRQ_0
#define CONFIG_I2S_2_CLOCK_BITS ST_STM32_I2S_40003800_CLOCK_BITS #define CONFIG_I2S_2_CLOCK_BITS DT_ST_STM32_I2S_40003800_CLOCK_BITS
#define CONFIG_I2S_2_CLOCK_BUS ST_STM32_I2S_40003800_CLOCK_BUS #define CONFIG_I2S_2_CLOCK_BUS DT_ST_STM32_I2S_40003800_CLOCK_BUS
#define CONFIG_I2S_3_BASE_ADDRESS ST_STM32_I2S_40003C00_BASE_ADDRESS #define CONFIG_I2S_3_BASE_ADDRESS DT_ST_STM32_I2S_40003C00_BASE_ADDRESS
#define CONFIG_I2S_3_IRQ_PRI ST_STM32_I2S_40003C00_IRQ_0_PRIORITY #define CONFIG_I2S_3_IRQ_PRI DT_ST_STM32_I2S_40003C00_IRQ_0_PRIORITY
#define CONFIG_I2S_3_NAME ST_STM32_I2S_40003C00_LABEL #define CONFIG_I2S_3_NAME DT_ST_STM32_I2S_40003C00_LABEL
#define CONFIG_I2S_3_IRQ ST_STM32_I2S_40003C00_IRQ_0 #define CONFIG_I2S_3_IRQ DT_ST_STM32_I2S_40003C00_IRQ_0
#define CONFIG_I2S_3_CLOCK_BITS ST_STM32_I2S_40003C00_CLOCK_BITS #define CONFIG_I2S_3_CLOCK_BITS DT_ST_STM32_I2S_40003C00_CLOCK_BITS
#define CONFIG_I2S_3_CLOCK_BUS ST_STM32_I2S_40003C00_CLOCK_BUS #define CONFIG_I2S_3_CLOCK_BUS DT_ST_STM32_I2S_40003C00_CLOCK_BUS
#define CONFIG_I2S_4_BASE_ADDRESS ST_STM32_I2S_40013400_BASE_ADDRESS #define CONFIG_I2S_4_BASE_ADDRESS DT_ST_STM32_I2S_40013400_BASE_ADDRESS
#define CONFIG_I2S_4_IRQ_PRI ST_STM32_I2S_40013400_IRQ_0_PRIORITY #define CONFIG_I2S_4_IRQ_PRI DT_ST_STM32_I2S_40013400_IRQ_0_PRIORITY
#define CONFIG_I2S_4_NAME ST_STM32_I2S_40013400_LABEL #define CONFIG_I2S_4_NAME DT_ST_STM32_I2S_40013400_LABEL
#define CONFIG_I2S_4_IRQ ST_STM32_I2S_40013400_IRQ_0 #define CONFIG_I2S_4_IRQ DT_ST_STM32_I2S_40013400_IRQ_0
#define CONFIG_I2S_4_CLOCK_BITS ST_STM32_I2S_40013400_CLOCK_BITS #define CONFIG_I2S_4_CLOCK_BITS DT_ST_STM32_I2S_40013400_CLOCK_BITS
#define CONFIG_I2S_4_CLOCK_BUS ST_STM32_I2S_40013400_CLOCK_BUS #define CONFIG_I2S_4_CLOCK_BUS DT_ST_STM32_I2S_40013400_CLOCK_BUS
#define CONFIG_I2S_5_BASE_ADDRESS ST_STM32_I2S_40015000_BASE_ADDRESS #define CONFIG_I2S_5_BASE_ADDRESS DT_ST_STM32_I2S_40015000_BASE_ADDRESS
#define CONFIG_I2S_5_IRQ_PRI ST_STM32_I2S_40015000_IRQ_0_PRIORITY #define CONFIG_I2S_5_IRQ_PRI DT_ST_STM32_I2S_40015000_IRQ_0_PRIORITY
#define CONFIG_I2S_5_NAME ST_STM32_I2S_40015000_LABEL #define CONFIG_I2S_5_NAME DT_ST_STM32_I2S_40015000_LABEL
#define CONFIG_I2S_5_IRQ ST_STM32_I2S_40015000_IRQ_0 #define CONFIG_I2S_5_IRQ DT_ST_STM32_I2S_40015000_IRQ_0
#define CONFIG_I2S_5_CLOCK_BITS ST_STM32_I2S_40015000_CLOCK_BITS #define CONFIG_I2S_5_CLOCK_BITS DT_ST_STM32_I2S_40015000_CLOCK_BITS
#define CONFIG_I2S_5_CLOCK_BUS ST_STM32_I2S_40015000_CLOCK_BUS #define CONFIG_I2S_5_CLOCK_BUS DT_ST_STM32_I2S_40015000_CLOCK_BUS
#define CONFIG_I2S_6_BASE_ADDRESS ST_STM32_I2S_40015400_BASE_ADDRESS #define CONFIG_I2S_6_BASE_ADDRESS DT_ST_STM32_I2S_40015400_BASE_ADDRESS
#define CONFIG_I2S_6_IRQ_PRI ST_STM32_I2S_40015400_IRQ_0_PRIORITY #define CONFIG_I2S_6_IRQ_PRI DT_ST_STM32_I2S_40015400_IRQ_0_PRIORITY
#define CONFIG_I2S_6_NAME ST_STM32_I2S_40015400_LABEL #define CONFIG_I2S_6_NAME DT_ST_STM32_I2S_40015400_LABEL
#define CONFIG_I2S_6_IRQ ST_STM32_I2S_40015400_IRQ_0 #define CONFIG_I2S_6_IRQ DT_ST_STM32_I2S_40015400_IRQ_0
#define CONFIG_I2S_6_CLOCK_BITS ST_STM32_I2S_40015400_CLOCK_BITS #define CONFIG_I2S_6_CLOCK_BITS DT_ST_STM32_I2S_40015400_CLOCK_BITS
#define CONFIG_I2S_6_CLOCK_BUS ST_STM32_I2S_40015400_CLOCK_BUS #define CONFIG_I2S_6_CLOCK_BUS DT_ST_STM32_I2S_40015400_CLOCK_BUS
#define FLASH_DEV_BASE_ADDRESS ST_STM32F4_FLASH_CONTROLLER_40023C00_BASE_ADDRESS #define FLASH_DEV_BASE_ADDRESS DT_ST_STM32F4_FLASH_CONTROLLER_40023C00_BASE_ADDRESS
#define FLASH_DEV_NAME ST_STM32F4_FLASH_CONTROLLER_40023C00_LABEL #define FLASH_DEV_NAME DT_ST_STM32F4_FLASH_CONTROLLER_40023C00_LABEL
#ifdef ST_STM32_OTGFS_50000000_BASE_ADDRESS #ifdef DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS
#define CONFIG_USB_BASE_ADDRESS ST_STM32_OTGFS_50000000_BASE_ADDRESS #define CONFIG_USB_BASE_ADDRESS DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS
#define CONFIG_USB_IRQ ST_STM32_OTGFS_50000000_IRQ_OTGFS #define CONFIG_USB_IRQ DT_ST_STM32_OTGFS_50000000_IRQ_OTGFS
#define CONFIG_USB_IRQ_PRI ST_STM32_OTGFS_50000000_IRQ_OTGFS_PRIORITY #define CONFIG_USB_IRQ_PRI DT_ST_STM32_OTGFS_50000000_IRQ_OTGFS_PRIORITY
#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS #define CONFIG_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
#define CONFIG_USB_RAM_SIZE ST_STM32_OTGFS_50000000_RAM_SIZE #define CONFIG_USB_RAM_SIZE DT_ST_STM32_OTGFS_50000000_RAM_SIZE
#define CONFIG_USB_MAXIMUM_SPEED ST_STM32_OTGFS_50000000_MAXIMUM_SPEED #define CONFIG_USB_MAXIMUM_SPEED DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
#endif /* ST_STM32_OTGFS_50000000_BASE_ADDRESS */ #endif /* DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS */
#ifdef ST_STM32_OTGHS_40040000_BASE_ADDRESS #ifdef DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS
#define CONFIG_USB_HS_BASE_ADDRESS ST_STM32_OTGHS_40040000_BASE_ADDRESS #define CONFIG_USB_HS_BASE_ADDRESS DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS
#define CONFIG_USB_IRQ ST_STM32_OTGHS_40040000_IRQ_OTGHS #define CONFIG_USB_IRQ DT_ST_STM32_OTGHS_40040000_IRQ_OTGHS
#define CONFIG_USB_IRQ_PRI ST_STM32_OTGHS_40040000_IRQ_OTGHS_PRIORITY #define CONFIG_USB_IRQ_PRI DT_ST_STM32_OTGHS_40040000_IRQ_OTGHS_PRIORITY
#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_OTGHS_40040000_NUM_BIDIR_ENDPOINTS #define CONFIG_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGHS_40040000_NUM_BIDIR_ENDPOINTS
#define CONFIG_USB_RAM_SIZE ST_STM32_OTGHS_40040000_RAM_SIZE #define CONFIG_USB_RAM_SIZE DT_ST_STM32_OTGHS_40040000_RAM_SIZE
#define CONFIG_USB_MAXIMUM_SPEED ST_STM32_OTGHS_40040000_MAXIMUM_SPEED #define CONFIG_USB_MAXIMUM_SPEED DT_ST_STM32_OTGHS_40040000_MAXIMUM_SPEED
#endif /* ST_STM32_OTGHS_40040000_BASE_ADDRESS */ #endif /* DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS */
#define CONFIG_PWM_STM32_1_DEV_NAME ST_STM32_PWM_40010000_PWM_LABEL #define CONFIG_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40010000_PWM_LABEL
#define CONFIG_PWM_STM32_1_PRESCALER ST_STM32_PWM_40010000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_1_PRESCALER DT_ST_STM32_PWM_40010000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_2_DEV_NAME ST_STM32_PWM_40000000_PWM_LABEL #define CONFIG_PWM_STM32_2_DEV_NAME DT_ST_STM32_PWM_40000000_PWM_LABEL
#define CONFIG_PWM_STM32_2_PRESCALER ST_STM32_PWM_40000000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_2_PRESCALER DT_ST_STM32_PWM_40000000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_3_DEV_NAME ST_STM32_PWM_40000400_PWM_LABEL #define CONFIG_PWM_STM32_3_DEV_NAME DT_ST_STM32_PWM_40000400_PWM_LABEL
#define CONFIG_PWM_STM32_3_PRESCALER ST_STM32_PWM_40000400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_3_PRESCALER DT_ST_STM32_PWM_40000400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_4_DEV_NAME ST_STM32_PWM_40000800_PWM_LABEL #define CONFIG_PWM_STM32_4_DEV_NAME DT_ST_STM32_PWM_40000800_PWM_LABEL
#define CONFIG_PWM_STM32_4_PRESCALER ST_STM32_PWM_40000800_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_4_PRESCALER DT_ST_STM32_PWM_40000800_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_5_DEV_NAME ST_STM32_PWM_40000C00_PWM_LABEL #define CONFIG_PWM_STM32_5_DEV_NAME DT_ST_STM32_PWM_40000C00_PWM_LABEL
#define CONFIG_PWM_STM32_5_PRESCALER ST_STM32_PWM_40000C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_5_PRESCALER DT_ST_STM32_PWM_40000C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_6_DEV_NAME ST_STM32_PWM_40001000_PWM_LABEL #define CONFIG_PWM_STM32_6_DEV_NAME DT_ST_STM32_PWM_40001000_PWM_LABEL
#define CONFIG_PWM_STM32_6_PRESCALER ST_STM32_PWM_40001000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_6_PRESCALER DT_ST_STM32_PWM_40001000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_7_DEV_NAME ST_STM32_PWM_40001400_PWM_LABEL #define CONFIG_PWM_STM32_7_DEV_NAME DT_ST_STM32_PWM_40001400_PWM_LABEL
#define CONFIG_PWM_STM32_7_PRESCALER ST_STM32_PWM_40001400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_7_PRESCALER DT_ST_STM32_PWM_40001400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_8_DEV_NAME ST_STM32_PWM_40010400_PWM_LABEL #define CONFIG_PWM_STM32_8_DEV_NAME DT_ST_STM32_PWM_40010400_PWM_LABEL
#define CONFIG_PWM_STM32_8_PRESCALER ST_STM32_PWM_40010400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_8_PRESCALER DT_ST_STM32_PWM_40010400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_9_DEV_NAME ST_STM32_PWM_40014000_PWM_LABEL #define CONFIG_PWM_STM32_9_DEV_NAME DT_ST_STM32_PWM_40014000_PWM_LABEL
#define CONFIG_PWM_STM32_9_PRESCALER ST_STM32_PWM_40014000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_9_PRESCALER DT_ST_STM32_PWM_40014000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_10_DEV_NAME ST_STM32_PWM_40014400_PWM_LABEL #define CONFIG_PWM_STM32_10_DEV_NAME DT_ST_STM32_PWM_40014400_PWM_LABEL
#define CONFIG_PWM_STM32_10_PRESCALER ST_STM32_PWM_40014400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_10_PRESCALER DT_ST_STM32_PWM_40014400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_11_DEV_NAME ST_STM32_PWM_40014800_PWM_LABEL #define CONFIG_PWM_STM32_11_DEV_NAME DT_ST_STM32_PWM_40014800_PWM_LABEL
#define CONFIG_PWM_STM32_11_PRESCALER ST_STM32_PWM_40014800_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_11_PRESCALER DT_ST_STM32_PWM_40014800_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_12_DEV_NAME ST_STM32_PWM_40001800_PWM_LABEL #define CONFIG_PWM_STM32_12_DEV_NAME DT_ST_STM32_PWM_40001800_PWM_LABEL
#define CONFIG_PWM_STM32_12_PRESCALER ST_STM32_PWM_40001800_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_12_PRESCALER DT_ST_STM32_PWM_40001800_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_13_DEV_NAME ST_STM32_PWM_40001C00_PWM_LABEL #define CONFIG_PWM_STM32_13_DEV_NAME DT_ST_STM32_PWM_40001C00_PWM_LABEL
#define CONFIG_PWM_STM32_13_PRESCALER ST_STM32_PWM_40001C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_13_PRESCALER DT_ST_STM32_PWM_40001C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_14_DEV_NAME ST_STM32_PWM_40002000_PWM_LABEL #define CONFIG_PWM_STM32_14_DEV_NAME DT_ST_STM32_PWM_40002000_PWM_LABEL
#define CONFIG_PWM_STM32_14_PRESCALER ST_STM32_PWM_40002000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_14_PRESCALER DT_ST_STM32_PWM_40002000_PWM_ST_PRESCALER
#define CONFIG_RTC_0_BASE_ADDRESS ST_STM32_RTC_40002800_BASE_ADDRESS #define CONFIG_RTC_0_BASE_ADDRESS DT_ST_STM32_RTC_40002800_BASE_ADDRESS
#define CONFIG_RTC_0_IRQ_PRI ST_STM32_RTC_40002800_IRQ_0_PRIORITY #define CONFIG_RTC_0_IRQ_PRI DT_ST_STM32_RTC_40002800_IRQ_0_PRIORITY
#define CONFIG_RTC_0_IRQ ST_STM32_RTC_40002800_IRQ_0 #define CONFIG_RTC_0_IRQ DT_ST_STM32_RTC_40002800_IRQ_0
#define CONFIG_RTC_0_NAME ST_STM32_RTC_40002800_LABEL #define CONFIG_RTC_0_NAME DT_ST_STM32_RTC_40002800_LABEL
#define CONFIG_RTC_PRESCALER ST_STM32_RTC_40002800_PRESCALER #define CONFIG_RTC_PRESCALER DT_ST_STM32_RTC_40002800_PRESCALER
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

490
soc/arm/st_stm32/stm32f7/dts_fixup.h
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@ -1,294 +1,294 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_40020000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS DT_ST_STM32_GPIO_40020000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_40020000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_40020000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_40020000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_40020000_LABEL #define CONFIG_GPIO_STM32_GPIOA_LABEL DT_ST_STM32_GPIO_40020000_LABEL
#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_40020000_SIZE #define CONFIG_GPIO_STM32_GPIOA_SIZE DT_ST_STM32_GPIO_40020000_SIZE
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_40020000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS DT_ST_STM32_GPIO_40020000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_40020000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS DT_ST_STM32_GPIO_40020000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_40020400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS DT_ST_STM32_GPIO_40020400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_40020400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_40020400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_40020400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_40020400_LABEL #define CONFIG_GPIO_STM32_GPIOB_LABEL DT_ST_STM32_GPIO_40020400_LABEL
#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_40020400_SIZE #define CONFIG_GPIO_STM32_GPIOB_SIZE DT_ST_STM32_GPIO_40020400_SIZE
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_40020400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS DT_ST_STM32_GPIO_40020400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_40020400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS DT_ST_STM32_GPIO_40020400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_40020800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS DT_ST_STM32_GPIO_40020800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_40020800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_40020800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_40020800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_40020800_LABEL #define CONFIG_GPIO_STM32_GPIOC_LABEL DT_ST_STM32_GPIO_40020800_LABEL
#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_40020800_SIZE #define CONFIG_GPIO_STM32_GPIOC_SIZE DT_ST_STM32_GPIO_40020800_SIZE
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_40020800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS DT_ST_STM32_GPIO_40020800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_40020800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS DT_ST_STM32_GPIO_40020800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_40020C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS DT_ST_STM32_GPIO_40020C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_40020C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 DT_ST_STM32_GPIO_40020C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_40020C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 DT_ST_STM32_GPIO_40020C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_40020C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40020C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_40020C00_LABEL #define CONFIG_GPIO_STM32_GPIOD_LABEL DT_ST_STM32_GPIO_40020C00_LABEL
#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_40020C00_SIZE #define CONFIG_GPIO_STM32_GPIOD_SIZE DT_ST_STM32_GPIO_40020C00_SIZE
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_40020C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS DT_ST_STM32_GPIO_40020C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_40020C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS DT_ST_STM32_GPIO_40020C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_40021000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS DT_ST_STM32_GPIO_40021000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_40021000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_40021000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_40021000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_40021000_LABEL #define CONFIG_GPIO_STM32_GPIOE_LABEL DT_ST_STM32_GPIO_40021000_LABEL
#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_40021000_SIZE #define CONFIG_GPIO_STM32_GPIOE_SIZE DT_ST_STM32_GPIO_40021000_SIZE
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_40021000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS DT_ST_STM32_GPIO_40021000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_40021000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS DT_ST_STM32_GPIO_40021000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_40021400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS DT_ST_STM32_GPIO_40021400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_40021400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_40021400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_40021400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_40021400_LABEL #define CONFIG_GPIO_STM32_GPIOF_LABEL DT_ST_STM32_GPIO_40021400_LABEL
#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_40021400_SIZE #define CONFIG_GPIO_STM32_GPIOF_SIZE DT_ST_STM32_GPIO_40021400_SIZE
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_40021400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS DT_ST_STM32_GPIO_40021400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_40021400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS DT_ST_STM32_GPIO_40021400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS ST_STM32_GPIO_40021800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS DT_ST_STM32_GPIO_40021800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 ST_STM32_GPIO_40021800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 ST_STM32_GPIO_40021800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER ST_STM32_GPIO_40021800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOG_LABEL ST_STM32_GPIO_40021800_LABEL #define CONFIG_GPIO_STM32_GPIOG_LABEL DT_ST_STM32_GPIO_40021800_LABEL
#define CONFIG_GPIO_STM32_GPIOG_SIZE ST_STM32_GPIO_40021800_SIZE #define CONFIG_GPIO_STM32_GPIOG_SIZE DT_ST_STM32_GPIO_40021800_SIZE
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS ST_STM32_GPIO_40021800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS DT_ST_STM32_GPIO_40021800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS ST_STM32_GPIO_40021800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS DT_ST_STM32_GPIO_40021800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS ST_STM32_GPIO_40021C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS DT_ST_STM32_GPIO_40021C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 ST_STM32_GPIO_40021C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 DT_ST_STM32_GPIO_40021C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 ST_STM32_GPIO_40021C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 DT_ST_STM32_GPIO_40021C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER ST_STM32_GPIO_40021C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40021C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOH_LABEL ST_STM32_GPIO_40021C00_LABEL #define CONFIG_GPIO_STM32_GPIOH_LABEL DT_ST_STM32_GPIO_40021C00_LABEL
#define CONFIG_GPIO_STM32_GPIOH_SIZE ST_STM32_GPIO_40021C00_SIZE #define CONFIG_GPIO_STM32_GPIOH_SIZE DT_ST_STM32_GPIO_40021C00_SIZE
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS ST_STM32_GPIO_40021C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS DT_ST_STM32_GPIO_40021C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS ST_STM32_GPIO_40021C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS DT_ST_STM32_GPIO_40021C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOI_BASE_ADDRESS ST_STM32_GPIO_40022000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOI_BASE_ADDRESS DT_ST_STM32_GPIO_40022000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS_0 ST_STM32_GPIO_40022000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS_0 DT_ST_STM32_GPIO_40022000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS_0 ST_STM32_GPIO_40022000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS_0 DT_ST_STM32_GPIO_40022000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_CONTROLLER ST_STM32_GPIO_40022000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOI_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40022000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOI_LABEL ST_STM32_GPIO_40022000_LABEL #define CONFIG_GPIO_STM32_GPIOI_LABEL DT_ST_STM32_GPIO_40022000_LABEL
#define CONFIG_GPIO_STM32_GPIOI_SIZE ST_STM32_GPIO_40022000_SIZE #define CONFIG_GPIO_STM32_GPIOI_SIZE DT_ST_STM32_GPIO_40022000_SIZE
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS ST_STM32_GPIO_40022000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS DT_ST_STM32_GPIO_40022000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS ST_STM32_GPIO_40022000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS DT_ST_STM32_GPIO_40022000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOJ_BASE_ADDRESS ST_STM32_GPIO_40022400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOJ_BASE_ADDRESS DT_ST_STM32_GPIO_40022400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BITS_0 ST_STM32_GPIO_40022400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BITS_0 DT_ST_STM32_GPIO_40022400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BUS_0 ST_STM32_GPIO_40022400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BUS_0 DT_ST_STM32_GPIO_40022400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_CONTROLLER ST_STM32_GPIO_40022400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOJ_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40022400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOJ_LABEL ST_STM32_GPIO_40022400_LABEL #define CONFIG_GPIO_STM32_GPIOJ_LABEL DT_ST_STM32_GPIO_40022400_LABEL
#define CONFIG_GPIO_STM32_GPIOJ_SIZE ST_STM32_GPIO_40022400_SIZE #define CONFIG_GPIO_STM32_GPIOJ_SIZE DT_ST_STM32_GPIO_40022400_SIZE
#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BITS ST_STM32_GPIO_40022400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BITS DT_ST_STM32_GPIO_40022400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BUS ST_STM32_GPIO_40022400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BUS DT_ST_STM32_GPIO_40022400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOK_BASE_ADDRESS ST_STM32_GPIO_40022800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOK_BASE_ADDRESS DT_ST_STM32_GPIO_40022800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BITS_0 ST_STM32_GPIO_40022800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOK_CLOCK_BITS_0 DT_ST_STM32_GPIO_40022800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BUS_0 ST_STM32_GPIO_40022800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOK_CLOCK_BUS_0 DT_ST_STM32_GPIO_40022800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOK_CLOCK_CONTROLLER ST_STM32_GPIO_40022800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOK_CLOCK_CONTROLLER DT_ST_STM32_GPIO_40022800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOK_LABEL ST_STM32_GPIO_40022800_LABEL #define CONFIG_GPIO_STM32_GPIOK_LABEL DT_ST_STM32_GPIO_40022800_LABEL
#define CONFIG_GPIO_STM32_GPIOK_SIZE ST_STM32_GPIO_40022800_SIZE #define CONFIG_GPIO_STM32_GPIOK_SIZE DT_ST_STM32_GPIO_40022800_SIZE
#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BITS ST_STM32_GPIO_40022800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOK_CLOCK_BITS DT_ST_STM32_GPIO_40022800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BUS ST_STM32_GPIO_40022800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOK_CLOCK_BUS DT_ST_STM32_GPIO_40022800_CLOCK_BUS
#define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40011000_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS DT_ST_STM32_USART_40011000_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40011000_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_BAUD_RATE DT_ST_STM32_USART_40011000_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40011000_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_1_IRQ_PRI DT_ST_STM32_USART_40011000_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_1_NAME ST_STM32_USART_40011000_LABEL #define CONFIG_UART_STM32_USART_1_NAME DT_ST_STM32_USART_40011000_LABEL
#define USART_1_IRQ ST_STM32_USART_40011000_IRQ_0 #define USART_1_IRQ DT_ST_STM32_USART_40011000_IRQ_0
#define CONFIG_UART_STM32_USART_1_CLOCK_BITS ST_STM32_USART_40011000_CLOCK_BITS #define CONFIG_UART_STM32_USART_1_CLOCK_BITS DT_ST_STM32_USART_40011000_CLOCK_BITS
#define CONFIG_UART_STM32_USART_1_CLOCK_BUS ST_STM32_USART_40011000_CLOCK_BUS #define CONFIG_UART_STM32_USART_1_CLOCK_BUS DT_ST_STM32_USART_40011000_CLOCK_BUS
#define CONFIG_UART_STM32_USART_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS #define CONFIG_UART_STM32_USART_2_BASE_ADDRESS DT_ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED #define CONFIG_UART_STM32_USART_2_BAUD_RATE DT_ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_2_IRQ_PRI DT_ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_2_NAME ST_STM32_USART_40004400_LABEL #define CONFIG_UART_STM32_USART_2_NAME DT_ST_STM32_USART_40004400_LABEL
#define USART_2_IRQ ST_STM32_USART_40004400_IRQ_0 #define USART_2_IRQ DT_ST_STM32_USART_40004400_IRQ_0
#define CONFIG_UART_STM32_USART_2_CLOCK_BITS ST_STM32_USART_40004400_CLOCK_BITS #define CONFIG_UART_STM32_USART_2_CLOCK_BITS DT_ST_STM32_USART_40004400_CLOCK_BITS
#define CONFIG_UART_STM32_USART_2_CLOCK_BUS ST_STM32_USART_40004400_CLOCK_BUS #define CONFIG_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
#define CONFIG_UART_STM32_USART_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_3_BASE_ADDRESS DT_ST_STM32_USART_40004800_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_3_BAUD_RATE ST_STM32_USART_40004800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_3_BAUD_RATE DT_ST_STM32_USART_40004800_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_3_IRQ_PRI ST_STM32_USART_40004800_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_3_IRQ_PRI DT_ST_STM32_USART_40004800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_3_NAME ST_STM32_USART_40004800_LABEL #define CONFIG_UART_STM32_USART_3_NAME DT_ST_STM32_USART_40004800_LABEL
#define USART_3_IRQ ST_STM32_USART_40004800_IRQ_0 #define USART_3_IRQ DT_ST_STM32_USART_40004800_IRQ_0
#define CONFIG_UART_STM32_USART_3_CLOCK_BITS ST_STM32_USART_40004800_CLOCK_BITS #define CONFIG_UART_STM32_USART_3_CLOCK_BITS DT_ST_STM32_USART_40004800_CLOCK_BITS
#define CONFIG_UART_STM32_USART_3_CLOCK_BUS ST_STM32_USART_40004800_CLOCK_BUS #define CONFIG_UART_STM32_USART_3_CLOCK_BUS DT_ST_STM32_USART_40004800_CLOCK_BUS
#define CONFIG_UART_STM32_USART_4_BASE_ADDRESS ST_STM32_USART_40004C00_BASE_ADDRESS #define CONFIG_UART_STM32_USART_4_BASE_ADDRESS DT_ST_STM32_USART_40004C00_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_4_BAUD_RATE ST_STM32_USART_40004C00_CURRENT_SPEED #define CONFIG_UART_STM32_USART_4_BAUD_RATE DT_ST_STM32_USART_40004C00_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_4_IRQ_PRI ST_STM32_USART_40004C00_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_4_IRQ_PRI DT_ST_STM32_USART_40004C00_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_4_NAME ST_STM32_USART_40004C00_LABEL #define CONFIG_UART_STM32_USART_4_NAME DT_ST_STM32_USART_40004C00_LABEL
#define USART_4_IRQ ST_STM32_USART_40004C00_IRQ_0 #define USART_4_IRQ DT_ST_STM32_USART_40004C00_IRQ_0
#define CONFIG_UART_STM32_USART_4_CLOCK_BITS ST_STM32_USART_40004C00_CLOCK_BITS #define CONFIG_UART_STM32_USART_4_CLOCK_BITS DT_ST_STM32_USART_40004C00_CLOCK_BITS
#define CONFIG_UART_STM32_USART_4_CLOCK_BUS ST_STM32_USART_40004C00_CLOCK_BUS #define CONFIG_UART_STM32_USART_4_CLOCK_BUS DT_ST_STM32_USART_40004C00_CLOCK_BUS
#define CONFIG_UART_STM32_USART_5_BASE_ADDRESS ST_STM32_USART_40005000_BASE_ADDRESS #define CONFIG_UART_STM32_USART_5_BASE_ADDRESS DT_ST_STM32_USART_40005000_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_5_BAUD_RATE ST_STM32_USART_40005000_CURRENT_SPEED #define CONFIG_UART_STM32_USART_5_BAUD_RATE DT_ST_STM32_USART_40005000_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_5_IRQ_PRI ST_STM32_USART_40005000_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_5_IRQ_PRI DT_ST_STM32_USART_40005000_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_5_NAME ST_STM32_USART_40005000_LABEL #define CONFIG_UART_STM32_USART_5_NAME DT_ST_STM32_USART_40005000_LABEL
#define USART_5_IRQ ST_STM32_USART_40005000_IRQ_0 #define USART_5_IRQ DT_ST_STM32_USART_40005000_IRQ_0
#define CONFIG_UART_STM32_USART_5_CLOCK_BITS ST_STM32_USART_40005000_CLOCK_BITS #define CONFIG_UART_STM32_USART_5_CLOCK_BITS DT_ST_STM32_USART_40005000_CLOCK_BITS
#define CONFIG_UART_STM32_USART_5_CLOCK_BUS ST_STM32_USART_40005000_CLOCK_BUS #define CONFIG_UART_STM32_USART_5_CLOCK_BUS DT_ST_STM32_USART_40005000_CLOCK_BUS
#define CONFIG_UART_STM32_USART_6_BASE_ADDRESS ST_STM32_USART_40011400_BASE_ADDRESS #define CONFIG_UART_STM32_USART_6_BASE_ADDRESS DT_ST_STM32_USART_40011400_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_6_BAUD_RATE ST_STM32_USART_40011400_CURRENT_SPEED #define CONFIG_UART_STM32_USART_6_BAUD_RATE DT_ST_STM32_USART_40011400_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_6_IRQ_PRI ST_STM32_USART_40011400_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_6_IRQ_PRI DT_ST_STM32_USART_40011400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_6_NAME ST_STM32_USART_40011400_LABEL #define CONFIG_UART_STM32_USART_6_NAME DT_ST_STM32_USART_40011400_LABEL
#define USART_6_IRQ ST_STM32_USART_40011400_IRQ_0 #define USART_6_IRQ DT_ST_STM32_USART_40011400_IRQ_0
#define CONFIG_UART_STM32_USART_6_CLOCK_BITS ST_STM32_USART_40011400_CLOCK_BITS #define CONFIG_UART_STM32_USART_6_CLOCK_BITS DT_ST_STM32_USART_40011400_CLOCK_BITS
#define CONFIG_UART_STM32_USART_6_CLOCK_BUS ST_STM32_USART_40011400_CLOCK_BUS #define CONFIG_UART_STM32_USART_6_CLOCK_BUS DT_ST_STM32_USART_40011400_CLOCK_BUS
#define CONFIG_UART_STM32_USART_7_BASE_ADDRESS ST_STM32_USART_40007800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_7_BASE_ADDRESS DT_ST_STM32_USART_40007800_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_7_BAUD_RATE ST_STM32_USART_40007800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_7_BAUD_RATE DT_ST_STM32_USART_40007800_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_7_IRQ_PRI ST_STM32_USART_40007800_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_7_IRQ_PRI DT_ST_STM32_USART_40007800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_7_NAME ST_STM32_USART_40007800_LABEL #define CONFIG_UART_STM32_USART_7_NAME DT_ST_STM32_USART_40007800_LABEL
#define USART_7_IRQ ST_STM32_USART_40007800_IRQ_0 #define USART_7_IRQ DT_ST_STM32_USART_40007800_IRQ_0
#define CONFIG_UART_STM32_USART_7_CLOCK_BITS ST_STM32_USART_40007800_CLOCK_BITS #define CONFIG_UART_STM32_USART_7_CLOCK_BITS DT_ST_STM32_USART_40007800_CLOCK_BITS
#define CONFIG_UART_STM32_USART_7_CLOCK_BUS ST_STM32_USART_40007800_CLOCK_BUS #define CONFIG_UART_STM32_USART_7_CLOCK_BUS DT_ST_STM32_USART_40007800_CLOCK_BUS
#define CONFIG_UART_STM32_USART_8_BASE_ADDRESS ST_STM32_USART_40007C00_BASE_ADDRESS #define CONFIG_UART_STM32_USART_8_BASE_ADDRESS DT_ST_STM32_USART_40007C00_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_8_BAUD_RATE ST_STM32_USART_40007C00_CURRENT_SPEED #define CONFIG_UART_STM32_USART_8_BAUD_RATE DT_ST_STM32_USART_40007C00_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_8_IRQ_PRI ST_STM32_USART_40007C00_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_8_IRQ_PRI DT_ST_STM32_USART_40007C00_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_8_NAME ST_STM32_USART_40007C00_LABEL #define CONFIG_UART_STM32_USART_8_NAME DT_ST_STM32_USART_40007C00_LABEL
#define USART_8_IRQ ST_STM32_USART_40007C00_IRQ_0 #define USART_8_IRQ DT_ST_STM32_USART_40007C00_IRQ_0
#define CONFIG_UART_STM32_USART_8_CLOCK_BITS ST_STM32_USART_40007C00_CLOCK_BITS #define CONFIG_UART_STM32_USART_8_CLOCK_BITS DT_ST_STM32_USART_40007C00_CLOCK_BITS
#define CONFIG_UART_STM32_USART_8_CLOCK_BUS ST_STM32_USART_40007C00_CLOCK_BUS #define CONFIG_UART_STM32_USART_8_CLOCK_BUS DT_ST_STM32_USART_40007C00_CLOCK_BUS
#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
#define CONFIG_I2C_1_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY #define CONFIG_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_1_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY #define CONFIG_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL #define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V2_40005400_IRQ_EVENT #define CONFIG_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V2_40005400_IRQ_ERROR #define CONFIG_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V2_40005400_CLOCK_BITS #define CONFIG_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V2_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V2_40005400_CLOCK_BUS #define CONFIG_I2C_1_CLOCK_BUS DT_ST_STM32_I2C_V2_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS #define CONFIG_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY #define CONFIG_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_2_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY #define CONFIG_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL #define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V2_40005800_IRQ_EVENT #define CONFIG_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT
#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V2_40005800_IRQ_ERROR #define CONFIG_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY #define CONFIG_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V2_40005800_CLOCK_BITS #define CONFIG_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V2_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V2_40005800_CLOCK_BUS #define CONFIG_I2C_2_CLOCK_BUS DT_ST_STM32_I2C_V2_40005800_CLOCK_BUS
#define CONFIG_I2C_3_BASE_ADDRESS ST_STM32_I2C_V2_40005C00_BASE_ADDRESS #define CONFIG_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
#define CONFIG_I2C_3_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY #define CONFIG_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_3_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY #define CONFIG_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_3_NAME ST_STM32_I2C_V2_40005C00_LABEL #define CONFIG_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
#define CONFIG_I2C_3_EVENT_IRQ ST_STM32_I2C_V2_40005C00_IRQ_EVENT #define CONFIG_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT
#define CONFIG_I2C_3_ERROR_IRQ ST_STM32_I2C_V2_40005C00_IRQ_ERROR #define CONFIG_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR
#define CONFIG_I2C_3_BITRATE ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY #define CONFIG_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
#define CONFIG_I2C_3_CLOCK_BITS ST_STM32_I2C_V2_40005C00_CLOCK_BITS #define CONFIG_I2C_3_CLOCK_BITS DT_ST_STM32_I2C_V2_40005C00_CLOCK_BITS
#define CONFIG_I2C_3_CLOCK_BUS ST_STM32_I2C_V2_40005C00_CLOCK_BUS #define CONFIG_I2C_3_CLOCK_BUS DT_ST_STM32_I2C_V2_40005C00_CLOCK_BUS
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_40013000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_ST_STM32_SPI_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_40013000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_ST_STM32_SPI_40013000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_NAME ST_STM32_SPI_40013000_LABEL #define CONFIG_SPI_1_NAME DT_ST_STM32_SPI_40013000_LABEL
#define CONFIG_SPI_1_IRQ ST_STM32_SPI_40013000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_ST_STM32_SPI_40013000_IRQ_0
#define CONFIG_SPI_2_BASE_ADDRESS ST_STM32_SPI_40003800_BASE_ADDRESS #define CONFIG_SPI_2_BASE_ADDRESS DT_ST_STM32_SPI_40003800_BASE_ADDRESS
#define CONFIG_SPI_2_IRQ_PRI ST_STM32_SPI_40003800_IRQ_0_PRIORITY #define CONFIG_SPI_2_IRQ_PRI DT_ST_STM32_SPI_40003800_IRQ_0_PRIORITY
#define CONFIG_SPI_2_NAME ST_STM32_SPI_40003800_LABEL #define CONFIG_SPI_2_NAME DT_ST_STM32_SPI_40003800_LABEL
#define CONFIG_SPI_2_IRQ ST_STM32_SPI_40003800_IRQ_0 #define CONFIG_SPI_2_IRQ DT_ST_STM32_SPI_40003800_IRQ_0
#define CONFIG_SPI_3_BASE_ADDRESS ST_STM32_SPI_40003C00_BASE_ADDRESS #define CONFIG_SPI_3_BASE_ADDRESS DT_ST_STM32_SPI_40003C00_BASE_ADDRESS
#define CONFIG_SPI_3_IRQ_PRI ST_STM32_SPI_40003C00_IRQ_0_PRIORITY #define CONFIG_SPI_3_IRQ_PRI DT_ST_STM32_SPI_40003C00_IRQ_0_PRIORITY
#define CONFIG_SPI_3_NAME ST_STM32_SPI_40003C00_LABEL #define CONFIG_SPI_3_NAME DT_ST_STM32_SPI_40003C00_LABEL
#define CONFIG_SPI_3_IRQ ST_STM32_SPI_40003C00_IRQ_0 #define CONFIG_SPI_3_IRQ DT_ST_STM32_SPI_40003C00_IRQ_0
#define CONFIG_SPI_4_BASE_ADDRESS ST_STM32_SPI_40013400_BASE_ADDRESS #define CONFIG_SPI_4_BASE_ADDRESS DT_ST_STM32_SPI_40013400_BASE_ADDRESS
#define CONFIG_SPI_4_IRQ_PRI ST_STM32_SPI_40013400_IRQ_0_PRIORITY #define CONFIG_SPI_4_IRQ_PRI DT_ST_STM32_SPI_40013400_IRQ_0_PRIORITY
#define CONFIG_SPI_4_NAME ST_STM32_SPI_40013400_LABEL #define CONFIG_SPI_4_NAME DT_ST_STM32_SPI_40013400_LABEL
#define CONFIG_SPI_4_IRQ ST_STM32_SPI_40013400_IRQ_0 #define CONFIG_SPI_4_IRQ DT_ST_STM32_SPI_40013400_IRQ_0
#define CONFIG_SPI_5_BASE_ADDRESS ST_STM32_SPI_40015000_BASE_ADDRESS #define CONFIG_SPI_5_BASE_ADDRESS DT_ST_STM32_SPI_40015000_BASE_ADDRESS
#define CONFIG_SPI_5_IRQ_PRI ST_STM32_SPI_40015000_IRQ_0_PRIORITY #define CONFIG_SPI_5_IRQ_PRI DT_ST_STM32_SPI_40015000_IRQ_0_PRIORITY
#define CONFIG_SPI_5_NAME ST_STM32_SPI_40015000_LABEL #define CONFIG_SPI_5_NAME DT_ST_STM32_SPI_40015000_LABEL
#define CONFIG_SPI_5_IRQ ST_STM32_SPI_40015000_IRQ_0 #define CONFIG_SPI_5_IRQ DT_ST_STM32_SPI_40015000_IRQ_0
#define CONFIG_SPI_6_BASE_ADDRESS ST_STM32_SPI_40015400_BASE_ADDRESS #define CONFIG_SPI_6_BASE_ADDRESS DT_ST_STM32_SPI_40015400_BASE_ADDRESS
#define CONFIG_SPI_6_IRQ_PRI ST_STM32_SPI_40015400_IRQ_0_PRIORITY #define CONFIG_SPI_6_IRQ_PRI DT_ST_STM32_SPI_40015400_IRQ_0_PRIORITY
#define CONFIG_SPI_6_NAME ST_STM32_SPI_40015400_LABEL #define CONFIG_SPI_6_NAME DT_ST_STM32_SPI_40015400_LABEL
#define CONFIG_SPI_6_IRQ ST_STM32_SPI_40015400_IRQ_0 #define CONFIG_SPI_6_IRQ DT_ST_STM32_SPI_40015400_IRQ_0
#ifdef ST_STM32_OTGFS_50000000_BASE_ADDRESS #ifdef DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS
#define CONFIG_USB_BASE_ADDRESS ST_STM32_OTGFS_50000000_BASE_ADDRESS #define CONFIG_USB_BASE_ADDRESS DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS
#define CONFIG_USB_IRQ ST_STM32_OTGFS_50000000_IRQ_OTGFS #define CONFIG_USB_IRQ DT_ST_STM32_OTGFS_50000000_IRQ_OTGFS
#define CONFIG_USB_IRQ_PRI ST_STM32_OTGFS_50000000_IRQ_OTGFS_PRIORITY #define CONFIG_USB_IRQ_PRI DT_ST_STM32_OTGFS_50000000_IRQ_OTGFS_PRIORITY
#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS #define CONFIG_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
#define CONFIG_USB_RAM_SIZE ST_STM32_OTGFS_50000000_RAM_SIZE #define CONFIG_USB_RAM_SIZE DT_ST_STM32_OTGFS_50000000_RAM_SIZE
#define CONFIG_USB_MAXIMUM_SPEED ST_STM32_OTGFS_50000000_MAXIMUM_SPEED #define CONFIG_USB_MAXIMUM_SPEED DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
#endif /* ST_STM32_OTGFS_50000000_BASE_ADDRESS */ #endif /* DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS */
#ifdef ST_STM32_OTGHS_40040000_BASE_ADDRESS #ifdef DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS
#define CONFIG_USB_HS_BASE_ADDRESS ST_STM32_OTGHS_40040000_BASE_ADDRESS #define CONFIG_USB_HS_BASE_ADDRESS DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS
#define CONFIG_USB_IRQ ST_STM32_OTGHS_40040000_IRQ_OTGHS #define CONFIG_USB_IRQ DT_ST_STM32_OTGHS_40040000_IRQ_OTGHS
#define CONFIG_USB_IRQ_PRI ST_STM32_OTGHS_40040000_IRQ_OTGHS_PRIORITY #define CONFIG_USB_IRQ_PRI DT_ST_STM32_OTGHS_40040000_IRQ_OTGHS_PRIORITY
#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_OTGHS_40040000_NUM_BIDIR_ENDPOINTS #define CONFIG_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGHS_40040000_NUM_BIDIR_ENDPOINTS
#define CONFIG_USB_RAM_SIZE ST_STM32_OTGHS_40040000_RAM_SIZE #define CONFIG_USB_RAM_SIZE DT_ST_STM32_OTGHS_40040000_RAM_SIZE
#define CONFIG_USB_MAXIMUM_SPEED ST_STM32_OTGHS_40040000_MAXIMUM_SPEED #define CONFIG_USB_MAXIMUM_SPEED DT_ST_STM32_OTGHS_40040000_MAXIMUM_SPEED
#endif /* ST_STM32_OTGHS_40040000_BASE_ADDRESS */ #endif /* DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS */
#define CONFIG_PWM_STM32_1_DEV_NAME ST_STM32_PWM_40010000_PWM_LABEL #define CONFIG_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40010000_PWM_LABEL
#define CONFIG_PWM_STM32_1_PRESCALER ST_STM32_PWM_40010000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_1_PRESCALER DT_ST_STM32_PWM_40010000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_2_DEV_NAME ST_STM32_PWM_40000000_PWM_LABEL #define CONFIG_PWM_STM32_2_DEV_NAME DT_ST_STM32_PWM_40000000_PWM_LABEL
#define CONFIG_PWM_STM32_2_PRESCALER ST_STM32_PWM_40000000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_2_PRESCALER DT_ST_STM32_PWM_40000000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_3_DEV_NAME ST_STM32_PWM_40000400_PWM_LABEL #define CONFIG_PWM_STM32_3_DEV_NAME DT_ST_STM32_PWM_40000400_PWM_LABEL
#define CONFIG_PWM_STM32_3_PRESCALER ST_STM32_PWM_40000400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_3_PRESCALER DT_ST_STM32_PWM_40000400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_4_DEV_NAME ST_STM32_PWM_40000800_PWM_LABEL #define CONFIG_PWM_STM32_4_DEV_NAME DT_ST_STM32_PWM_40000800_PWM_LABEL
#define CONFIG_PWM_STM32_4_PRESCALER ST_STM32_PWM_40000800_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_4_PRESCALER DT_ST_STM32_PWM_40000800_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_5_DEV_NAME ST_STM32_PWM_40000C00_PWM_LABEL #define CONFIG_PWM_STM32_5_DEV_NAME DT_ST_STM32_PWM_40000C00_PWM_LABEL
#define CONFIG_PWM_STM32_5_PRESCALER ST_STM32_PWM_40000C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_5_PRESCALER DT_ST_STM32_PWM_40000C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_6_DEV_NAME ST_STM32_PWM_40001000_PWM_LABEL #define CONFIG_PWM_STM32_6_DEV_NAME DT_ST_STM32_PWM_40001000_PWM_LABEL
#define CONFIG_PWM_STM32_6_PRESCALER ST_STM32_PWM_40001000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_6_PRESCALER DT_ST_STM32_PWM_40001000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_7_DEV_NAME ST_STM32_PWM_40001400_PWM_LABEL #define CONFIG_PWM_STM32_7_DEV_NAME DT_ST_STM32_PWM_40001400_PWM_LABEL
#define CONFIG_PWM_STM32_7_PRESCALER ST_STM32_PWM_40001400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_7_PRESCALER DT_ST_STM32_PWM_40001400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_8_DEV_NAME ST_STM32_PWM_40010400_PWM_LABEL #define CONFIG_PWM_STM32_8_DEV_NAME DT_ST_STM32_PWM_40010400_PWM_LABEL
#define CONFIG_PWM_STM32_8_PRESCALER ST_STM32_PWM_40010400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_8_PRESCALER DT_ST_STM32_PWM_40010400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_9_DEV_NAME ST_STM32_PWM_40014000_PWM_LABEL #define CONFIG_PWM_STM32_9_DEV_NAME DT_ST_STM32_PWM_40014000_PWM_LABEL
#define CONFIG_PWM_STM32_9_PRESCALER ST_STM32_PWM_40014000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_9_PRESCALER DT_ST_STM32_PWM_40014000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_10_DEV_NAME ST_STM32_PWM_40014400_PWM_LABEL #define CONFIG_PWM_STM32_10_DEV_NAME DT_ST_STM32_PWM_40014400_PWM_LABEL
#define CONFIG_PWM_STM32_10_PRESCALER ST_STM32_PWM_40014400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_10_PRESCALER DT_ST_STM32_PWM_40014400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_11_DEV_NAME ST_STM32_PWM_40014800_PWM_LABEL #define CONFIG_PWM_STM32_11_DEV_NAME DT_ST_STM32_PWM_40014800_PWM_LABEL
#define CONFIG_PWM_STM32_11_PRESCALER ST_STM32_PWM_40014800_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_11_PRESCALER DT_ST_STM32_PWM_40014800_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_12_DEV_NAME ST_STM32_PWM_40001800_PWM_LABEL #define CONFIG_PWM_STM32_12_DEV_NAME DT_ST_STM32_PWM_40001800_PWM_LABEL
#define CONFIG_PWM_STM32_12_PRESCALER ST_STM32_PWM_40001800_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_12_PRESCALER DT_ST_STM32_PWM_40001800_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_13_DEV_NAME ST_STM32_PWM_40001C00_PWM_LABEL #define CONFIG_PWM_STM32_13_DEV_NAME DT_ST_STM32_PWM_40001C00_PWM_LABEL
#define CONFIG_PWM_STM32_13_PRESCALER ST_STM32_PWM_40001C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_13_PRESCALER DT_ST_STM32_PWM_40001C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_14_DEV_NAME ST_STM32_PWM_40002000_PWM_LABEL #define CONFIG_PWM_STM32_14_DEV_NAME DT_ST_STM32_PWM_40002000_PWM_LABEL
#define CONFIG_PWM_STM32_14_PRESCALER ST_STM32_PWM_40002000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_14_PRESCALER DT_ST_STM32_PWM_40002000_PWM_ST_PRESCALER
#define CONFIG_RTC_0_BASE_ADDRESS ST_STM32_RTC_40002800_BASE_ADDRESS #define CONFIG_RTC_0_BASE_ADDRESS DT_ST_STM32_RTC_40002800_BASE_ADDRESS
#define CONFIG_RTC_0_IRQ_PRI ST_STM32_RTC_40002800_IRQ_0_PRIORITY #define CONFIG_RTC_0_IRQ_PRI DT_ST_STM32_RTC_40002800_IRQ_0_PRIORITY
#define CONFIG_RTC_0_IRQ ST_STM32_RTC_40002800_IRQ_0 #define CONFIG_RTC_0_IRQ DT_ST_STM32_RTC_40002800_IRQ_0
#define CONFIG_RTC_0_NAME ST_STM32_RTC_40002800_LABEL #define CONFIG_RTC_0_NAME DT_ST_STM32_RTC_40002800_LABEL
#define CONFIG_RTC_PRESCALER ST_STM32_RTC_40002800_PRESCALER #define CONFIG_RTC_PRESCALER DT_ST_STM32_RTC_40002800_PRESCALER
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

208
soc/arm/st_stm32/stm32l0/dts_fixup.h
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@ -1,125 +1,125 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_50000000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS DT_ST_STM32_GPIO_50000000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_50000000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 DT_ST_STM32_GPIO_50000000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_50000000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 DT_ST_STM32_GPIO_50000000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_50000000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER DT_ST_STM32_GPIO_50000000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_50000000_LABEL #define CONFIG_GPIO_STM32_GPIOA_LABEL DT_ST_STM32_GPIO_50000000_LABEL
#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_50000000_SIZE #define CONFIG_GPIO_STM32_GPIOA_SIZE DT_ST_STM32_GPIO_50000000_SIZE
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_50000000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS DT_ST_STM32_GPIO_50000000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_50000000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS DT_ST_STM32_GPIO_50000000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_50000400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS DT_ST_STM32_GPIO_50000400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_50000400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 DT_ST_STM32_GPIO_50000400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_50000400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 DT_ST_STM32_GPIO_50000400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_50000400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER DT_ST_STM32_GPIO_50000400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_50000400_LABEL #define CONFIG_GPIO_STM32_GPIOB_LABEL DT_ST_STM32_GPIO_50000400_LABEL
#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_50000400_SIZE #define CONFIG_GPIO_STM32_GPIOB_SIZE DT_ST_STM32_GPIO_50000400_SIZE
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_50000400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS DT_ST_STM32_GPIO_50000400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_50000400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS DT_ST_STM32_GPIO_50000400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_50000800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS DT_ST_STM32_GPIO_50000800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_50000800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 DT_ST_STM32_GPIO_50000800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_50000800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 DT_ST_STM32_GPIO_50000800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_50000800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER DT_ST_STM32_GPIO_50000800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_50000800_LABEL #define CONFIG_GPIO_STM32_GPIOC_LABEL DT_ST_STM32_GPIO_50000800_LABEL
#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_50000800_SIZE #define CONFIG_GPIO_STM32_GPIOC_SIZE DT_ST_STM32_GPIO_50000800_SIZE
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_50000800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS DT_ST_STM32_GPIO_50000800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_50000800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS DT_ST_STM32_GPIO_50000800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_50000C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS DT_ST_STM32_GPIO_50000C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_50000C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 DT_ST_STM32_GPIO_50000C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_50000C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 DT_ST_STM32_GPIO_50000C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_50000C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER DT_ST_STM32_GPIO_50000C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_50000C00_LABEL #define CONFIG_GPIO_STM32_GPIOD_LABEL DT_ST_STM32_GPIO_50000C00_LABEL
#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_50000C00_SIZE #define CONFIG_GPIO_STM32_GPIOD_SIZE DT_ST_STM32_GPIO_50000C00_SIZE
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_50000C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS DT_ST_STM32_GPIO_50000C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_50000C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS DT_ST_STM32_GPIO_50000C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_50001000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS DT_ST_STM32_GPIO_50001000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_50001000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 DT_ST_STM32_GPIO_50001000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_50001000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 DT_ST_STM32_GPIO_50001000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_50001000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER DT_ST_STM32_GPIO_50001000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_50001000_LABEL #define CONFIG_GPIO_STM32_GPIOE_LABEL DT_ST_STM32_GPIO_50001000_LABEL
#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_50001000_SIZE #define CONFIG_GPIO_STM32_GPIOE_SIZE DT_ST_STM32_GPIO_50001000_SIZE
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_50001000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS DT_ST_STM32_GPIO_50001000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_50001000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS DT_ST_STM32_GPIO_50001000_CLOCK_BUS
/* there is no reference to GPIOF and GPIOG in the dts files */ /* there is no reference to GPIOF and GPIOG in the dts files */
#define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS ST_STM32_GPIO_50001C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS DT_ST_STM32_GPIO_50001C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 ST_STM32_GPIO_50001C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 DT_ST_STM32_GPIO_50001C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 ST_STM32_GPIO_50001C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 DT_ST_STM32_GPIO_50001C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER ST_STM32_GPIO_50001C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER DT_ST_STM32_GPIO_50001C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOH_LABEL ST_STM32_GPIO_50001C00_LABEL #define CONFIG_GPIO_STM32_GPIOH_LABEL DT_ST_STM32_GPIO_50001C00_LABEL
#define CONFIG_GPIO_STM32_GPIOH_SIZE ST_STM32_GPIO_50001C00_SIZE #define CONFIG_GPIO_STM32_GPIOH_SIZE DT_ST_STM32_GPIO_50001C00_SIZE
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS ST_STM32_GPIO_50001C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS DT_ST_STM32_GPIO_50001C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS ST_STM32_GPIO_50001C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS DT_ST_STM32_GPIO_50001C00_CLOCK_BUS
#define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS DT_ST_STM32_USART_40013800_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_BAUD_RATE DT_ST_STM32_USART_40013800_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_1_IRQ_PRI DT_ST_STM32_USART_40013800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_1_NAME ST_STM32_USART_40013800_LABEL #define CONFIG_UART_STM32_USART_1_NAME DT_ST_STM32_USART_40013800_LABEL
#define USART_1_IRQ ST_STM32_USART_40013800_IRQ_0 #define USART_1_IRQ DT_ST_STM32_USART_40013800_IRQ_0
#define CONFIG_UART_STM32_USART_1_CLOCK_BITS ST_STM32_USART_40013800_CLOCK_BITS #define CONFIG_UART_STM32_USART_1_CLOCK_BITS DT_ST_STM32_USART_40013800_CLOCK_BITS
#define CONFIG_UART_STM32_USART_1_CLOCK_BUS ST_STM32_USART_40013800_CLOCK_BUS #define CONFIG_UART_STM32_USART_1_CLOCK_BUS DT_ST_STM32_USART_40013800_CLOCK_BUS
#define CONFIG_UART_STM32_USART_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS #define CONFIG_UART_STM32_USART_2_BASE_ADDRESS DT_ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED #define CONFIG_UART_STM32_USART_2_BAUD_RATE DT_ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_2_IRQ_PRI DT_ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_2_NAME ST_STM32_USART_40004400_LABEL #define CONFIG_UART_STM32_USART_2_NAME DT_ST_STM32_USART_40004400_LABEL
#define USART_2_IRQ ST_STM32_USART_40004400_IRQ_0 #define USART_2_IRQ DT_ST_STM32_USART_40004400_IRQ_0
#define CONFIG_UART_STM32_USART_2_CLOCK_BITS ST_STM32_USART_40004400_CLOCK_BITS #define CONFIG_UART_STM32_USART_2_CLOCK_BITS DT_ST_STM32_USART_40004400_CLOCK_BITS
#define CONFIG_UART_STM32_USART_2_CLOCK_BUS ST_STM32_USART_40004400_CLOCK_BUS #define CONFIG_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
#define CONFIG_UART_STM32_LPUART_1_BASE_ADDRESS ST_STM32_LPUART_40004800_BASE_ADDRESS #define CONFIG_UART_STM32_LPUART_1_BASE_ADDRESS DT_ST_STM32_LPUART_40004800_BASE_ADDRESS
#define CONFIG_UART_STM32_LPUART_1_BAUD_RATE ST_STM32_LPUART_40004800_CURRENT_SPEED #define CONFIG_UART_STM32_LPUART_1_BAUD_RATE DT_ST_STM32_LPUART_40004800_CURRENT_SPEED
#define CONFIG_UART_STM32_LPUART_1_IRQ_PRI ST_STM32_LPUART_40004800_IRQ_0_PRIORITY #define CONFIG_UART_STM32_LPUART_1_IRQ_PRI DT_ST_STM32_LPUART_40004800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_LPUART_1_NAME ST_STM32_LPUART_40004800_LABEL #define CONFIG_UART_STM32_LPUART_1_NAME DT_ST_STM32_LPUART_40004800_LABEL
#define LPUART_1_IRQ ST_STM32_LPUART_40004800_IRQ_0 #define LPUART_1_IRQ DT_ST_STM32_LPUART_40004800_IRQ_0
#define CONFIG_UART_STM32_LPUART_1_CLOCK_BITS ST_STM32_LPUART_40004800_CLOCK_BITS #define CONFIG_UART_STM32_LPUART_1_CLOCK_BITS DT_ST_STM32_LPUART_40004800_CLOCK_BITS
#define CONFIG_UART_STM32_LPUART_1_CLOCK_BUS ST_STM32_LPUART_40004800_CLOCK_BUS #define CONFIG_UART_STM32_LPUART_1_CLOCK_BUS DT_ST_STM32_LPUART_40004800_CLOCK_BUS
#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
#define CONFIG_I2C_1_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY #define CONFIG_I2C_1_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL #define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
#define CONFIG_I2C_1_COMBINED_IRQ ST_STM32_I2C_V2_40005400_IRQ_COMBINED #define CONFIG_I2C_1_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V2_40005400_CLOCK_BITS #define CONFIG_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V2_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V2_40005400_CLOCK_BUS #define CONFIG_I2C_1_CLOCK_BUS DT_ST_STM32_I2C_V2_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS #define CONFIG_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY #define CONFIG_I2C_2_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL #define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
#define CONFIG_I2C_2_COMBINED_IRQ ST_STM32_I2C_V2_40005800_IRQ_COMBINED #define CONFIG_I2C_2_COMBINED_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_COMBINED
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY #define CONFIG_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V2_40005800_CLOCK_BITS #define CONFIG_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V2_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V2_40005800_CLOCK_BUS #define CONFIG_I2C_2_CLOCK_BUS DT_ST_STM32_I2C_V2_40005800_CLOCK_BUS
#define CONFIG_I2C_3_BASE_ADDRESS ST_STM32_I2C_V2_40007800_BASE_ADDRESS #define CONFIG_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40007800_BASE_ADDRESS
#define CONFIG_I2C_3_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40007800_IRQ_COMBINED_PRIORITY #define CONFIG_I2C_3_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40007800_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_3_NAME ST_STM32_I2C_V2_40007800_LABEL #define CONFIG_I2C_3_NAME DT_ST_STM32_I2C_V2_40007800_LABEL
#define CONFIG_I2C_3_COMBINED_IRQ ST_STM32_I2C_V2_40007800_IRQ_COMBINED #define CONFIG_I2C_3_COMBINED_IRQ DT_ST_STM32_I2C_V2_40007800_IRQ_COMBINED
#define CONFIG_I2C_3_BITRATE ST_STM32_I2C_V2_40007800_CLOCK_FREQUENCY #define CONFIG_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40007800_CLOCK_FREQUENCY
#define CONFIG_I2C_3_CLOCK_BITS ST_STM32_I2C_V2_40007800_CLOCK_BITS #define CONFIG_I2C_3_CLOCK_BITS DT_ST_STM32_I2C_V2_40007800_CLOCK_BITS
#define CONFIG_I2C_3_CLOCK_BUS ST_STM32_I2C_V2_40007800_CLOCK_BUS #define CONFIG_I2C_3_CLOCK_BUS DT_ST_STM32_I2C_V2_40007800_CLOCK_BUS
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_40013000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_ST_STM32_SPI_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_40013000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_ST_STM32_SPI_40013000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_NAME ST_STM32_SPI_40013000_LABEL #define CONFIG_SPI_1_NAME DT_ST_STM32_SPI_40013000_LABEL
#define CONFIG_SPI_1_IRQ ST_STM32_SPI_40013000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_ST_STM32_SPI_40013000_IRQ_0
#define CONFIG_SPI_2_BASE_ADDRESS ST_STM32_SPI_40003800_BASE_ADDRESS #define CONFIG_SPI_2_BASE_ADDRESS DT_ST_STM32_SPI_40003800_BASE_ADDRESS
#define CONFIG_SPI_2_IRQ_PRI ST_STM32_SPI_40003800_IRQ_0_PRIORITY #define CONFIG_SPI_2_IRQ_PRI DT_ST_STM32_SPI_40003800_IRQ_0_PRIORITY
#define CONFIG_SPI_2_NAME ST_STM32_SPI_40003800_LABEL #define CONFIG_SPI_2_NAME DT_ST_STM32_SPI_40003800_LABEL
#define CONFIG_SPI_2_IRQ ST_STM32_SPI_40003800_IRQ_0 #define CONFIG_SPI_2_IRQ DT_ST_STM32_SPI_40003800_IRQ_0
#define CONFIG_USB_BASE_ADDRESS ST_STM32_USB_40005C00_BASE_ADDRESS #define CONFIG_USB_BASE_ADDRESS DT_ST_STM32_USB_40005C00_BASE_ADDRESS
#define CONFIG_USB_IRQ ST_STM32_USB_40005C00_IRQ_USB #define CONFIG_USB_IRQ DT_ST_STM32_USB_40005C00_IRQ_USB
#define CONFIG_USB_IRQ_PRI ST_STM32_USB_40005C00_IRQ_USB_PRIORITY #define CONFIG_USB_IRQ_PRI DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS #define CONFIG_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
#define CONFIG_USB_RAM_SIZE ST_STM32_USB_40005C00_RAM_SIZE #define CONFIG_USB_RAM_SIZE DT_ST_STM32_USB_40005C00_RAM_SIZE
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

436
soc/arm/st_stm32/stm32l4/dts_fixup.h
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@ -1,262 +1,262 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_48000000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS DT_ST_STM32_GPIO_48000000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_48000000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 DT_ST_STM32_GPIO_48000000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_48000000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 DT_ST_STM32_GPIO_48000000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_48000000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48000000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_48000000_LABEL #define CONFIG_GPIO_STM32_GPIOA_LABEL DT_ST_STM32_GPIO_48000000_LABEL
#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_48000000_SIZE #define CONFIG_GPIO_STM32_GPIOA_SIZE DT_ST_STM32_GPIO_48000000_SIZE
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_48000000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS DT_ST_STM32_GPIO_48000000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_48000000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS DT_ST_STM32_GPIO_48000000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_48000400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS DT_ST_STM32_GPIO_48000400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_48000400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 DT_ST_STM32_GPIO_48000400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_48000400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 DT_ST_STM32_GPIO_48000400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_48000400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48000400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_48000400_LABEL #define CONFIG_GPIO_STM32_GPIOB_LABEL DT_ST_STM32_GPIO_48000400_LABEL
#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_48000400_SIZE #define CONFIG_GPIO_STM32_GPIOB_SIZE DT_ST_STM32_GPIO_48000400_SIZE
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_48000400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS DT_ST_STM32_GPIO_48000400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_48000400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS DT_ST_STM32_GPIO_48000400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_48000800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS DT_ST_STM32_GPIO_48000800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_48000800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 DT_ST_STM32_GPIO_48000800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_48000800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 DT_ST_STM32_GPIO_48000800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_48000800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48000800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_48000800_LABEL #define CONFIG_GPIO_STM32_GPIOC_LABEL DT_ST_STM32_GPIO_48000800_LABEL
#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_48000800_SIZE #define CONFIG_GPIO_STM32_GPIOC_SIZE DT_ST_STM32_GPIO_48000800_SIZE
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_48000800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS DT_ST_STM32_GPIO_48000800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_48000800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS DT_ST_STM32_GPIO_48000800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_48000C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS DT_ST_STM32_GPIO_48000C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_48000C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 DT_ST_STM32_GPIO_48000C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_48000C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 DT_ST_STM32_GPIO_48000C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_48000C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48000C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_48000C00_LABEL #define CONFIG_GPIO_STM32_GPIOD_LABEL DT_ST_STM32_GPIO_48000C00_LABEL
#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_48000C00_SIZE #define CONFIG_GPIO_STM32_GPIOD_SIZE DT_ST_STM32_GPIO_48000C00_SIZE
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_48000C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS DT_ST_STM32_GPIO_48000C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_48000C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS DT_ST_STM32_GPIO_48000C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_48001000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS DT_ST_STM32_GPIO_48001000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_48001000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 DT_ST_STM32_GPIO_48001000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_48001000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 DT_ST_STM32_GPIO_48001000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_48001000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48001000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_48001000_LABEL #define CONFIG_GPIO_STM32_GPIOE_LABEL DT_ST_STM32_GPIO_48001000_LABEL
#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_48001000_SIZE #define CONFIG_GPIO_STM32_GPIOE_SIZE DT_ST_STM32_GPIO_48001000_SIZE
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_48001000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS DT_ST_STM32_GPIO_48001000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_48001000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS DT_ST_STM32_GPIO_48001000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_48001400_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS DT_ST_STM32_GPIO_48001400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_48001400_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 DT_ST_STM32_GPIO_48001400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_48001400_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 DT_ST_STM32_GPIO_48001400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_48001400_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48001400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_48001400_LABEL #define CONFIG_GPIO_STM32_GPIOF_LABEL DT_ST_STM32_GPIO_48001400_LABEL
#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_48001400_SIZE #define CONFIG_GPIO_STM32_GPIOF_SIZE DT_ST_STM32_GPIO_48001400_SIZE
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_48001400_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS DT_ST_STM32_GPIO_48001400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_48001400_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS DT_ST_STM32_GPIO_48001400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS ST_STM32_GPIO_48001800_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS DT_ST_STM32_GPIO_48001800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 ST_STM32_GPIO_48001800_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 DT_ST_STM32_GPIO_48001800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 ST_STM32_GPIO_48001800_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 DT_ST_STM32_GPIO_48001800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER ST_STM32_GPIO_48001800_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48001800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOG_LABEL ST_STM32_GPIO_48001800_LABEL #define CONFIG_GPIO_STM32_GPIOG_LABEL DT_ST_STM32_GPIO_48001800_LABEL
#define CONFIG_GPIO_STM32_GPIOG_SIZE ST_STM32_GPIO_48001800_SIZE #define CONFIG_GPIO_STM32_GPIOG_SIZE DT_ST_STM32_GPIO_48001800_SIZE
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS ST_STM32_GPIO_48001800_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS DT_ST_STM32_GPIO_48001800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS ST_STM32_GPIO_48001800_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS DT_ST_STM32_GPIO_48001800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS ST_STM32_GPIO_48001C00_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS DT_ST_STM32_GPIO_48001C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 ST_STM32_GPIO_48001C00_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 DT_ST_STM32_GPIO_48001C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 ST_STM32_GPIO_48001C00_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 DT_ST_STM32_GPIO_48001C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER ST_STM32_GPIO_48001C00_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48001C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOH_LABEL ST_STM32_GPIO_48001C00_LABEL #define CONFIG_GPIO_STM32_GPIOH_LABEL DT_ST_STM32_GPIO_48001C00_LABEL
#define CONFIG_GPIO_STM32_GPIOH_SIZE ST_STM32_GPIO_48001C00_SIZE #define CONFIG_GPIO_STM32_GPIOH_SIZE DT_ST_STM32_GPIO_48001C00_SIZE
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS ST_STM32_GPIO_48001C00_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS DT_ST_STM32_GPIO_48001C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS ST_STM32_GPIO_48001C00_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS DT_ST_STM32_GPIO_48001C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOI_BASE_ADDRESS ST_STM32_GPIO_48002000_BASE_ADDRESS #define CONFIG_GPIO_STM32_GPIOI_BASE_ADDRESS DT_ST_STM32_GPIO_48002000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS_0 ST_STM32_GPIO_48002000_CLOCK_BITS_0 #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS_0 DT_ST_STM32_GPIO_48002000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS_0 ST_STM32_GPIO_48002000_CLOCK_BUS_0 #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS_0 DT_ST_STM32_GPIO_48002000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_CONTROLLER ST_STM32_GPIO_48002000_CLOCK_CONTROLLER #define CONFIG_GPIO_STM32_GPIOI_CLOCK_CONTROLLER DT_ST_STM32_GPIO_48002000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOI_LABEL ST_STM32_GPIO_48002000_LABEL #define CONFIG_GPIO_STM32_GPIOI_LABEL DT_ST_STM32_GPIO_48002000_LABEL
#define CONFIG_GPIO_STM32_GPIOI_SIZE ST_STM32_GPIO_48002000_SIZE #define CONFIG_GPIO_STM32_GPIOI_SIZE DT_ST_STM32_GPIO_48002000_SIZE
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS ST_STM32_GPIO_48002000_CLOCK_BITS #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS DT_ST_STM32_GPIO_48002000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS ST_STM32_GPIO_48002000_CLOCK_BUS #define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS DT_ST_STM32_GPIO_48002000_CLOCK_BUS
#define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS DT_ST_STM32_USART_40013800_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_BAUD_RATE DT_ST_STM32_USART_40013800_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_1_IRQ_PRI DT_ST_STM32_USART_40013800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_1_NAME ST_STM32_USART_40013800_LABEL #define CONFIG_UART_STM32_USART_1_NAME DT_ST_STM32_USART_40013800_LABEL
#define USART_1_IRQ ST_STM32_USART_40013800_IRQ_0 #define USART_1_IRQ DT_ST_STM32_USART_40013800_IRQ_0
#define CONFIG_UART_STM32_USART_1_CLOCK_BITS ST_STM32_USART_40013800_CLOCK_BITS #define CONFIG_UART_STM32_USART_1_CLOCK_BITS DT_ST_STM32_USART_40013800_CLOCK_BITS
#define CONFIG_UART_STM32_USART_1_CLOCK_BUS ST_STM32_USART_40013800_CLOCK_BUS #define CONFIG_UART_STM32_USART_1_CLOCK_BUS DT_ST_STM32_USART_40013800_CLOCK_BUS
#define CONFIG_UART_STM32_USART_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS #define CONFIG_UART_STM32_USART_2_BASE_ADDRESS DT_ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED #define CONFIG_UART_STM32_USART_2_BAUD_RATE DT_ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_2_IRQ_PRI DT_ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_2_NAME ST_STM32_USART_40004400_LABEL #define CONFIG_UART_STM32_USART_2_NAME DT_ST_STM32_USART_40004400_LABEL
#define USART_2_IRQ ST_STM32_USART_40004400_IRQ_0 #define USART_2_IRQ DT_ST_STM32_USART_40004400_IRQ_0
#define CONFIG_UART_STM32_USART_2_CLOCK_BITS ST_STM32_USART_40004400_CLOCK_BITS #define CONFIG_UART_STM32_USART_2_CLOCK_BITS DT_ST_STM32_USART_40004400_CLOCK_BITS
#define CONFIG_UART_STM32_USART_2_CLOCK_BUS ST_STM32_USART_40004400_CLOCK_BUS #define CONFIG_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
#define CONFIG_UART_STM32_USART_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_3_BASE_ADDRESS DT_ST_STM32_USART_40004800_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_3_BAUD_RATE ST_STM32_USART_40004800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_3_BAUD_RATE DT_ST_STM32_USART_40004800_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_3_IRQ_PRI ST_STM32_USART_40004800_IRQ_0_PRIORITY #define CONFIG_UART_STM32_USART_3_IRQ_PRI DT_ST_STM32_USART_40004800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_USART_3_NAME ST_STM32_USART_40004800_LABEL #define CONFIG_UART_STM32_USART_3_NAME DT_ST_STM32_USART_40004800_LABEL
#define USART_3_IRQ ST_STM32_USART_40004800_IRQ_0 #define USART_3_IRQ DT_ST_STM32_USART_40004800_IRQ_0
#define CONFIG_UART_STM32_USART_3_CLOCK_BITS ST_STM32_USART_40004800_CLOCK_BITS #define CONFIG_UART_STM32_USART_3_CLOCK_BITS DT_ST_STM32_USART_40004800_CLOCK_BITS
#define CONFIG_UART_STM32_USART_3_CLOCK_BUS ST_STM32_USART_40004800_CLOCK_BUS #define CONFIG_UART_STM32_USART_3_CLOCK_BUS DT_ST_STM32_USART_40004800_CLOCK_BUS
#define CONFIG_UART_STM32_UART_4_BASE_ADDRESS ST_STM32_UART_40004C00_BASE_ADDRESS #define CONFIG_UART_STM32_UART_4_BASE_ADDRESS DT_ST_STM32_UART_40004C00_BASE_ADDRESS
#define CONFIG_UART_STM32_UART_4_BAUD_RATE ST_STM32_UART_40004C00_CURRENT_SPEED #define CONFIG_UART_STM32_UART_4_BAUD_RATE DT_ST_STM32_UART_40004C00_CURRENT_SPEED
#define CONFIG_UART_STM32_UART_4_IRQ_PRI ST_STM32_UART_40004C00_IRQ_0_PRIORITY #define CONFIG_UART_STM32_UART_4_IRQ_PRI DT_ST_STM32_UART_40004C00_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_UART_4_NAME ST_STM32_UART_40004C00_LABEL #define CONFIG_UART_STM32_UART_4_NAME DT_ST_STM32_UART_40004C00_LABEL
#define UART_4_IRQ ST_STM32_UART_40004C00_IRQ_0 #define UART_4_IRQ DT_ST_STM32_UART_40004C00_IRQ_0
#define CONFIG_UART_STM32_UART_4_CLOCK_BITS ST_STM32_UART_40004C00_CLOCK_BITS #define CONFIG_UART_STM32_UART_4_CLOCK_BITS DT_ST_STM32_UART_40004C00_CLOCK_BITS
#define CONFIG_UART_STM32_UART_4_CLOCK_BUS ST_STM32_UART_40004C00_CLOCK_BUS #define CONFIG_UART_STM32_UART_4_CLOCK_BUS DT_ST_STM32_UART_40004C00_CLOCK_BUS
#define CONFIG_UART_STM32_UART_5_BASE_ADDRESS ST_STM32_UART_40005000_BASE_ADDRESS #define CONFIG_UART_STM32_UART_5_BASE_ADDRESS DT_ST_STM32_UART_40005000_BASE_ADDRESS
#define CONFIG_UART_STM32_UART_5_BAUD_RATE ST_STM32_UART_40005000_CURRENT_SPEED #define CONFIG_UART_STM32_UART_5_BAUD_RATE DT_ST_STM32_UART_40005000_CURRENT_SPEED
#define CONFIG_UART_STM32_UART_5_IRQ_PRI ST_STM32_UART_40005000_IRQ_0_PRIORITY #define CONFIG_UART_STM32_UART_5_IRQ_PRI DT_ST_STM32_UART_40005000_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_UART_5_NAME ST_STM32_UART_40005000_LABEL #define CONFIG_UART_STM32_UART_5_NAME DT_ST_STM32_UART_40005000_LABEL
#define UART_5_IRQ ST_STM32_UART_40005000_IRQ_0 #define UART_5_IRQ DT_ST_STM32_UART_40005000_IRQ_0
#define CONFIG_UART_STM32_UART_5_CLOCK_BITS ST_STM32_UART_40005000_CLOCK_BITS #define CONFIG_UART_STM32_UART_5_CLOCK_BITS DT_ST_STM32_UART_40005000_CLOCK_BITS
#define CONFIG_UART_STM32_UART_5_CLOCK_BUS ST_STM32_UART_40005000_CLOCK_BUS #define CONFIG_UART_STM32_UART_5_CLOCK_BUS DT_ST_STM32_UART_40005000_CLOCK_BUS
#define CONFIG_UART_STM32_LPUART_1_BASE_ADDRESS ST_STM32_LPUART_40008000_BASE_ADDRESS #define CONFIG_UART_STM32_LPUART_1_BASE_ADDRESS DT_ST_STM32_LPUART_40008000_BASE_ADDRESS
#define CONFIG_UART_STM32_LPUART_1_BAUD_RATE ST_STM32_LPUART_40008000_CURRENT_SPEED #define CONFIG_UART_STM32_LPUART_1_BAUD_RATE DT_ST_STM32_LPUART_40008000_CURRENT_SPEED
#define CONFIG_UART_STM32_LPUART_1_IRQ_PRI ST_STM32_LPUART_40008000_IRQ_0_PRIORITY #define CONFIG_UART_STM32_LPUART_1_IRQ_PRI DT_ST_STM32_LPUART_40008000_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_LPUART_1_NAME ST_STM32_LPUART_40008000_LABEL #define CONFIG_UART_STM32_LPUART_1_NAME DT_ST_STM32_LPUART_40008000_LABEL
#define LPUART_1_IRQ ST_STM32_LPUART_40008000_IRQ_0 #define LPUART_1_IRQ DT_ST_STM32_LPUART_40008000_IRQ_0
#define CONFIG_UART_STM32_LPUART_1_CLOCK_BITS ST_STM32_LPUART_40008000_CLOCK_BITS #define CONFIG_UART_STM32_LPUART_1_CLOCK_BITS DT_ST_STM32_LPUART_40008000_CLOCK_BITS
#define CONFIG_UART_STM32_LPUART_1_CLOCK_BUS ST_STM32_LPUART_40008000_CLOCK_BUS #define CONFIG_UART_STM32_LPUART_1_CLOCK_BUS DT_ST_STM32_LPUART_40008000_CLOCK_BUS
#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS #define CONFIG_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
#define CONFIG_I2C_1_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY #define CONFIG_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_1_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY #define CONFIG_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL #define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V2_40005400_IRQ_EVENT #define CONFIG_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V2_40005400_IRQ_ERROR #define CONFIG_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V2_40005400_CLOCK_BITS #define CONFIG_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V2_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V2_40005400_CLOCK_BUS #define CONFIG_I2C_1_CLOCK_BUS DT_ST_STM32_I2C_V2_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS #define CONFIG_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY #define CONFIG_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_2_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY #define CONFIG_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL #define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V2_40005800_LABEL
#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V2_40005800_IRQ_EVENT #define CONFIG_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_EVENT
#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V2_40005800_IRQ_ERROR #define CONFIG_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V2_40005800_IRQ_ERROR
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY #define CONFIG_I2C_2_BITRATE DT_ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V2_40005800_CLOCK_BITS #define CONFIG_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V2_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V2_40005800_CLOCK_BUS #define CONFIG_I2C_2_CLOCK_BUS DT_ST_STM32_I2C_V2_40005800_CLOCK_BUS
#define CONFIG_I2C_3_BASE_ADDRESS ST_STM32_I2C_V2_40005C00_BASE_ADDRESS #define CONFIG_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
#define CONFIG_I2C_3_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY #define CONFIG_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_3_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY #define CONFIG_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_3_NAME ST_STM32_I2C_V2_40005C00_LABEL #define CONFIG_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
#define CONFIG_I2C_3_EVENT_IRQ ST_STM32_I2C_V2_40005C00_IRQ_EVENT #define CONFIG_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT
#define CONFIG_I2C_3_ERROR_IRQ ST_STM32_I2C_V2_40005C00_IRQ_ERROR #define CONFIG_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR
#define CONFIG_I2C_3_BITRATE ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY #define CONFIG_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
#define CONFIG_I2C_3_CLOCK_BITS ST_STM32_I2C_V2_40005C00_CLOCK_BITS #define CONFIG_I2C_3_CLOCK_BITS DT_ST_STM32_I2C_V2_40005C00_CLOCK_BITS
#define CONFIG_I2C_3_CLOCK_BUS ST_STM32_I2C_V2_40005C00_CLOCK_BUS #define CONFIG_I2C_3_CLOCK_BUS DT_ST_STM32_I2C_V2_40005C00_CLOCK_BUS
#define CONFIG_I2C_4_BASE_ADDRESS ST_STM32_I2C_V2_40008400_BASE_ADDRESS #define CONFIG_I2C_4_BASE_ADDRESS DT_ST_STM32_I2C_V2_40008400_BASE_ADDRESS
#define CONFIG_I2C_4_EVENT_IRQ_PRI ST_STM32_I2C_V2_40008400_IRQ_EVENT_PRIORITY #define CONFIG_I2C_4_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40008400_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_4_ERROR_IRQ_PRI ST_STM32_I2C_V2_40008400_IRQ_ERROR_PRIORITY #define CONFIG_I2C_4_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40008400_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_4_NAME ST_STM32_I2C_V2_40008400_LABEL #define CONFIG_I2C_4_NAME DT_ST_STM32_I2C_V2_40008400_LABEL
#define CONFIG_I2C_4_EVENT_IRQ ST_STM32_I2C_V2_40008400_IRQ_EVENT #define CONFIG_I2C_4_EVENT_IRQ DT_ST_STM32_I2C_V2_40008400_IRQ_EVENT
#define CONFIG_I2C_4_ERROR_IRQ ST_STM32_I2C_V2_40008400_IRQ_ERROR #define CONFIG_I2C_4_ERROR_IRQ DT_ST_STM32_I2C_V2_40008400_IRQ_ERROR
#define CONFIG_I2C_4_BITRATE ST_STM32_I2C_V2_40008400_CLOCK_FREQUENCY #define CONFIG_I2C_4_BITRATE DT_ST_STM32_I2C_V2_40008400_CLOCK_FREQUENCY
#define CONFIG_I2C_4_CLOCK_BITS ST_STM32_I2C_V2_40008400_CLOCK_BITS #define CONFIG_I2C_4_CLOCK_BITS DT_ST_STM32_I2C_V2_40008400_CLOCK_BITS
#define CONFIG_I2C_4_CLOCK_BUS ST_STM32_I2C_V2_40008400_CLOCK_BUS #define CONFIG_I2C_4_CLOCK_BUS DT_ST_STM32_I2C_V2_40008400_CLOCK_BUS
#define CONFIG_RTC_0_BASE_ADDRESS ST_STM32_RTC_40002800_BASE_ADDRESS #define CONFIG_RTC_0_BASE_ADDRESS DT_ST_STM32_RTC_40002800_BASE_ADDRESS
#define CONFIG_RTC_0_IRQ_PRI ST_STM32_RTC_40002800_IRQ_0_PRIORITY #define CONFIG_RTC_0_IRQ_PRI DT_ST_STM32_RTC_40002800_IRQ_0_PRIORITY
#define CONFIG_RTC_0_IRQ ST_STM32_RTC_40002800_IRQ_0 #define CONFIG_RTC_0_IRQ DT_ST_STM32_RTC_40002800_IRQ_0
#define CONFIG_RTC_0_NAME ST_STM32_RTC_40002800_LABEL #define CONFIG_RTC_0_NAME DT_ST_STM32_RTC_40002800_LABEL
#define CONFIG_RTC_PRESCALER ST_STM32_RTC_40002800_PRESCALER #define CONFIG_RTC_PRESCALER DT_ST_STM32_RTC_40002800_PRESCALER
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_NAME ST_STM32_SPI_FIFO_40013000_LABEL #define CONFIG_SPI_1_NAME DT_ST_STM32_SPI_FIFO_40013000_LABEL
#define CONFIG_SPI_1_IRQ ST_STM32_SPI_FIFO_40013000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_ST_STM32_SPI_FIFO_40013000_IRQ_0
#define CONFIG_SPI_2_BASE_ADDRESS ST_STM32_SPI_FIFO_40003800_BASE_ADDRESS #define CONFIG_SPI_2_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40003800_BASE_ADDRESS
#define CONFIG_SPI_2_IRQ_PRI ST_STM32_SPI_FIFO_40003800_IRQ_0_PRIORITY #define CONFIG_SPI_2_IRQ_PRI DT_ST_STM32_SPI_FIFO_40003800_IRQ_0_PRIORITY
#define CONFIG_SPI_2_NAME ST_STM32_SPI_FIFO_40003800_LABEL #define CONFIG_SPI_2_NAME DT_ST_STM32_SPI_FIFO_40003800_LABEL
#define CONFIG_SPI_2_IRQ ST_STM32_SPI_FIFO_40003800_IRQ_0 #define CONFIG_SPI_2_IRQ DT_ST_STM32_SPI_FIFO_40003800_IRQ_0
#define CONFIG_SPI_3_BASE_ADDRESS ST_STM32_SPI_FIFO_40003C00_BASE_ADDRESS #define CONFIG_SPI_3_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40003C00_BASE_ADDRESS
#define CONFIG_SPI_3_IRQ_PRI ST_STM32_SPI_FIFO_40003C00_IRQ_0_PRIORITY #define CONFIG_SPI_3_IRQ_PRI DT_ST_STM32_SPI_FIFO_40003C00_IRQ_0_PRIORITY
#define CONFIG_SPI_3_NAME ST_STM32_SPI_FIFO_40003C00_LABEL #define CONFIG_SPI_3_NAME DT_ST_STM32_SPI_FIFO_40003C00_LABEL
#define CONFIG_SPI_3_IRQ ST_STM32_SPI_FIFO_40003C00_IRQ_0 #define CONFIG_SPI_3_IRQ DT_ST_STM32_SPI_FIFO_40003C00_IRQ_0
#define FLASH_DEV_BASE_ADDRESS ST_STM32L4_FLASH_CONTROLLER_40022000_BASE_ADDRESS #define FLASH_DEV_BASE_ADDRESS DT_ST_STM32L4_FLASH_CONTROLLER_40022000_BASE_ADDRESS
#define FLASH_DEV_NAME ST_STM32L4_FLASH_CONTROLLER_40022000_LABEL #define FLASH_DEV_NAME DT_ST_STM32L4_FLASH_CONTROLLER_40022000_LABEL
#if defined(ST_STM32_USB_40006800_BASE_ADDRESS) #if defined(DT_ST_STM32_USB_40006800_BASE_ADDRESS)
#define CONFIG_USB_BASE_ADDRESS ST_STM32_USB_40006800_BASE_ADDRESS #define CONFIG_USB_BASE_ADDRESS DT_ST_STM32_USB_40006800_BASE_ADDRESS
#define CONFIG_USB_IRQ ST_STM32_USB_40006800_IRQ_USB #define CONFIG_USB_IRQ DT_ST_STM32_USB_40006800_IRQ_USB
#define CONFIG_USB_IRQ_PRI ST_STM32_USB_40006800_IRQ_USB_PRIORITY #define CONFIG_USB_IRQ_PRI DT_ST_STM32_USB_40006800_IRQ_USB_PRIORITY
#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_USB_40006800_NUM_BIDIR_ENDPOINTS #define CONFIG_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40006800_NUM_BIDIR_ENDPOINTS
#define CONFIG_USB_RAM_SIZE ST_STM32_USB_40006800_RAM_SIZE #define CONFIG_USB_RAM_SIZE DT_ST_STM32_USB_40006800_RAM_SIZE
#endif #endif
#if defined(ST_STM32_OTGFS_50000000_BASE_ADDRESS) #if defined(DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS)
#define CONFIG_USB_BASE_ADDRESS ST_STM32_OTGFS_50000000_BASE_ADDRESS #define CONFIG_USB_BASE_ADDRESS DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS
#define CONFIG_USB_IRQ ST_STM32_OTGFS_50000000_IRQ_OTGFS #define CONFIG_USB_IRQ DT_ST_STM32_OTGFS_50000000_IRQ_OTGFS
#define CONFIG_USB_IRQ_PRI ST_STM32_OTGFS_50000000_IRQ_OTGFS_PRIORITY #define CONFIG_USB_IRQ_PRI DT_ST_STM32_OTGFS_50000000_IRQ_OTGFS_PRIORITY
#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS #define CONFIG_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
#define CONFIG_USB_RAM_SIZE ST_STM32_OTGFS_50000000_RAM_SIZE #define CONFIG_USB_RAM_SIZE DT_ST_STM32_OTGFS_50000000_RAM_SIZE
#define CONFIG_USB_MAXIMUM_SPEED ST_STM32_OTGFS_50000000_MAXIMUM_SPEED #define CONFIG_USB_MAXIMUM_SPEED DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
#endif #endif
#define CONFIG_PWM_STM32_1_DEV_NAME ST_STM32_PWM_40012C00_PWM_LABEL #define CONFIG_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40012C00_PWM_LABEL
#define CONFIG_PWM_STM32_1_PRESCALER ST_STM32_PWM_40012C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_1_PRESCALER DT_ST_STM32_PWM_40012C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_2_DEV_NAME ST_STM32_PWM_40000000_PWM_LABEL #define CONFIG_PWM_STM32_2_DEV_NAME DT_ST_STM32_PWM_40000000_PWM_LABEL
#define CONFIG_PWM_STM32_2_PRESCALER ST_STM32_PWM_40000000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_2_PRESCALER DT_ST_STM32_PWM_40000000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_3_DEV_NAME ST_STM32_PWM_40000400_PWM_LABEL #define CONFIG_PWM_STM32_3_DEV_NAME DT_ST_STM32_PWM_40000400_PWM_LABEL
#define CONFIG_PWM_STM32_3_PRESCALER ST_STM32_PWM_40000400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_3_PRESCALER DT_ST_STM32_PWM_40000400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_4_DEV_NAME ST_STM32_PWM_40000800_PWM_LABEL #define CONFIG_PWM_STM32_4_DEV_NAME DT_ST_STM32_PWM_40000800_PWM_LABEL
#define CONFIG_PWM_STM32_4_PRESCALER ST_STM32_PWM_40000800_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_4_PRESCALER DT_ST_STM32_PWM_40000800_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_5_DEV_NAME ST_STM32_PWM_40000C00_PWM_LABEL #define CONFIG_PWM_STM32_5_DEV_NAME DT_ST_STM32_PWM_40000C00_PWM_LABEL
#define CONFIG_PWM_STM32_5_PRESCALER ST_STM32_PWM_40000C00_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_5_PRESCALER DT_ST_STM32_PWM_40000C00_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_6_DEV_NAME ST_STM32_PWM_40001000_PWM_LABEL #define CONFIG_PWM_STM32_6_DEV_NAME DT_ST_STM32_PWM_40001000_PWM_LABEL
#define CONFIG_PWM_STM32_6_PRESCALER ST_STM32_PWM_40001000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_6_PRESCALER DT_ST_STM32_PWM_40001000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_7_DEV_NAME ST_STM32_PWM_40001400_PWM_LABEL #define CONFIG_PWM_STM32_7_DEV_NAME DT_ST_STM32_PWM_40001400_PWM_LABEL
#define CONFIG_PWM_STM32_7_PRESCALER ST_STM32_PWM_40001400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_7_PRESCALER DT_ST_STM32_PWM_40001400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_8_DEV_NAME ST_STM32_PWM_40013400_PWM_LABEL #define CONFIG_PWM_STM32_8_DEV_NAME DT_ST_STM32_PWM_40013400_PWM_LABEL
#define CONFIG_PWM_STM32_8_PRESCALER ST_STM32_PWM_40013400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_8_PRESCALER DT_ST_STM32_PWM_40013400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_15_DEV_NAME ST_STM32_PWM_40014000_PWM_LABEL #define CONFIG_PWM_STM32_15_DEV_NAME DT_ST_STM32_PWM_40014000_PWM_LABEL
#define CONFIG_PWM_STM32_15_PRESCALER ST_STM32_PWM_40014000_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_15_PRESCALER DT_ST_STM32_PWM_40014000_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_16_DEV_NAME ST_STM32_PWM_40014400_PWM_LABEL #define CONFIG_PWM_STM32_16_DEV_NAME DT_ST_STM32_PWM_40014400_PWM_LABEL
#define CONFIG_PWM_STM32_16_PRESCALER ST_STM32_PWM_40014400_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_16_PRESCALER DT_ST_STM32_PWM_40014400_PWM_ST_PRESCALER
#define CONFIG_PWM_STM32_17_DEV_NAME ST_STM32_PWM_40014800_PWM_LABEL #define CONFIG_PWM_STM32_17_DEV_NAME DT_ST_STM32_PWM_40014800_PWM_LABEL
#define CONFIG_PWM_STM32_17_PRESCALER ST_STM32_PWM_40014800_PWM_ST_PRESCALER #define CONFIG_PWM_STM32_17_PRESCALER DT_ST_STM32_PWM_40014800_PWM_ST_PRESCALER
#define CONFIG_CAN_1_BASE_ADDRESS ST_STM32_CAN_40006400_BASE_ADDRESS #define CONFIG_CAN_1_BASE_ADDRESS DT_ST_STM32_CAN_40006400_BASE_ADDRESS
#define CONFIG_CAN_1_BUS_SPEED ST_STM32_CAN_40006400_BUS_SPEED #define CONFIG_CAN_1_BUS_SPEED DT_ST_STM32_CAN_40006400_BUS_SPEED
#define CONFIG_CAN_1_NAME ST_STM32_CAN_40006400_LABEL #define CONFIG_CAN_1_NAME DT_ST_STM32_CAN_40006400_LABEL
#define CONFIG_CAN_1_IRQ_TX ST_STM32_CAN_40006400_IRQ_TX #define CONFIG_CAN_1_IRQ_TX DT_ST_STM32_CAN_40006400_IRQ_TX
#define CONFIG_CAN_1_IRQ_RX0 ST_STM32_CAN_40006400_IRQ_RX0 #define CONFIG_CAN_1_IRQ_RX0 DT_ST_STM32_CAN_40006400_IRQ_RX0
#define CONFIG_CAN_1_IRQ_RX1 ST_STM32_CAN_40006400_IRQ_RX1 #define CONFIG_CAN_1_IRQ_RX1 DT_ST_STM32_CAN_40006400_IRQ_RX1
#define CONFIG_CAN_1_IRQ_SCE ST_STM32_CAN_40006400_IRQ_SCE #define CONFIG_CAN_1_IRQ_SCE DT_ST_STM32_CAN_40006400_IRQ_SCE
#define CONFIG_CAN_1_IRQ_PRIORITY ST_STM32_CAN_40006400_IRQ_0_PRIORITY #define CONFIG_CAN_1_IRQ_PRIORITY DT_ST_STM32_CAN_40006400_IRQ_0_PRIORITY
#define CONFIG_CAN_1_SJW ST_STM32_CAN_40006400_SJW #define CONFIG_CAN_1_SJW DT_ST_STM32_CAN_40006400_SJW
#define CONFIG_CAN_1_PROP_SEG_PHASE_SEG1 ST_STM32_CAN_40006400_PROP_SEG_PHASE_SEG1 #define CONFIG_CAN_1_PROP_SEG_PHASE_SEG1 DT_ST_STM32_CAN_40006400_PROP_SEG_PHASE_SEG1
#define CONFIG_CAN_1_PHASE_SEG2 ST_STM32_CAN_40006400_PHASE_SEG2 #define CONFIG_CAN_1_PHASE_SEG2 DT_ST_STM32_CAN_40006400_PHASE_SEG2
#define CONFIG_CAN_1_CLOCK_BUS ST_STM32_CAN_40006400_CLOCK_BUS #define CONFIG_CAN_1_CLOCK_BUS DT_ST_STM32_CAN_40006400_CLOCK_BUS
#define CONFIG_CAN_1_CLOCK_BITS ST_STM32_CAN_40006400_CLOCK_BITS #define CONFIG_CAN_1_CLOCK_BITS DT_ST_STM32_CAN_40006400_CLOCK_BITS
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

2
soc/arm/ti_lm3s6965/dts_fixup.h
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@ -1,5 +1,5 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

12
soc/arm/ti_simplelink/cc2650/dts_fixup.h
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@ -1,12 +1,12 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define TI_STELLARIS_UART_4000C000_BASE_ADDRESS TI_STELLARIS_UART_40001000_BASE_ADDRESS #define DT_TI_STELLARIS_UART_4000C000_BASE_ADDRESS DT_TI_STELLARIS_UART_40001000_BASE_ADDRESS
#define TI_STELLARIS_UART_4000C000_CURRENT_SPEED TI_STELLARIS_UART_40001000_CURRENT_SPEED #define DT_TI_STELLARIS_UART_4000C000_CURRENT_SPEED DT_TI_STELLARIS_UART_40001000_CURRENT_SPEED
#define UART_STELLARIS_CLK_FREQ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC #define UART_STELLARIS_CLK_FREQ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
#define TI_STELLARIS_UART_4000C000_IRQ_0 TI_STELLARIS_UART_40001000_IRQ_0 #define DT_TI_STELLARIS_UART_4000C000_IRQ_0 DT_TI_STELLARIS_UART_40001000_IRQ_0
#define TI_STELLARIS_UART_4000C000_IRQ_0_PRIORITY TI_STELLARIS_UART_40001000_IRQ_0_PRIORITY #define DT_TI_STELLARIS_UART_4000C000_IRQ_0_PRIORITY DT_TI_STELLARIS_UART_40001000_IRQ_0_PRIORITY
#define TI_STELLARIS_UART_4000C000_LABEL TI_STELLARIS_UART_40001000_LABEL #define DT_TI_STELLARIS_UART_4000C000_LABEL DT_TI_STELLARIS_UART_40001000_LABEL
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

46
soc/arm/ti_simplelink/cc32xx/dts_fixup.h
View file

@ -1,32 +1,32 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_CC32XX_NAME TI_CC32XX_UART_4000C000_LABEL #define CONFIG_UART_CC32XX_NAME DT_TI_CC32XX_UART_4000C000_LABEL
#define CONFIG_I2C_0_LABEL TI_CC32XX_I2C_40020000_LABEL #define CONFIG_I2C_0_LABEL DT_TI_CC32XX_I2C_40020000_LABEL
#define CONFIG_I2C_0_BASE_ADDRESS TI_CC32XX_I2C_40020000_BASE_ADDRESS #define CONFIG_I2C_0_BASE_ADDRESS DT_TI_CC32XX_I2C_40020000_BASE_ADDRESS
#define CONFIG_I2C_0_BITRATE TI_CC32XX_I2C_40020000_CLOCK_FREQUENCY #define CONFIG_I2C_0_BITRATE DT_TI_CC32XX_I2C_40020000_CLOCK_FREQUENCY
#define CONFIG_I2C_0_IRQ TI_CC32XX_I2C_40020000_IRQ_0 #define CONFIG_I2C_0_IRQ DT_TI_CC32XX_I2C_40020000_IRQ_0
#define CONFIG_I2C_0_IRQ_PRIORITY TI_CC32XX_I2C_40020000_IRQ_0_PRIORITY #define CONFIG_I2C_0_IRQ_PRIORITY DT_TI_CC32XX_I2C_40020000_IRQ_0_PRIORITY
#define CONFIG_GPIO_CC32XX_A0_BASE_ADDRESS TI_CC32XX_GPIO_40004000_BASE_ADDRESS #define CONFIG_GPIO_CC32XX_A0_BASE_ADDRESS DT_TI_CC32XX_GPIO_40004000_BASE_ADDRESS
#define CONFIG_GPIO_CC32XX_A0_IRQ TI_CC32XX_GPIO_40004000_IRQ_0 #define CONFIG_GPIO_CC32XX_A0_IRQ DT_TI_CC32XX_GPIO_40004000_IRQ_0
#define CONFIG_GPIO_CC32XX_A0_IRQ_PRI TI_CC32XX_GPIO_40004000_IRQ_0_PRIORITY #define CONFIG_GPIO_CC32XX_A0_IRQ_PRI DT_TI_CC32XX_GPIO_40004000_IRQ_0_PRIORITY
#define CONFIG_GPIO_CC32XX_A0_NAME TI_CC32XX_GPIO_40004000_LABEL #define CONFIG_GPIO_CC32XX_A0_NAME DT_TI_CC32XX_GPIO_40004000_LABEL
#define CONFIG_GPIO_CC32XX_A1_BASE_ADDRESS TI_CC32XX_GPIO_40005000_BASE_ADDRESS #define CONFIG_GPIO_CC32XX_A1_BASE_ADDRESS DT_TI_CC32XX_GPIO_40005000_BASE_ADDRESS
#define CONFIG_GPIO_CC32XX_A1_IRQ TI_CC32XX_GPIO_40005000_IRQ_0 #define CONFIG_GPIO_CC32XX_A1_IRQ DT_TI_CC32XX_GPIO_40005000_IRQ_0
#define CONFIG_GPIO_CC32XX_A1_IRQ_PRI TI_CC32XX_GPIO_40005000_IRQ_0_PRIORITY #define CONFIG_GPIO_CC32XX_A1_IRQ_PRI DT_TI_CC32XX_GPIO_40005000_IRQ_0_PRIORITY
#define CONFIG_GPIO_CC32XX_A1_NAME TI_CC32XX_GPIO_40005000_LABEL #define CONFIG_GPIO_CC32XX_A1_NAME DT_TI_CC32XX_GPIO_40005000_LABEL
#define CONFIG_GPIO_CC32XX_A2_BASE_ADDRESS TI_CC32XX_GPIO_40006000_BASE_ADDRESS #define CONFIG_GPIO_CC32XX_A2_BASE_ADDRESS DT_TI_CC32XX_GPIO_40006000_BASE_ADDRESS
#define CONFIG_GPIO_CC32XX_A2_IRQ TI_CC32XX_GPIO_40006000_IRQ_0 #define CONFIG_GPIO_CC32XX_A2_IRQ DT_TI_CC32XX_GPIO_40006000_IRQ_0
#define CONFIG_GPIO_CC32XX_A2_IRQ_PRI TI_CC32XX_GPIO_40006000_IRQ_0_PRIORITY #define CONFIG_GPIO_CC32XX_A2_IRQ_PRI DT_TI_CC32XX_GPIO_40006000_IRQ_0_PRIORITY
#define CONFIG_GPIO_CC32XX_A2_NAME TI_CC32XX_GPIO_40006000_LABEL #define CONFIG_GPIO_CC32XX_A2_NAME DT_TI_CC32XX_GPIO_40006000_LABEL
#define CONFIG_GPIO_CC32XX_A3_BASE_ADDRESS TI_CC32XX_GPIO_40007000_BASE_ADDRESS #define CONFIG_GPIO_CC32XX_A3_BASE_ADDRESS DT_TI_CC32XX_GPIO_40007000_BASE_ADDRESS
#define CONFIG_GPIO_CC32XX_A3_IRQ TI_CC32XX_GPIO_40007000_IRQ_0 #define CONFIG_GPIO_CC32XX_A3_IRQ DT_TI_CC32XX_GPIO_40007000_IRQ_0
#define CONFIG_GPIO_CC32XX_A3_IRQ_PRI TI_CC32XX_GPIO_40007000_IRQ_0_PRIORITY #define CONFIG_GPIO_CC32XX_A3_IRQ_PRI DT_TI_CC32XX_GPIO_40007000_IRQ_0_PRIORITY
#define CONFIG_GPIO_CC32XX_A3_NAME TI_CC32XX_GPIO_40007000_LABEL #define CONFIG_GPIO_CC32XX_A3_NAME DT_TI_CC32XX_GPIO_40007000_LABEL
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

8
soc/arm/ti_simplelink/msp432p4xx/dts_fixup.h
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@ -6,10 +6,10 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define CONFIG_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_MSP432P4XX_NAME TI_MSP432P4XX_UART_40001000_LABEL #define CONFIG_UART_MSP432P4XX_NAME DT_TI_MSP432P4XX_UART_40001000_LABEL
#define CONFIG_UART_MSP432P4XX_BASE_ADDRESS TI_MSP432P4XX_UART_40001000_BASE_ADDRESS #define CONFIG_UART_MSP432P4XX_BASE_ADDRESS DT_TI_MSP432P4XX_UART_40001000_BASE_ADDRESS
#define CONFIG_UART_MSP432P4XX_BAUD_RATE TI_MSP432P4XX_UART_40001000_CURRENT_SPEED #define CONFIG_UART_MSP432P4XX_BAUD_RATE DT_TI_MSP432P4XX_UART_40001000_CURRENT_SPEED
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

4
soc/nios2/nios2-qemu/dts_fixup.h
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@ -1,6 +1,6 @@
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_440000_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_440000_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_440000_LABEL #define CONFIG_UART_NS16550_PORT_0_NAME DT_NS16550_440000_LABEL
#define _RAM_ADDR CONFIG_SRAM_BASE_ADDRESS #define _RAM_ADDR CONFIG_SRAM_BASE_ADDRESS

4
soc/nios2/nios2f-zephyr/dts_fixup.h
View file

@ -1,6 +1,6 @@
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_F0008000_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_F0008000_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_F0008000_LABEL #define CONFIG_UART_NS16550_PORT_0_NAME DT_NS16550_F0008000_LABEL
#define _RAM_ADDR CONFIG_SRAM_BASE_ADDRESS #define _RAM_ADDR CONFIG_SRAM_BASE_ADDRESS

10
soc/riscv32/pulpino/dts_fixup.h
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@ -9,8 +9,8 @@
/* /*
* UART configuration * UART configuration
*/ */
#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_1A100000_BASE_ADDRESS #define CONFIG_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_1A100000_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_1A100000_IRQ_0 #define CONFIG_UART_NS16550_PORT_0_IRQ DT_NS16550_1A100000_IRQ_0
#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_1A100000_CLOCK_FREQUENCY #define CONFIG_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_1A100000_CLOCK_FREQUENCY
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_1A100000_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_1A100000_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_1A100000_LABEL #define CONFIG_UART_NS16550_PORT_0_NAME DT_NS16550_1A100000_LABEL

8
soc/riscv32/riscv-privilege/miv/dts_fixup.h
View file

@ -1,7 +1,7 @@
/* UART 0 */ /* UART 0 */
#define CONFIG_MIV_UART_0_BASE_ADDR MICROSEMI_COREUART_70001000_BASE_ADDRESS #define CONFIG_MIV_UART_0_BASE_ADDR DT_MICROSEMI_COREUART_70001000_BASE_ADDRESS
#define CONFIG_MIV_UART_0_CLOCK_FREQUENCY MICROSEMI_COREUART_70001000_CLOCK_FREQUENCY #define CONFIG_MIV_UART_0_CLOCK_FREQUENCY DT_MICROSEMI_COREUART_70001000_CLOCK_FREQUENCY
#define CONFIG_MIV_UART_0_BAUD_RATE MICROSEMI_COREUART_70001000_CURRENT_SPEED #define CONFIG_MIV_UART_0_BAUD_RATE DT_MICROSEMI_COREUART_70001000_CURRENT_SPEED
#define CONFIG_MIV_UART_0_NAME MICROSEMI_COREUART_70001000_LABEL #define CONFIG_MIV_UART_0_NAME DT_MICROSEMI_COREUART_70001000_LABEL

90
soc/riscv32/riscv-privilege/sifive-freedom/dts_fixup.h
View file

@ -5,53 +5,53 @@
*/ */
/* GPIO 0 */ /* GPIO 0 */
#define CONFIG_SIFIVE_GPIO_0_BASE_ADDR SIFIVE_GPIO0_10012000_BASE_ADDRESS #define CONFIG_SIFIVE_GPIO_0_BASE_ADDR DT_SIFIVE_GPIO0_10012000_BASE_ADDRESS
#define CONFIG_SIFIVE_GPIO_0_IRQ_0 SIFIVE_GPIO0_10012000_IRQ_0 #define CONFIG_SIFIVE_GPIO_0_IRQ_0 DT_SIFIVE_GPIO0_10012000_IRQ_0
#define CONFIG_SIFIVE_GPIO_0_IRQ_1 SIFIVE_GPIO0_10012000_IRQ_1 #define CONFIG_SIFIVE_GPIO_0_IRQ_1 DT_SIFIVE_GPIO0_10012000_IRQ_1
#define CONFIG_SIFIVE_GPIO_0_IRQ_2 SIFIVE_GPIO0_10012000_IRQ_2 #define CONFIG_SIFIVE_GPIO_0_IRQ_2 DT_SIFIVE_GPIO0_10012000_IRQ_2
#define CONFIG_SIFIVE_GPIO_0_IRQ_3 SIFIVE_GPIO0_10012000_IRQ_3 #define CONFIG_SIFIVE_GPIO_0_IRQ_3 DT_SIFIVE_GPIO0_10012000_IRQ_3
#define CONFIG_SIFIVE_GPIO_0_IRQ_4 SIFIVE_GPIO0_10012000_IRQ_4 #define CONFIG_SIFIVE_GPIO_0_IRQ_4 DT_SIFIVE_GPIO0_10012000_IRQ_4
#define CONFIG_SIFIVE_GPIO_0_IRQ_5 SIFIVE_GPIO0_10012000_IRQ_5 #define CONFIG_SIFIVE_GPIO_0_IRQ_5 DT_SIFIVE_GPIO0_10012000_IRQ_5
#define CONFIG_SIFIVE_GPIO_0_IRQ_6 SIFIVE_GPIO0_10012000_IRQ_6 #define CONFIG_SIFIVE_GPIO_0_IRQ_6 DT_SIFIVE_GPIO0_10012000_IRQ_6
#define CONFIG_SIFIVE_GPIO_0_IRQ_7 SIFIVE_GPIO0_10012000_IRQ_7 #define CONFIG_SIFIVE_GPIO_0_IRQ_7 DT_SIFIVE_GPIO0_10012000_IRQ_7
#define CONFIG_SIFIVE_GPIO_0_IRQ_8 SIFIVE_GPIO0_10012000_IRQ_8 #define CONFIG_SIFIVE_GPIO_0_IRQ_8 DT_SIFIVE_GPIO0_10012000_IRQ_8
#define CONFIG_SIFIVE_GPIO_0_IRQ_9 SIFIVE_GPIO0_10012000_IRQ_9 #define CONFIG_SIFIVE_GPIO_0_IRQ_9 DT_SIFIVE_GPIO0_10012000_IRQ_9
#define CONFIG_SIFIVE_GPIO_0_IRQ_10 SIFIVE_GPIO0_10012000_IRQ_10 #define CONFIG_SIFIVE_GPIO_0_IRQ_10 DT_SIFIVE_GPIO0_10012000_IRQ_10
#define CONFIG_SIFIVE_GPIO_0_IRQ_11 SIFIVE_GPIO0_10012000_IRQ_11 #define CONFIG_SIFIVE_GPIO_0_IRQ_11 DT_SIFIVE_GPIO0_10012000_IRQ_11
#define CONFIG_SIFIVE_GPIO_0_IRQ_12 SIFIVE_GPIO0_10012000_IRQ_12 #define CONFIG_SIFIVE_GPIO_0_IRQ_12 DT_SIFIVE_GPIO0_10012000_IRQ_12
#define CONFIG_SIFIVE_GPIO_0_IRQ_13 SIFIVE_GPIO0_10012000_IRQ_13 #define CONFIG_SIFIVE_GPIO_0_IRQ_13 DT_SIFIVE_GPIO0_10012000_IRQ_13
#define CONFIG_SIFIVE_GPIO_0_IRQ_14 SIFIVE_GPIO0_10012000_IRQ_14 #define CONFIG_SIFIVE_GPIO_0_IRQ_14 DT_SIFIVE_GPIO0_10012000_IRQ_14
#define CONFIG_SIFIVE_GPIO_0_IRQ_15 SIFIVE_GPIO0_10012000_IRQ_15 #define CONFIG_SIFIVE_GPIO_0_IRQ_15 DT_SIFIVE_GPIO0_10012000_IRQ_15
#define CONFIG_SIFIVE_GPIO_0_IRQ_16 SIFIVE_GPIO0_10012000_IRQ_16 #define CONFIG_SIFIVE_GPIO_0_IRQ_16 DT_SIFIVE_GPIO0_10012000_IRQ_16
#define CONFIG_SIFIVE_GPIO_0_IRQ_17 SIFIVE_GPIO0_10012000_IRQ_17 #define CONFIG_SIFIVE_GPIO_0_IRQ_17 DT_SIFIVE_GPIO0_10012000_IRQ_17
#define CONFIG_SIFIVE_GPIO_0_IRQ_18 SIFIVE_GPIO0_10012000_IRQ_18 #define CONFIG_SIFIVE_GPIO_0_IRQ_18 DT_SIFIVE_GPIO0_10012000_IRQ_18
#define CONFIG_SIFIVE_GPIO_0_IRQ_19 SIFIVE_GPIO0_10012000_IRQ_19 #define CONFIG_SIFIVE_GPIO_0_IRQ_19 DT_SIFIVE_GPIO0_10012000_IRQ_19
#define CONFIG_SIFIVE_GPIO_0_IRQ_20 SIFIVE_GPIO0_10012000_IRQ_20 #define CONFIG_SIFIVE_GPIO_0_IRQ_20 DT_SIFIVE_GPIO0_10012000_IRQ_20
#define CONFIG_SIFIVE_GPIO_0_IRQ_21 SIFIVE_GPIO0_10012000_IRQ_21 #define CONFIG_SIFIVE_GPIO_0_IRQ_21 DT_SIFIVE_GPIO0_10012000_IRQ_21
#define CONFIG_SIFIVE_GPIO_0_IRQ_22 SIFIVE_GPIO0_10012000_IRQ_22 #define CONFIG_SIFIVE_GPIO_0_IRQ_22 DT_SIFIVE_GPIO0_10012000_IRQ_22
#define CONFIG_SIFIVE_GPIO_0_IRQ_23 SIFIVE_GPIO0_10012000_IRQ_23 #define CONFIG_SIFIVE_GPIO_0_IRQ_23 DT_SIFIVE_GPIO0_10012000_IRQ_23
#define CONFIG_SIFIVE_GPIO_0_IRQ_24 SIFIVE_GPIO0_10012000_IRQ_24 #define CONFIG_SIFIVE_GPIO_0_IRQ_24 DT_SIFIVE_GPIO0_10012000_IRQ_24
#define CONFIG_SIFIVE_GPIO_0_IRQ_25 SIFIVE_GPIO0_10012000_IRQ_25 #define CONFIG_SIFIVE_GPIO_0_IRQ_25 DT_SIFIVE_GPIO0_10012000_IRQ_25
#define CONFIG_SIFIVE_GPIO_0_IRQ_26 SIFIVE_GPIO0_10012000_IRQ_26 #define CONFIG_SIFIVE_GPIO_0_IRQ_26 DT_SIFIVE_GPIO0_10012000_IRQ_26
#define CONFIG_SIFIVE_GPIO_0_IRQ_27 SIFIVE_GPIO0_10012000_IRQ_27 #define CONFIG_SIFIVE_GPIO_0_IRQ_27 DT_SIFIVE_GPIO0_10012000_IRQ_27
#define CONFIG_SIFIVE_GPIO_0_IRQ_28 SIFIVE_GPIO0_10012000_IRQ_28 #define CONFIG_SIFIVE_GPIO_0_IRQ_28 DT_SIFIVE_GPIO0_10012000_IRQ_28
#define CONFIG_SIFIVE_GPIO_0_IRQ_29 SIFIVE_GPIO0_10012000_IRQ_29 #define CONFIG_SIFIVE_GPIO_0_IRQ_29 DT_SIFIVE_GPIO0_10012000_IRQ_29
#define CONFIG_SIFIVE_GPIO_0_IRQ_30 SIFIVE_GPIO0_10012000_IRQ_30 #define CONFIG_SIFIVE_GPIO_0_IRQ_30 DT_SIFIVE_GPIO0_10012000_IRQ_30
#define CONFIG_SIFIVE_GPIO_0_IRQ_31 SIFIVE_GPIO0_10012000_IRQ_31 #define CONFIG_SIFIVE_GPIO_0_IRQ_31 DT_SIFIVE_GPIO0_10012000_IRQ_31
#define CONFIG_SIFIVE_GPIO_0_SIZE SIFIVE_GPIO0_10012000_SIZE #define CONFIG_SIFIVE_GPIO_0_SIZE DT_SIFIVE_GPIO0_10012000_SIZE
/* UART 0 */ /* UART 0 */
#define CONFIG_SIFIVE_UART_0_BASE_ADDR SIFIVE_UART0_10013000_BASE_ADDRESS #define CONFIG_SIFIVE_UART_0_BASE_ADDR DT_SIFIVE_UART0_10013000_BASE_ADDRESS
#define CONFIG_SIFIVE_UART_0_CURRENT_SPEED SIFIVE_UART0_10013000_CURRENT_SPEED #define CONFIG_SIFIVE_UART_0_CURRENT_SPEED DT_SIFIVE_UART0_10013000_CURRENT_SPEED
#define CONFIG_SIFIVE_UART_0_IRQ_0 SIFIVE_UART0_10013000_IRQ_0 #define CONFIG_SIFIVE_UART_0_IRQ_0 DT_SIFIVE_UART0_10013000_IRQ_0
#define CONFIG_SIFIVE_UART_0_LABEL SIFIVE_UART0_10013000_LABEL #define CONFIG_SIFIVE_UART_0_LABEL DT_SIFIVE_UART0_10013000_LABEL
#define CONFIG_SIFIVE_UART_0_SIZE SIFIVE_UART0_10013000_SIZE #define CONFIG_SIFIVE_UART_0_SIZE DT_SIFIVE_UART0_10013000_SIZE
#define CONFIG_SIFIVE_UART_0_CLK_FREQ SIFIVE_UART0_10013000_CLOCK_FREQUENCY #define CONFIG_SIFIVE_UART_0_CLK_FREQ DT_SIFIVE_UART0_10013000_CLOCK_FREQUENCY
/* UART 1 */ /* UART 1 */
#define CONFIG_SIFIVE_UART_1_BASE_ADDR SIFIVE_UART0_10023000_BASE_ADDRESS #define CONFIG_SIFIVE_UART_1_BASE_ADDR DT_SIFIVE_UART0_10023000_BASE_ADDRESS
#define CONFIG_SIFIVE_UART_1_CURRENT_SPEED SIFIVE_UART0_10023000_CURRENT_SPEED #define CONFIG_SIFIVE_UART_1_CURRENT_SPEED DT_SIFIVE_UART0_10023000_CURRENT_SPEED
#define CONFIG_SIFIVE_UART_1_IRQ_0 SIFIVE_UART0_10023000_IRQ_0 #define CONFIG_SIFIVE_UART_1_IRQ_0 DT_SIFIVE_UART0_10023000_IRQ_0
#define CONFIG_SIFIVE_UART_1_SIZE SIFIVE_UART0_10023000_SIZE #define CONFIG_SIFIVE_UART_1_SIZE DT_SIFIVE_UART0_10023000_SIZE
#define CONFIG_SIFIVE_UART_1_CLK_FREQ SIFIVE_UART0_10023000_CLOCK_FREQUENCY #define CONFIG_SIFIVE_UART_1_CLK_FREQ DT_SIFIVE_UART0_10023000_CLOCK_FREQUENCY

26
soc/x86/apollo_lake/dts_fixup.h
View file

@ -14,19 +14,19 @@
#define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE #define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE
#define CONFIG_IOAPIC_BASE_ADDRESS INTEL_IOAPIC_FEC00000_BASE_ADDRESS #define CONFIG_IOAPIC_BASE_ADDRESS DT_INTEL_IOAPIC_FEC00000_BASE_ADDRESS
#define CONFIG_APL_GPIO_BASE_ADDRESS_0 INTEL_APL_GPIO_D0C50000_BASE_ADDRESS_0 #define CONFIG_APL_GPIO_BASE_ADDRESS_0 DT_INTEL_APL_GPIO_D0C50000_BASE_ADDRESS_0
#define CONFIG_APL_GPIO_BASE_ADDRESS_1 INTEL_APL_GPIO_D0C50000_BASE_ADDRESS_1 #define CONFIG_APL_GPIO_BASE_ADDRESS_1 DT_INTEL_APL_GPIO_D0C50000_BASE_ADDRESS_1
#define CONFIG_APL_GPIO_BASE_ADDRESS_2 INTEL_APL_GPIO_D0C50000_BASE_ADDRESS_2 #define CONFIG_APL_GPIO_BASE_ADDRESS_2 DT_INTEL_APL_GPIO_D0C50000_BASE_ADDRESS_2
#define CONFIG_APL_GPIO_BASE_ADDRESS_3 INTEL_APL_GPIO_D0C50000_BASE_ADDRESS_3 #define CONFIG_APL_GPIO_BASE_ADDRESS_3 DT_INTEL_APL_GPIO_D0C50000_BASE_ADDRESS_3
#define CONFIG_APL_GPIO_IRQ INTEL_APL_GPIO_D0C50000_IRQ_0 #define CONFIG_APL_GPIO_IRQ DT_INTEL_APL_GPIO_D0C50000_IRQ_0
#define CONFIG_APL_GPIO_IRQ_PRIORITY INTEL_APL_GPIO_D0C50000_IRQ_0_PRIORITY #define CONFIG_APL_GPIO_IRQ_PRIORITY DT_INTEL_APL_GPIO_D0C50000_IRQ_0_PRIORITY
#define CONFIG_APL_GPIO_IRQ_SENSE INTEL_APL_GPIO_D0C50000_IRQ_0_SENSE #define CONFIG_APL_GPIO_IRQ_SENSE DT_INTEL_APL_GPIO_D0C50000_IRQ_0_SENSE
#define CONFIG_APL_GPIO_LABEL INTEL_APL_GPIO_D0C50000_LABEL #define CONFIG_APL_GPIO_LABEL DT_INTEL_APL_GPIO_D0C50000_LABEL
#define CONFIG_APL_GPIO_MEM_SIZE_0 INTEL_APL_GPIO_D0C50000_SIZE_0 #define CONFIG_APL_GPIO_MEM_SIZE_0 DT_INTEL_APL_GPIO_D0C50000_SIZE_0
#define CONFIG_APL_GPIO_MEM_SIZE_1 INTEL_APL_GPIO_D0C50000_SIZE_1 #define CONFIG_APL_GPIO_MEM_SIZE_1 DT_INTEL_APL_GPIO_D0C50000_SIZE_1
#define CONFIG_APL_GPIO_MEM_SIZE_2 INTEL_APL_GPIO_D0C50000_SIZE_2 #define CONFIG_APL_GPIO_MEM_SIZE_2 DT_INTEL_APL_GPIO_D0C50000_SIZE_2
#define CONFIG_APL_GPIO_MEM_SIZE_3 oINTEL_APL_GPIO_D0C50000_SIZE_3 #define CONFIG_APL_GPIO_MEM_SIZE_3 DT_oINTEL_APL_GPIO_D0C50000_SIZE_3
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

30
soc/x86/atom/dts_fixup.h
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@ -1,20 +1,20 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_3F8_BASE_ADDRESS #define CONFIG_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_3F8_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_3F8_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_3F8_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_3F8_LABEL #define CONFIG_UART_NS16550_PORT_0_NAME DT_NS16550_3F8_LABEL
#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_3F8_IRQ_0 #define CONFIG_UART_NS16550_PORT_0_IRQ DT_NS16550_3F8_IRQ_0
#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_3F8_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_3F8_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS NS16550_3F8_IRQ_0_SENSE #define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS DT_NS16550_3F8_IRQ_0_SENSE
#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_3F8_CLOCK_FREQUENCY #define CONFIG_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_3F8_CLOCK_FREQUENCY
#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_2F8_BASE_ADDRESS #define CONFIG_UART_NS16550_PORT_1_BASE_ADDR DT_NS16550_2F8_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_2F8_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_1_BAUD_RATE DT_NS16550_2F8_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_2F8_LABEL #define CONFIG_UART_NS16550_PORT_1_NAME DT_NS16550_2F8_LABEL
#define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_2F8_IRQ_0 #define CONFIG_UART_NS16550_PORT_1_IRQ DT_NS16550_2F8_IRQ_0
#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_2F8_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_2F8_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS NS16550_2F8_IRQ_0_SENSE #define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS DT_NS16550_2F8_IRQ_0_SENSE
#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ NS16550_2F8_CLOCK_FREQUENCY #define CONFIG_UART_NS16550_PORT_1_CLK_FREQ DT_NS16550_2F8_CLOCK_FREQUENCY
#define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS #define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
@ -24,6 +24,6 @@
#define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE #define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE
#define CONFIG_IOAPIC_BASE_ADDRESS INTEL_IOAPIC_FEC00000_BASE_ADDRESS #define CONFIG_IOAPIC_BASE_ADDRESS DT_INTEL_IOAPIC_FEC00000_BASE_ADDRESS
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

30
soc/x86/ia32/dts_fixup.h
View file

@ -1,20 +1,20 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_3F8_BASE_ADDRESS #define CONFIG_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_3F8_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_3F8_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_3F8_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_3F8_LABEL #define CONFIG_UART_NS16550_PORT_0_NAME DT_NS16550_3F8_LABEL
#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_3F8_IRQ_0 #define CONFIG_UART_NS16550_PORT_0_IRQ DT_NS16550_3F8_IRQ_0
#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_3F8_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_3F8_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS NS16550_3F8_IRQ_0_SENSE #define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS DT_NS16550_3F8_IRQ_0_SENSE
#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_3F8_CLOCK_FREQUENCY #define CONFIG_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_3F8_CLOCK_FREQUENCY
#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_2F8_BASE_ADDRESS #define CONFIG_UART_NS16550_PORT_1_BASE_ADDR DT_NS16550_2F8_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_2F8_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_1_BAUD_RATE DT_NS16550_2F8_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_2F8_LABEL #define CONFIG_UART_NS16550_PORT_1_NAME DT_NS16550_2F8_LABEL
#define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_2F8_IRQ_0 #define CONFIG_UART_NS16550_PORT_1_IRQ DT_NS16550_2F8_IRQ_0
#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_2F8_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_2F8_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS NS16550_2F8_IRQ_0_SENSE #define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS DT_NS16550_2F8_IRQ_0_SENSE
#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ NS16550_2F8_CLOCK_FREQUENCY #define CONFIG_UART_NS16550_PORT_1_CLK_FREQ DT_NS16550_2F8_CLOCK_FREQUENCY
#define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS #define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
@ -25,6 +25,6 @@
#define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE #define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE
#define CONFIG_IOAPIC_BASE_ADDRESS INTEL_IOAPIC_FEC00000_BASE_ADDRESS #define CONFIG_IOAPIC_BASE_ADDRESS DT_INTEL_IOAPIC_FEC00000_BASE_ADDRESS
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

56
soc/x86/intel_quark/quark_d2000/dts_fixup.h
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@ -1,12 +1,12 @@
#define CONFIG_UART_QMSI_0_BAUDRATE INTEL_QMSI_UART_B0002000_CURRENT_SPEED #define CONFIG_UART_QMSI_0_BAUDRATE DT_INTEL_QMSI_UART_B0002000_CURRENT_SPEED
#define CONFIG_UART_QMSI_0_NAME INTEL_QMSI_UART_B0002000_LABEL #define CONFIG_UART_QMSI_0_NAME DT_INTEL_QMSI_UART_B0002000_LABEL
#define CONFIG_UART_QMSI_0_IRQ INTEL_QMSI_UART_B0002000_IRQ_0 #define CONFIG_UART_QMSI_0_IRQ DT_INTEL_QMSI_UART_B0002000_IRQ_0
#define CONFIG_UART_QMSI_0_IRQ_FLAGS INTEL_QMSI_UART_B0002000_IRQ_0_SENSE #define CONFIG_UART_QMSI_0_IRQ_FLAGS DT_INTEL_QMSI_UART_B0002000_IRQ_0_SENSE
#define CONFIG_UART_QMSI_1_BAUDRATE INTEL_QMSI_UART_B0002400_CURRENT_SPEED #define CONFIG_UART_QMSI_1_BAUDRATE DT_INTEL_QMSI_UART_B0002400_CURRENT_SPEED
#define CONFIG_UART_QMSI_1_NAME INTEL_QMSI_UART_B0002400_LABEL #define CONFIG_UART_QMSI_1_NAME DT_INTEL_QMSI_UART_B0002400_LABEL
#define CONFIG_UART_QMSI_1_IRQ INTEL_QMSI_UART_B0002400_IRQ_0 #define CONFIG_UART_QMSI_1_IRQ DT_INTEL_QMSI_UART_B0002400_IRQ_0
#define CONFIG_UART_QMSI_1_IRQ_FLAGS INTEL_QMSI_UART_B0002400_IRQ_0_SENSE #define CONFIG_UART_QMSI_1_IRQ_FLAGS DT_INTEL_QMSI_UART_B0002400_IRQ_0_SENSE
#define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS #define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
@ -16,30 +16,30 @@
#define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE #define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE
#define CONFIG_I2C_0_NAME INTEL_QMSI_I2C_B0002800_LABEL #define CONFIG_I2C_0_NAME DT_INTEL_QMSI_I2C_B0002800_LABEL
#define CONFIG_I2C_0_BITRATE INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY #define CONFIG_I2C_0_BITRATE DT_INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY
#define CONFIG_I2C_0_IRQ INTEL_QMSI_I2C_B0002800_IRQ_0 #define CONFIG_I2C_0_IRQ DT_INTEL_QMSI_I2C_B0002800_IRQ_0
#define CONFIG_I2C_0_IRQ_FLAGS INTEL_QMSI_I2C_B0002800_IRQ_0_SENSE #define CONFIG_I2C_0_IRQ_FLAGS DT_INTEL_QMSI_I2C_B0002800_IRQ_0_SENSE
#define CONFIG_GPIO_QMSI_0_NAME INTEL_QMSI_GPIO_B0000C00_LABEL #define CONFIG_GPIO_QMSI_0_NAME DT_INTEL_QMSI_GPIO_B0000C00_LABEL
#define CONFIG_GPIO_QMSI_0_IRQ INTEL_QMSI_GPIO_B0000C00_IRQ_0 #define CONFIG_GPIO_QMSI_0_IRQ DT_INTEL_QMSI_GPIO_B0000C00_IRQ_0
#define CONFIG_GPIO_QMSI_0_IRQ_FLAGS INTEL_QMSI_GPIO_B0000C00_IRQ_0_SENSE #define CONFIG_GPIO_QMSI_0_IRQ_FLAGS DT_INTEL_QMSI_GPIO_B0000C00_IRQ_0_SENSE
#define CONFIG_RTC_0_NAME INTEL_QMSI_RTC_B0000400_LABEL #define CONFIG_RTC_0_NAME DT_INTEL_QMSI_RTC_B0000400_LABEL
#define CONFIG_RTC_0_IRQ INTEL_QMSI_RTC_B0000400_IRQ_0 #define CONFIG_RTC_0_IRQ DT_INTEL_QMSI_RTC_B0000400_IRQ_0
#define CONFIG_RTC_0_IRQ_FLAGS INTEL_QMSI_RTC_B0000400_IRQ_0_SENSE #define CONFIG_RTC_0_IRQ_FLAGS DT_INTEL_QMSI_RTC_B0000400_IRQ_0_SENSE
#define CONFIG_ADC_0_NAME INTEL_QUARK_D2000_ADC_B0004000_LABEL #define CONFIG_ADC_0_NAME DT_INTEL_QUARK_D2000_ADC_B0004000_LABEL
#define CONFIG_ADC_0_BASE_ADDRESS INTEL_QUARK_D2000_ADC_B0004000_BASE_ADDRESS #define CONFIG_ADC_0_BASE_ADDRESS DT_INTEL_QUARK_D2000_ADC_B0004000_BASE_ADDRESS
#define CONFIG_ADC_0_IRQ INTEL_QUARK_D2000_ADC_B0004000_IRQ_0 #define CONFIG_ADC_0_IRQ DT_INTEL_QUARK_D2000_ADC_B0004000_IRQ_0
#define CONFIG_ADC_0_IRQ_FLAGS INTEL_QUARK_D2000_ADC_B0004000_IRQ_0_SENSE #define CONFIG_ADC_0_IRQ_FLAGS DT_INTEL_QUARK_D2000_ADC_B0004000_IRQ_0_SENSE
#define CONFIG_SPI_0_BASE_ADDRESS SNPS_DESIGNWARE_SPI_B0001000_BASE_ADDRESS #define CONFIG_SPI_0_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_B0001000_BASE_ADDRESS
#define CONFIG_SPI_0_NAME SNPS_DESIGNWARE_SPI_B0001000_LABEL #define CONFIG_SPI_0_NAME DT_SNPS_DESIGNWARE_SPI_B0001000_LABEL
#define CONFIG_SPI_0_IRQ SNPS_DESIGNWARE_SPI_B0001000_IRQ_0 #define CONFIG_SPI_0_IRQ DT_SNPS_DESIGNWARE_SPI_B0001000_IRQ_0
#define CONFIG_SPI_0_IRQ_PRI 0 #define CONFIG_SPI_0_IRQ_PRI 0
#define CONFIG_WDT_0_NAME INTEL_QMSI_WATCHDOG_B0000000_LABEL #define CONFIG_WDT_0_NAME DT_INTEL_QMSI_WATCHDOG_B0000000_LABEL
#define CONFIG_WDT_0_IRQ INTEL_QMSI_WATCHDOG_B0000000_IRQ_0 #define CONFIG_WDT_0_IRQ DT_INTEL_QMSI_WATCHDOG_B0000000_IRQ_0
#define CONFIG_WDT_0_IRQ_PRI 0 #define CONFIG_WDT_0_IRQ_PRI 0
#define CONFIG_WDT_0_IRQ_FLAGS INTEL_QMSI_WATCHDOG_B0000000_IRQ_0_SENSE #define CONFIG_WDT_0_IRQ_FLAGS DT_INTEL_QMSI_WATCHDOG_B0000000_IRQ_0_SENSE

98
soc/x86/intel_quark/quark_se/dts_fixup.h
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@ -1,16 +1,16 @@
/* SoC level DTS fixup file */ /* SoC level DTS fixup file */
#define CONFIG_UART_QMSI_0_BAUDRATE INTEL_QMSI_UART_B0002000_CURRENT_SPEED #define CONFIG_UART_QMSI_0_BAUDRATE DT_INTEL_QMSI_UART_B0002000_CURRENT_SPEED
#define CONFIG_UART_QMSI_0_NAME INTEL_QMSI_UART_B0002000_LABEL #define CONFIG_UART_QMSI_0_NAME DT_INTEL_QMSI_UART_B0002000_LABEL
#define CONFIG_UART_QMSI_0_IRQ INTEL_QMSI_UART_B0002000_IRQ_0 #define CONFIG_UART_QMSI_0_IRQ DT_INTEL_QMSI_UART_B0002000_IRQ_0
#define CONFIG_UART_QMSI_0_IRQ_PRI INTEL_QMSI_UART_B0002000_IRQ_0_PRIORITY #define CONFIG_UART_QMSI_0_IRQ_PRI DT_INTEL_QMSI_UART_B0002000_IRQ_0_PRIORITY
#define CONFIG_UART_QMSI_0_IRQ_FLAGS INTEL_QMSI_UART_B0002000_IRQ_0_SENSE #define CONFIG_UART_QMSI_0_IRQ_FLAGS DT_INTEL_QMSI_UART_B0002000_IRQ_0_SENSE
#define CONFIG_UART_QMSI_1_BAUDRATE INTEL_QMSI_UART_B0002400_CURRENT_SPEED #define CONFIG_UART_QMSI_1_BAUDRATE DT_INTEL_QMSI_UART_B0002400_CURRENT_SPEED
#define CONFIG_UART_QMSI_1_NAME INTEL_QMSI_UART_B0002400_LABEL #define CONFIG_UART_QMSI_1_NAME DT_INTEL_QMSI_UART_B0002400_LABEL
#define CONFIG_UART_QMSI_1_IRQ INTEL_QMSI_UART_B0002400_IRQ_0 #define CONFIG_UART_QMSI_1_IRQ DT_INTEL_QMSI_UART_B0002400_IRQ_0
#define CONFIG_UART_QMSI_1_IRQ_PRI INTEL_QMSI_UART_B0002400_IRQ_0_PRIORITY #define CONFIG_UART_QMSI_1_IRQ_PRI DT_INTEL_QMSI_UART_B0002400_IRQ_0_PRIORITY
#define CONFIG_UART_QMSI_1_IRQ_FLAGS INTEL_QMSI_UART_B0002400_IRQ_0_SENSE #define CONFIG_UART_QMSI_1_IRQ_FLAGS DT_INTEL_QMSI_UART_B0002400_IRQ_0_SENSE
#define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS #define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
@ -20,51 +20,51 @@
#define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE #define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE
#define CONFIG_IOAPIC_BASE_ADDRESS INTEL_IOAPIC_FEC00000_BASE_ADDRESS #define CONFIG_IOAPIC_BASE_ADDRESS DT_INTEL_IOAPIC_FEC00000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME INTEL_QMSI_I2C_B0002800_LABEL #define CONFIG_I2C_0_NAME DT_INTEL_QMSI_I2C_B0002800_LABEL
#define CONFIG_I2C_0_BITRATE INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY #define CONFIG_I2C_0_BITRATE DT_INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY
#define CONFIG_I2C_0_IRQ INTEL_QMSI_I2C_B0002800_IRQ_0 #define CONFIG_I2C_0_IRQ DT_INTEL_QMSI_I2C_B0002800_IRQ_0
#define CONFIG_I2C_0_IRQ_PRI INTEL_QMSI_I2C_B0002800_IRQ_0_PRIORITY #define CONFIG_I2C_0_IRQ_PRI DT_INTEL_QMSI_I2C_B0002800_IRQ_0_PRIORITY
#define CONFIG_I2C_0_IRQ_FLAGS INTEL_QMSI_I2C_B0002800_IRQ_0_SENSE #define CONFIG_I2C_0_IRQ_FLAGS DT_INTEL_QMSI_I2C_B0002800_IRQ_0_SENSE
#define CONFIG_I2C_1_NAME INTEL_QMSI_I2C_B0002C00_LABEL #define CONFIG_I2C_1_NAME DT_INTEL_QMSI_I2C_B0002C00_LABEL
#define CONFIG_I2C_1_BITRATE INTEL_QMSI_I2C_B0002C00_CLOCK_FREQUENCY #define CONFIG_I2C_1_BITRATE DT_INTEL_QMSI_I2C_B0002C00_CLOCK_FREQUENCY
#define CONFIG_I2C_1_IRQ INTEL_QMSI_I2C_B0002C00_IRQ_0 #define CONFIG_I2C_1_IRQ DT_INTEL_QMSI_I2C_B0002C00_IRQ_0
#define CONFIG_I2C_1_IRQ_PRI INTEL_QMSI_I2C_B0002C00_IRQ_0_PRIORITY #define CONFIG_I2C_1_IRQ_PRI DT_INTEL_QMSI_I2C_B0002C00_IRQ_0_PRIORITY
#define CONFIG_I2C_1_IRQ_FLAGS INTEL_QMSI_I2C_B0002C00_IRQ_0_SENSE #define CONFIG_I2C_1_IRQ_FLAGS DT_INTEL_QMSI_I2C_B0002C00_IRQ_0_SENSE
#define CONFIG_GPIO_QMSI_0_NAME INTEL_QMSI_GPIO_B0000C00_LABEL #define CONFIG_GPIO_QMSI_0_NAME DT_INTEL_QMSI_GPIO_B0000C00_LABEL
#define CONFIG_GPIO_QMSI_0_IRQ INTEL_QMSI_GPIO_B0000C00_IRQ_0 #define CONFIG_GPIO_QMSI_0_IRQ DT_INTEL_QMSI_GPIO_B0000C00_IRQ_0
#define CONFIG_GPIO_QMSI_0_IRQ_PRI INTEL_QMSI_GPIO_B0000C00_IRQ_0_PRIORITY #define CONFIG_GPIO_QMSI_0_IRQ_PRI DT_INTEL_QMSI_GPIO_B0000C00_IRQ_0_PRIORITY
#define CONFIG_GPIO_QMSI_0_IRQ_FLAGS INTEL_QMSI_GPIO_B0000C00_IRQ_0_SENSE #define CONFIG_GPIO_QMSI_0_IRQ_FLAGS DT_INTEL_QMSI_GPIO_B0000C00_IRQ_0_SENSE
#define CONFIG_GPIO_QMSI_1_NAME INTEL_QMSI_GPIO_B0800B00_LABEL #define CONFIG_GPIO_QMSI_1_NAME DT_INTEL_QMSI_GPIO_B0800B00_LABEL
#define CONFIG_GPIO_QMSI_1_IRQ INTEL_QMSI_GPIO_B0800B00_IRQ_0 #define CONFIG_GPIO_QMSI_1_IRQ DT_INTEL_QMSI_GPIO_B0800B00_IRQ_0
#define CONFIG_GPIO_QMSI_1_IRQ_PRI INTEL_QMSI_GPIO_B0800B00_IRQ_0_PRIORITY #define CONFIG_GPIO_QMSI_1_IRQ_PRI DT_INTEL_QMSI_GPIO_B0800B00_IRQ_0_PRIORITY
#define CONFIG_GPIO_QMSI_1_IRQ_FLAGS INTEL_QMSI_GPIO_B0800B00_IRQ_0_SENSE #define CONFIG_GPIO_QMSI_1_IRQ_FLAGS DT_INTEL_QMSI_GPIO_B0800B00_IRQ_0_SENSE
#define CONFIG_RTC_0_NAME INTEL_QMSI_RTC_B0000400_LABEL #define CONFIG_RTC_0_NAME DT_INTEL_QMSI_RTC_B0000400_LABEL
#define CONFIG_RTC_0_IRQ INTEL_QMSI_RTC_B0000400_IRQ_0 #define CONFIG_RTC_0_IRQ DT_INTEL_QMSI_RTC_B0000400_IRQ_0
#define CONFIG_RTC_0_IRQ_PRI INTEL_QMSI_RTC_B0000400_IRQ_0_PRIORITY #define CONFIG_RTC_0_IRQ_PRI DT_INTEL_QMSI_RTC_B0000400_IRQ_0_PRIORITY
#define CONFIG_RTC_0_IRQ_FLAGS INTEL_QMSI_RTC_B0000400_IRQ_0_SENSE #define CONFIG_RTC_0_IRQ_FLAGS DT_INTEL_QMSI_RTC_B0000400_IRQ_0_SENSE
#define CONFIG_SPI_0_BASE_ADDRESS SNPS_DESIGNWARE_SPI_B0001000_BASE_ADDRESS #define CONFIG_SPI_0_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_B0001000_BASE_ADDRESS
#define CONFIG_SPI_0_NAME SNPS_DESIGNWARE_SPI_B0001000_LABEL #define CONFIG_SPI_0_NAME DT_SNPS_DESIGNWARE_SPI_B0001000_LABEL
#define CONFIG_SPI_0_IRQ SNPS_DESIGNWARE_SPI_B0001000_IRQ_0 #define CONFIG_SPI_0_IRQ DT_SNPS_DESIGNWARE_SPI_B0001000_IRQ_0
#define CONFIG_SPI_0_IRQ_PRI SNPS_DESIGNWARE_SPI_B0001000_IRQ_0_PRIORITY #define CONFIG_SPI_0_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_B0001000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_BASE_ADDRESS SNPS_DESIGNWARE_SPI_B0001400_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_B0001400_BASE_ADDRESS
#define CONFIG_SPI_1_NAME SNPS_DESIGNWARE_SPI_B0001400_LABEL #define CONFIG_SPI_1_NAME DT_SNPS_DESIGNWARE_SPI_B0001400_LABEL
#define CONFIG_SPI_1_IRQ SNPS_DESIGNWARE_SPI_B0001400_IRQ_0 #define CONFIG_SPI_1_IRQ DT_SNPS_DESIGNWARE_SPI_B0001400_IRQ_0
#define CONFIG_SPI_1_IRQ_PRI SNPS_DESIGNWARE_SPI_B0001400_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_B0001400_IRQ_0_PRIORITY
#define CONFIG_SPI_2_BASE_ADDRESS SNPS_DESIGNWARE_SPI_B0001800_BASE_ADDRESS #define CONFIG_SPI_2_BASE_ADDRESS DT_SNPS_DESIGNWARE_SPI_B0001800_BASE_ADDRESS
#define CONFIG_SPI_2_NAME SNPS_DESIGNWARE_SPI_B0001800_LABEL #define CONFIG_SPI_2_NAME DT_SNPS_DESIGNWARE_SPI_B0001800_LABEL
#define CONFIG_SPI_2_IRQ SNPS_DESIGNWARE_SPI_B0001800_IRQ_0 #define CONFIG_SPI_2_IRQ DT_SNPS_DESIGNWARE_SPI_B0001800_IRQ_0
#define CONFIG_SPI_2_IRQ_PRI SNPS_DESIGNWARE_SPI_B0001800_IRQ_0_PRIORITY #define CONFIG_SPI_2_IRQ_PRI DT_SNPS_DESIGNWARE_SPI_B0001800_IRQ_0_PRIORITY
#define CONFIG_WDT_0_NAME INTEL_QMSI_WATCHDOG_B0000000_LABEL #define CONFIG_WDT_0_NAME DT_INTEL_QMSI_WATCHDOG_B0000000_LABEL
#define CONFIG_WDT_0_IRQ INTEL_QMSI_WATCHDOG_B0000000_IRQ_0 #define CONFIG_WDT_0_IRQ DT_INTEL_QMSI_WATCHDOG_B0000000_IRQ_0
#define CONFIG_WDT_0_IRQ_PRI INTEL_QMSI_WATCHDOG_B0000000_IRQ_0_PRIORITY #define CONFIG_WDT_0_IRQ_PRI DT_INTEL_QMSI_WATCHDOG_B0000000_IRQ_0_PRIORITY
#define CONFIG_WDT_0_IRQ_FLAGS INTEL_QMSI_WATCHDOG_B0000000_IRQ_0_SENSE #define CONFIG_WDT_0_IRQ_FLAGS DT_INTEL_QMSI_WATCHDOG_B0000000_IRQ_0_SENSE
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

60
soc/x86/intel_quark/quark_x1000/dts_fixup.h
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@ -1,18 +1,18 @@
#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_9000F000_BASE_ADDRESS #define CONFIG_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_9000F000_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_9000F000_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_0_BAUD_RATE DT_NS16550_9000F000_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_9000F000_LABEL #define CONFIG_UART_NS16550_PORT_0_NAME DT_NS16550_9000F000_LABEL
#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_9000F000_IRQ_0 #define CONFIG_UART_NS16550_PORT_0_IRQ DT_NS16550_9000F000_IRQ_0
#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_9000F000_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_0_IRQ_PRI DT_NS16550_9000F000_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS NS16550_9000F000_IRQ_0_SENSE #define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS DT_NS16550_9000F000_IRQ_0_SENSE
#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_9000F000_CLOCK_FREQUENCY #define CONFIG_UART_NS16550_PORT_0_CLK_FREQ DT_NS16550_9000F000_CLOCK_FREQUENCY
#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_9000B000_BASE_ADDRESS #define CONFIG_UART_NS16550_PORT_1_BASE_ADDR DT_NS16550_9000B000_BASE_ADDRESS
#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_9000B000_CURRENT_SPEED #define CONFIG_UART_NS16550_PORT_1_BAUD_RATE DT_NS16550_9000B000_CURRENT_SPEED
#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_9000B000_LABEL #define CONFIG_UART_NS16550_PORT_1_NAME DT_NS16550_9000B000_LABEL
#define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_9000B000_IRQ_0 #define CONFIG_UART_NS16550_PORT_1_IRQ DT_NS16550_9000B000_IRQ_0
#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_9000B000_IRQ_0_PRIORITY #define CONFIG_UART_NS16550_PORT_1_IRQ_PRI DT_NS16550_9000B000_IRQ_0_PRIORITY
#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS NS16550_9000B000_IRQ_0_SENSE #define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS DT_NS16550_9000B000_IRQ_0_SENSE
#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ NS16550_9000B000_CLOCK_FREQUENCY #define CONFIG_UART_NS16550_PORT_1_CLK_FREQ DT_NS16550_9000B000_CLOCK_FREQUENCY
#define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS #define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
@ -22,22 +22,22 @@
#define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE #define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE
#define CONFIG_IOAPIC_BASE_ADDRESS INTEL_IOAPIC_FEC00000_BASE_ADDRESS #define CONFIG_IOAPIC_BASE_ADDRESS DT_INTEL_IOAPIC_FEC00000_BASE_ADDRESS
#define CONFIG_I2C_0_IRQ SNPS_DESIGNWARE_I2C_90007000_IRQ_0 #define CONFIG_I2C_0_IRQ DT_SNPS_DESIGNWARE_I2C_90007000_IRQ_0
#define CONFIG_I2C_0_IRQ_FLAGS SNPS_DESIGNWARE_I2C_90007000_IRQ_0_SENSE #define CONFIG_I2C_0_IRQ_FLAGS DT_SNPS_DESIGNWARE_I2C_90007000_IRQ_0_SENSE
#define CONFIG_I2C_0_BASE_ADDR SNPS_DESIGNWARE_I2C_90007000_BASE_ADDRESS #define CONFIG_I2C_0_BASE_ADDR DT_SNPS_DESIGNWARE_I2C_90007000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME SNPS_DESIGNWARE_I2C_90007000_LABEL #define CONFIG_I2C_0_NAME DT_SNPS_DESIGNWARE_I2C_90007000_LABEL
#define CONFIG_I2C_0_BITRATE SNPS_DESIGNWARE_I2C_90007000_CLOCK_FREQUENCY #define CONFIG_I2C_0_BITRATE DT_SNPS_DESIGNWARE_I2C_90007000_CLOCK_FREQUENCY
#define CONFIG_SPI_0_BASE_ADDRESS INTEL_INTEL_SPI_90009000_BASE_ADDRESS #define CONFIG_SPI_0_BASE_ADDRESS DT_INTEL_INTEL_SPI_90009000_BASE_ADDRESS
#define CONFIG_SPI_0_IRQ INTEL_INTEL_SPI_90009000_IRQ_0 #define CONFIG_SPI_0_IRQ DT_INTEL_INTEL_SPI_90009000_IRQ_0
#define CONFIG_SPI_0_IRQ_FLAGS INTEL_INTEL_SPI_90009000_IRQ_0_SENSE #define CONFIG_SPI_0_IRQ_FLAGS DT_INTEL_INTEL_SPI_90009000_IRQ_0_SENSE
#define CONFIG_SPI_0_IRQ_PRI INTEL_INTEL_SPI_90009000_IRQ_0_PRIORITY #define CONFIG_SPI_0_IRQ_PRI DT_INTEL_INTEL_SPI_90009000_IRQ_0_PRIORITY
#define CONFIG_SPI_0_NAME INTEL_INTEL_SPI_90009000_LABEL #define CONFIG_SPI_0_NAME DT_INTEL_INTEL_SPI_90009000_LABEL
#define CONFIG_SPI_1_BASE_ADDRESS INTEL_INTEL_SPI_90008000_BASE_ADDRESS #define CONFIG_SPI_1_BASE_ADDRESS DT_INTEL_INTEL_SPI_90008000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ INTEL_INTEL_SPI_90008000_IRQ_0 #define CONFIG_SPI_1_IRQ DT_INTEL_INTEL_SPI_90008000_IRQ_0
#define CONFIG_SPI_1_IRQ_FLAGS INTEL_INTEL_SPI_90008000_IRQ_0_SENSE #define CONFIG_SPI_1_IRQ_FLAGS DT_INTEL_INTEL_SPI_90008000_IRQ_0_SENSE
#define CONFIG_SPI_1_IRQ_PRI INTEL_INTEL_SPI_90008000_IRQ_0_PRIORITY #define CONFIG_SPI_1_IRQ_PRI DT_INTEL_INTEL_SPI_90008000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_NAME INTEL_INTEL_SPI_90008000_LABEL #define CONFIG_SPI_1_NAME DT_INTEL_INTEL_SPI_90008000_LABEL