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doxygen: add @brief and capitalize

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Remove function name from comment and add @brief instead.
Also capitilize first letter.

Change-Id: Ib708b49bf02e5bc89b0066637a55874e659637e0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2015-07-01 17:51:40 -04:00
commit f367f071b6
223 changed files with 1146 additions and 1147 deletions
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24
arch/arm/core/atomic.S
View file

@ -61,7 +61,7 @@ GTEXT(atomic_cas)
/**
*
* atomic_clear - atomically clear a memory location
* @brief Atomically clear a memory location
*
* This routine atomically clears the contents of <target> and returns the old
* value that was in <target>.
@ -84,7 +84,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_clear_set, atomic_clear)
/**
*
* atomic_set - atomically set a memory location
* @brief Atomically set a memory location
*
* This routine atomically sets the contents of <target> to <value> and returns
* the old value that was in <target>.
@ -116,7 +116,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_clear_set, atomic_set)
/**
*
* atomic_get - Get the value of a shared memory atomically
* @brief Get the value of a shared memory atomically
*
* This routine atomically retrieves the value in *target
*
@ -135,7 +135,7 @@ SECTION_FUNC(TEXT, atomic_get)
/**
*
* atomic_inc - atomically increment a memory location
* @brief Atomically increment a memory location
*
* This routine atomically increments the value in <target>. The operation is
* done using unsigned integer arithmetic. Various CPU architectures may impose
@ -161,7 +161,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_inc_add, atomic_inc)
/**
*
* atomic_add - atomically add a value to a memory location
* @brief Atomically add a value to a memory location
*
* This routine atomically adds the contents of <target> and <value>, placing
* the result in <target>. The operation is done using signed integer arithmetic.
@ -195,7 +195,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_inc_add, atomic_add)
/**
*
* atomic_dec - atomically decrement a memory location
* @brief Atomically decrement a memory location
*
* This routine atomically decrements the value in <target>. The operation is
* done using unsigned integer arithmetic. Various CPU architectures may impose
@ -221,7 +221,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_decSub, atomic_dec)
/**
*
* atomic_sub - atomically subtract a value from a memory location
* @brief Atomically subtract a value from a memory location
*
* This routine atomically subtracts <value> from the contents of <target>,
* placing the result in <target>. The operation is done using signed integer
@ -255,7 +255,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_decSub, atomic_sub)
/**
*
* atomic_nand - atomically perform a bitwise NAND on a memory location
* @brief Atomically perform a bitwise NAND on a memory location
*
* This routine atomically performs a bitwise NAND operation of the contents of
* <target> and <value>, placing the result in <target>.
@ -290,7 +290,7 @@ SECTION_FUNC(TEXT, atomic_nand)
/**
*
* atomic_and - atomically perform a bitwise AND on a memory location
* @brief Atomically perform a bitwise AND on a memory location
*
* This routine atomically performs a bitwise AND operation of the contents of
* <target> and <value>, placing the result in <target>.
@ -324,7 +324,7 @@ SECTION_FUNC(TEXT, atomic_and)
/**
*
* atomic_or - atomically perform a bitwise OR on memory location
* @brief Atomically perform a bitwise OR on memory location
*
* This routine atomically performs a bitwise OR operation of the contents of
* <target> and <value>, placing the result in <target>.
@ -358,7 +358,7 @@ SECTION_FUNC(TEXT, atomic_or)
/**
*
* atomic_xor - atomically perform a bitwise XOR on a memory location
* @brief Atomically perform a bitwise XOR on a memory location
*
* This routine atomically performs a bitwise XOR operation of the contents of
* <target> and <value>, placing the result in <target>.
@ -392,7 +392,7 @@ SECTION_FUNC(TEXT, atomic_xor)
/**
*
* atomic_cas - atomically compare-and-swap the contents of a memory location
* @brief Atomically compare-and-swap the contents of a memory location
*
* This routine performs an atomic compare-and-swap. testing that the contents of
* <target> contains <oldValue>, and if it does, setting the value of <target>

4
arch/arm/core/basepri.S
View file

@ -61,7 +61,7 @@ GTEXT(irq_unlock)
/**
*
* irq_lock - lock interrupts
* @brief Lock interrupts
*
* Prevent exceptions of priority lower than to the two highest priorities from
* interrupting the CPU.
@ -80,7 +80,7 @@ SECTION_FUNC(TEXT,irq_lock)
/**
*
* irq_unlock - unlock interrupts
* @brief Unlock interrupts
*
* Return the state of interrupt locking to a previous level, passed in via the
* <key> parameter, obtained from a previous call to irq_lock().

4
arch/arm/core/context.c
View file

@ -55,7 +55,7 @@ tNANO _nanokernel = {0};
#if defined(CONFIG_CONTEXT_MONITOR)
/**
*
* _context_monitor_init - initialize context monitoring support
* @brief Initialize context monitoring support
*
* Currently only inserts the new context in the list of active contexts.
*
@ -83,7 +83,7 @@ static ALWAYS_INLINE void _context_monitor_init(struct ccs *pCcs /* context */
/**
*
* _NewContext - intialize a new context (thread) from its stack space
* @brief Intialize a new context (thread) from its stack space
*
* The control structure (CCS) is put at the lower address of the stack. An
* initial context, to be "restored" by __pendsv(), is put at the other end of

10
arch/arm/core/cpu_idle.S
View file

@ -58,7 +58,7 @@ GTEXT(nano_cpu_atomic_idle)
/**
*
* _CpuIdleInit - initialization of CPU idle
* @brief Initialization of CPU idle
*
* Only called by nanoArchInit(). Sets SEVONPEND bit once for the system's
* duration.
@ -80,7 +80,7 @@ SECTION_FUNC(TEXT, _CpuIdleInit)
/**
*
* _NanoIdleValGet - get the kernel idle setting
* @brief Get the kernel idle setting
*
* Returns the nanokernel idle setting, in ticks. Only called by __systick().
*
@ -98,7 +98,7 @@ SECTION_FUNC(TEXT, _NanoIdleValGet)
/**
*
* _NanoIdleValClear - clear the kernel idle setting
* @brief Clear the kernel idle setting
*
* Sets the nanokernel idle setting to 0. Only called by __systick().
*
@ -119,7 +119,7 @@ SECTION_FUNC(TEXT, _NanoIdleValClear)
/**
*
* nano_cpu_idle - power save idle routine for ARM Cortex-M
* @brief Power save idle routine for ARM Cortex-M
*
* This function will be called by the nanokernel idle loop or possibly within
* an implementation of _sys_power_save_idle in the microkernel when the
@ -144,7 +144,7 @@ SECTION_FUNC(TEXT, nano_cpu_idle)
/**
*
* nano_cpu_atomic_idle - atomically re-enable interrupts and enter low power mode
* @brief Atomically re-enable interrupts and enter low power mode
*
* This function is utilized by the nanokernel object "wait" APIs for task
* contexts, e.g. nano_task_lifo_get_wait(), nano_task_sem_take_wait(), nano_task_stack_pop_wait(),

4
arch/arm/core/exc_exit.S
View file

@ -63,7 +63,7 @@ GDATA(_nanokernel)
/**
*
* _IntExit - kernel housekeeping when exiting interrupt handler installed
* @brief Kernel housekeeping when exiting interrupt handler installed
* directly in vector table
*
* Kernel allows installing interrupt handlers (ISRs) directly into the vector
@ -94,7 +94,7 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, _IntExit)
/**
*
* _ExcExit - kernel housekeeping when exiting exception handler installed
* @brief Kernel housekeeping when exiting exception handler installed
* directly in vector table
*
* See _IntExit().

2
arch/arm/core/fatal.c
View file

@ -64,7 +64,7 @@ const NANO_ESF _default_esf = {0xdeaddead, /* a1 */
/**
*
* _NanoFatalErrorHandler - nanokernel fatal error handler
* @brief Nanokernel fatal error handler
*
* This routine is called when fatal error conditions are detected by software
* and is responsible only for reporting the error. Once reported, it then

22
arch/arm/core/fault.c
View file

@ -61,7 +61,7 @@ Common fault handler for ARM Cortex-M processors.
#if (CONFIG_FAULT_DUMP == 1)
/**
*
* _FaultDump - dump information regarding fault (FAULT_DUMP == 1)
* @brief Dump information regarding fault (FAULT_DUMP == 1)
*
* Dump information regarding the fault when CONFIG_FAULT_DUMP is set to 1
* (short form).
@ -120,7 +120,7 @@ void _FaultDump(const NANO_ESF *esf, int fault)
#if (CONFIG_FAULT_DUMP == 2)
/**
*
* _FaultContextShow - dump context information
* @brief Dump context information
*
* See _FaultDump() for example.
*
@ -139,7 +139,7 @@ static void _FaultContextShow(const NANO_ESF *esf)
/**
*
* _MpuFault - dump MPU fault information
* @brief Dump MPU fault information
*
* See _FaultDump() for example.
*
@ -174,7 +174,7 @@ static void _MpuFault(const NANO_ESF *esf,
/**
*
* _BusFault - dump bus fault information
* @brief Dump bus fault information
*
* See _FaultDump() for example.
*
@ -215,7 +215,7 @@ static void _BusFault(const NANO_ESF *esf,
/**
*
* _UsageFault - dump usage fault information
* @brief Dump usage fault information
*
* See _FaultDump() for example.
*
@ -255,7 +255,7 @@ static void _UsageFault(const NANO_ESF *esf)
/**
*
* _HardFault - dump hard fault information
* @brief Dump hard fault information
*
* See _FaultDump() for example.
*
@ -283,7 +283,7 @@ static void _HardFault(const NANO_ESF *esf)
/**
*
* _DebugMonitor - dump debug monitor exception information
* @brief Dump debug monitor exception information
*
* See _FaultDump() for example.
*
@ -299,7 +299,7 @@ static void _DebugMonitor(const NANO_ESF *esf)
/**
*
* _ReservedException - dump reserved exception information
* @brief Dump reserved exception information
*
* See _FaultDump() for example.
*
@ -318,7 +318,7 @@ static void _ReservedException(const NANO_ESF *esf,
/**
*
* _FaultDump - dump information regarding fault (FAULT_DUMP == 2)
* @brief Dump information regarding fault (FAULT_DUMP == 2)
*
* Dump information regarding the fault when CONFIG_FAULT_DUMP is set to 2
* (long form).
@ -365,7 +365,7 @@ static void _FaultDump(const NANO_ESF *esf, int fault)
/**
*
* _Fault - fault handler
* @brief Fault handler
*
* This routine is called when fatal error conditions are detected by hardware
* and is responsible only for reporting the error. Once reported, it then
@ -396,7 +396,7 @@ void _Fault(
/**
*
* _FaultInit - initialization of fault handling
* @brief Initialization of fault handling
*
* Turns on the desired hardware faults.
*

2
arch/arm/core/fault_s.S
View file

@ -54,7 +54,7 @@ GTEXT(__reserved)
/**
*
* __fault - fault handler installed in the fault and reserved vectors
* @brief Fault handler installed in the fault and reserved vectors
*
* Entry point for the hard fault, MPU fault, bus fault, usage fault, debug
* monitor and reserved exceptions.

4
arch/arm/core/ffs.S
View file

@ -50,7 +50,7 @@ GTEXT(find_first_set)
/**
*
* find_last_set - find first set bit (searching from the most significant bit)
* @brief Find first set bit (searching from the most significant bit)
*
* This routine finds the first bit set in the argument passed it and
* returns the index of that bit. Bits are numbered starting
@ -71,7 +71,7 @@ SECTION_FUNC(TEXT, find_last_set)
/**
*
* find_first_set - find first set bit (searching from the least significant bit)
* @brief Find first set bit (searching from the least significant bit)
*
* This routine finds the first bit set in the argument passed it and
* returns the index of that bit. Bits are numbered starting

2
arch/arm/core/fiber_abort.c
View file

@ -53,7 +53,7 @@ the PendSV exception.
/**
*
* fiber_abort - abort the currently executing fiber
* @brief Abort the currently executing fiber
*
* Possible reasons for a fiber aborting:
*

7
arch/arm/core/gdb_stub.S
View file

@ -53,7 +53,7 @@ _ASM_FILE_PROLOGUE
/**
*
* _GdbStubExcEntry - exception entry extra work when GDB_INFO is enabled
* @brief Exception entry extra work when GDB_INFO is enabled
*
* During normal system operation, the callee-saved registers are saved lazily
* only when a context switch is required. To allow looking at the current
@ -97,7 +97,7 @@ SECTION_FUNC(TEXT, _GdbStubExcEntry)
/**
*
* _GdbStubExcExit - exception exit extra clean up when GDB_INFO is enabled
* @brief Exception exit extra clean up when GDB_INFO is enabled
*
* Record the fact that the thread is not interrupted anymore so that VQEMU
* looks at the CPU registers and not into the CCS to obtain the current
@ -131,8 +131,7 @@ SECTION_FUNC(TEXT, _GdbStubExcExit)
/**
*
* _irq_vector_table_entry_with_gdb_stub - stub for ISRs installed directly in
* vector table
* @brief Stub for ISRs installed directly in vector table
*
* The kernel on Cortex-M3/4 can be configured so that ISRs
* are installed directly in the vector table for maximum efficiency.

2
arch/arm/core/irq_init.c
View file

@ -47,7 +47,7 @@ the PendSV exception.
/**
*
* _IntLibInit - initialize interrupts
* @brief Initialize interrupts
*
* Ensures all interrupts have their priority set to _EXC_IRQ_DEFAULT_PRIO and
* not 0, which they have it set to when coming out of reset. This ensures that

14
arch/arm/core/irq_manage.c
View file

@ -48,7 +48,7 @@ extern void __reserved(void);
/**
*
* irq_handler_set - replace an interrupt handler by another
* @brief Replace an interrupt handler by another
*
* An interrupt's ISR can be replaced at runtime. Care must be taken that the
* interrupt is disabled before doing this.
@ -78,7 +78,7 @@ void irq_handler_set(unsigned int irq,
/**
*
* irq_enable - enable an interrupt line
* @brief Enable an interrupt line
*
* Clear possible pending interrupts on the line, and enable the interrupt
* line. After this call, the CPU will receive interrupts for the specified
@ -96,7 +96,7 @@ void irq_enable(unsigned int irq)
/**
*
* irq_disable - disable an interrupt line
* @brief Disable an interrupt line
*
* Disable an interrupt line. After this call, the CPU will stop receiving
* interrupts for the specified <irq>.
@ -111,7 +111,7 @@ void irq_disable(unsigned int irq)
/**
*
* irq_priority_set - set an interrupt's priority
* @brief Set an interrupt's priority
*
* Valid values are from 1 to 255. Interrupts of priority 1 are not masked when
* interrupts are locked system-wide, so care must be taken when using them. ISR
@ -133,7 +133,7 @@ void irq_priority_set(unsigned int irq,
/**
*
* _irq_spurious - spurious interrupt handler
* @brief Spurious interrupt handler
*
* Installed in all dynamic interrupt slots at boot time. Throws an error if
* called.
@ -151,7 +151,7 @@ void _irq_spurious(void *unused)
/**
*
* irq_connect - connect an ISR to an interrupt line
* @brief Connect an ISR to an interrupt line
*
* <isr> is connected to interrupt line <irq> (exception #<irq>+16). No prior
* ISR can have been connected on <irq> interrupt line since the system booted.
@ -174,7 +174,7 @@ int irq_connect(unsigned int irq,
/**
*
* irq_disconnect - disconnect an ISR from an interrupt line
* @brief Disconnect an ISR from an interrupt line
*
* Interrupt line <irq> (exception #<irq>+16) is disconnected from its ISR and
* the latter is replaced by _irq_spurious(). irq_disable() should have

2
arch/arm/core/isr_wrapper.S
View file

@ -55,7 +55,7 @@ GTEXT(_IntExit)
/**
*
* _isr_wrapper - wrapper around ISRs when inserted in software ISR table
* @brief Wrapper around ISRs when inserted in software ISR table
*
* When inserted in the vector table, _isr_wrapper() demuxes the ISR table using
* the running interrupt number as the index, and invokes the registered ISR

6
arch/arm/core/swap.S
View file

@ -53,7 +53,7 @@ GDATA(_nanokernel)
/**
*
* __pendsv - PendSV exception handler, handling context switches
* @brief PendSV exception handler, handling context switches
*
* The PendSV exception is the only context in the system that can perform
* context switching. When an execution context finds out it has to switch
@ -148,7 +148,7 @@ SECTION_FUNC(TEXT, __pendsv)
/**
*
* __svc - service call handler
* @brief Service call handler
*
* The service call (svc) is only used in _Swap() to enter handler mode so we
* can go through the PendSV exception to perform a context switch.
@ -180,7 +180,7 @@ SECTION_FUNC(TEXT, __svc)
/**
*
* _Swap - initiate a cooperative context switch
* @brief Initiate a cooperative context switch
*
* The _Swap() routine is invoked by various nanokernel services to effect
* a cooperative context context switch. Prior to invoking _Swap(), the caller

2
arch/arm/core/task_abort.c
View file

@ -54,7 +54,7 @@ static struct k_args cmd_packet;
/**
*
* _TaskAbort - abort the current task
* @brief Abort the current task
*
* Possible reasons for a task aborting:
*