diff --git a/soc/riscv/openisa_rv32m1/soc.c b/soc/riscv/openisa_rv32m1/soc.c
index 1ddf9cbf61a..f635f409f20 100644
--- a/soc/riscv/openisa_rv32m1/soc.c
+++ b/soc/riscv/openisa_rv32m1/soc.c
@@ -189,6 +189,27 @@ static void rv32m1_switch_to_sirc(void)
 	rv32m1_switch_sys_clk(&sys_clk_config_sirc);
 }
 
+/**
+ * @brief Setup peripheral clocks
+ *
+ * Setup the peripheral clock sources.
+ */
+static void rv32m1_setup_peripheral_clocks(void)
+{
+#ifdef DT_OPENISA_RV32M1_TPM_PWM_0_BASE_ADDRESS
+	CLOCK_SetIpSrc(kCLOCK_Tpm0, kCLOCK_IpSrcFircAsync);
+#endif
+#ifdef DT_OPENISA_RV32M1_TPM_PWM_1_BASE_ADDRESS
+	CLOCK_SetIpSrc(kCLOCK_Tpm1, kCLOCK_IpSrcFircAsync);
+#endif
+#ifdef DT_OPENISA_RV32M1_TPM_PWM_2_BASE_ADDRESS
+	CLOCK_SetIpSrc(kCLOCK_Tpm2, kCLOCK_IpSrcFircAsync);
+#endif
+#ifdef DT_OPENISA_RV32M1_TPM_PWM_3_BASE_ADDRESS
+	CLOCK_SetIpSrc(kCLOCK_Tpm3, kCLOCK_IpSrcFircAsync);
+#endif
+}
+
 /**
  * @brief Perform basic hardware initialization
  *
@@ -214,6 +235,9 @@ static int soc_rv32m1_init(struct device *arg)
 	/* Initialize LPFLL */
 	CLOCK_InitLpFll(&rv32m1_lpfll_cfg);
 
+	/* Initialize peripheral clocks */
+	rv32m1_setup_peripheral_clocks();
+
 	irq_unlock(key);
 
 	return 0;