drivers: clock_control: Update LPC clock driver for USDHC
Add support to get USDHC clock frequency Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This commit is contained in:
parent
27c73d3841
commit
f28672a448
2 changed files with 10 additions and 0 deletions
|
@ -72,6 +72,14 @@ static int mcux_lpc_syscon_clock_control_get_subsys_rate(
|
||||||
LOG_ERR("Missing feature define for HS_SPI clock!");
|
LOG_ERR("Missing feature define for HS_SPI clock!");
|
||||||
#endif
|
#endif
|
||||||
break;
|
break;
|
||||||
|
#if (defined(FSL_FEATURE_SOC_USDHC_COUNT) && FSL_FEATURE_SOC_USDHC_COUNT)
|
||||||
|
case MCUX_USDHC1_CLK:
|
||||||
|
*rate = CLOCK_GetSdioClkFreq(0);
|
||||||
|
break;
|
||||||
|
case MCUX_USDHC2_CLK:
|
||||||
|
*rate = CLOCK_GetSdioClkFreq(1);
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -16,5 +16,7 @@
|
||||||
#define MCUX_FLEXCOMM6_CLK 6
|
#define MCUX_FLEXCOMM6_CLK 6
|
||||||
#define MCUX_FLEXCOMM7_CLK 7
|
#define MCUX_FLEXCOMM7_CLK 7
|
||||||
#define MCUX_HS_SPI_CLK 8
|
#define MCUX_HS_SPI_CLK 8
|
||||||
|
#define MCUX_USDHC1_CLK 9
|
||||||
|
#define MCUX_USDHC2_CLK 10
|
||||||
|
|
||||||
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_MCUX_LPC_SYSCON_H_ */
|
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_MCUX_LPC_SYSCON_H_ */
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue