arm: cortex_m: Use new ARMV6_M_ARMV8_M_BASELINE in vector relay
The old ARMV6_M Kconfig option has been removed, and so to correctly set the dependencies for SW_VECTOR_RELAY we need to use the new ARMV6_M_ARMV8_M_BASELINE. Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
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3 changed files with 15 additions and 13 deletions
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@ -235,14 +235,15 @@ config ZERO_LATENCY_IRQS
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config SW_VECTOR_RELAY
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bool
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prompt "Enable ARMv6-M Vector Table soft relay"
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prompt "Enable Software Vector Relay"
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default n
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default y if BOOTLOADER_MCUBOOT
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depends on ARMV6_M && !(CPU_CORTEX_M0_HAS_VECTOR_TABLE_REMAP || CPU_CORTEX_M_HAS_VTOR)
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depends on ARMV6_M_ARMV8_M_BASELINE && !(CPU_CORTEX_M0_HAS_VECTOR_TABLE_REMAP || CPU_CORTEX_M_HAS_VTOR)
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help
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Add ARMv6-M Vector Table relay handler and relay vector table, to
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Add Vector Table relay handler and relay vector table, to
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relay interrupts based on a vector table pointer. This is only
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required for Cortex-M0 with no hardware vector table relocation
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mechanisms or for Cortex-M0+ with no VTOR and no other hardware
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required for Cortex-M0 (or an Armv8-M baseline core) with no hardware
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vector table relocation mechanisms or for Cortex-M0+
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(or an Armv8-M baseline core) with no VTOR and no other hardware
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relocation table mechanisms.
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endmenu
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@ -7,15 +7,16 @@
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/**
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* @file irq_relay.S
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*
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* @brief IRQ relay vector table and relay handler for Cortex-M0 SoC
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* @brief IRQ relay vector table and relay handler for Cortex-M0 or
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* Armv8-M baseline SoCs
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*
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* In Cortex-M0, the vector table address can not be changed. Once the
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* vector table is occupied by bootloader, there will be no IRQ support
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* in chainloaded image.
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* In certain ARMv6-M and Armv8-M baseline cores the vector table address can
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* not be changed. Once the * vector table is occupied by bootloader, there
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* will be no IRQ support in the chainloaded image.
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*
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* This program will link into bootloader, once an interrupt is coming,
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* bootloader can forward the interrupt to the chainloaded image. This
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* will support DFU on Cortex-M0 plantform.
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* the bootloader can forward the interrupt to the chainloaded image. This
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* will support DFU on those cores.
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*
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* Note: Currently support mcuboot only.
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* */
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@ -323,8 +323,8 @@ config BOOTLOADER_MCUBOOT
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* Setting TEXT_LOAD_OFFSET to a default value that allows space for
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the MCUboot image header
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* Activating SW_VECTOR_RELAY on Cortex-M0 targets with no built-in
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vector relocation mechanisms
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* Activating SW_VECTOR_RELAY on Cortex-M0 (or Armv8-M baseline)
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targets with no built-in vector relocation mechanisms
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* Including dts/common/mcuboot.overlay when building the Device
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Tree in order to place and link the image at the slot0 offset
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