arch: arm64: Add MPU drivers to the build system
When ARM_MPU is defined, the MPU drivers will be built into the final zephyr target. Signed-off-by: Haibo Xu <haibo.xu@arm.com> Signed-off-by: Jaxson Han <jaxson.han@arm.com>
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@ -33,4 +33,6 @@ if ((CONFIG_MP_NUM_CPUS GREATER 1) OR (CONFIG_SMP))
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zephyr_library_sources(smp.c)
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zephyr_library_sources(smp.c)
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endif ()
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endif ()
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add_subdirectory_ifdef(CONFIG_ARM_MPU cortex_r/mpu)
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zephyr_cc_option_ifdef(CONFIG_USERSPACE -mno-outline-atomics)
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zephyr_cc_option_ifdef(CONFIG_USERSPACE -mno-outline-atomics)
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@ -132,6 +132,8 @@ config ARMV8_R
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Protected Memory System Architecture (PMSA) based on a Memory Protection
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Protected Memory System Architecture (PMSA) based on a Memory Protection
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Unit (MPU). It supports the A32 and T32 instruction sets.
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Unit (MPU). It supports the A32 and T32 instruction sets.
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rsource "cortex_r/mpu/Kconfig"
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endif # CPU_AARCH64_CORTEX_R
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endif # CPU_AARCH64_CORTEX_R
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if CPU_CORTEX_A || CPU_AARCH64_CORTEX_R
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if CPU_CORTEX_A || CPU_AARCH64_CORTEX_R
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@ -8,6 +8,7 @@ choice
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config SOC_FVP_AEMV8R_AARCH64
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config SOC_FVP_AEMV8R_AARCH64
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bool "ARM FVP AEMv8R aarch64 simulation"
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bool "ARM FVP AEMv8R aarch64 simulation"
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select CPU_CORTEX_R82
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select CPU_CORTEX_R82
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select CPU_HAS_MPU
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select GIC_V3
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select GIC_V3
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select GIC_SINGLE_SECURITY_STATE
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select GIC_SINGLE_SECURITY_STATE
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