From f21aaeffaa5ed10629915a9d198ff483865f7be9 Mon Sep 17 00:00:00 2001
From: Gerson Fernando Budke <nandojve@gmail.com>
Date: Sat, 1 Feb 2020 14:12:51 -0300
Subject: [PATCH] soc: atmel: sam: Add spi pinmap

This add SPI pinmap definitions to spi0/1 for SAMV71 series.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
---
 soc/arm/atmel_sam/samv71/soc_pinmap.h | 48 +++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/soc/arm/atmel_sam/samv71/soc_pinmap.h b/soc/arm/atmel_sam/samv71/soc_pinmap.h
index a1d81e31ab1..73917edf493 100644
--- a/soc/arm/atmel_sam/samv71/soc_pinmap.h
+++ b/soc/arm/atmel_sam/samv71/soc_pinmap.h
@@ -136,4 +136,52 @@
 
 #define PINS_TWIHS2 {PIN_TWIHS2_TWCK, PIN_TWIHS2_TWD}
 
+/* Serial Peripheral Interface (SPI) */
+
+#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS0_PB2
+#define PIN_SPI0_CS0 {PIO_PB2D_SPI0_NPCS0,  PIOB, ID_PIOB, SOC_GPIO_FUNC_D}
+#endif
+#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PA31
+#define PIN_SPI0_CS1 {PIO_PA31A_SPI0_NPCS1, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
+#endif
+#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS1_PD25
+#define PIN_SPI0_CS1 {PIO_PD25B_SPI0_NPCS1, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
+#endif
+#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS2_PD12
+#define PIN_SPI0_CS2 {PIO_PD12C_SPI0_NPCS2, PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
+#endif
+#ifdef CONFIG_SPI_SAM_PORT_0_PIN_CS3_PD27
+#define PIN_SPI0_CS3 {PIO_PD27B_SPI0_NPCS3, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
+#endif
+
+#define PINS_SPI0_MASK \
+	(PIO_PD20B_SPI0_MISO | PIO_PD21B_SPI0_MOSI | PIO_PD22B_SPI0_SPCK)
+#define PINS_SPI0 {PINS_SPI0_MASK, PIOD, ID_PIOD, SOC_GPIO_FUNC_B}
+
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS0_PC25
+#define PIN_SPI1_CS0 {PIO_PC25C_SPI1_NPCS0, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
+#endif
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS1_PC28
+#define PIN_SPI1_CS1_PC28 {PIO_PC28C_SPI1_NPCS1, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
+#endif
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS1_PD0
+#define PIN_SPI1_CS1_PD0  {PIO_PD0C_SPI1_NPCS1,  PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
+#endif
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS2_PC29
+#define PIN_SPI1_CS2_PC29 {PIO_PC29C_SPI1_NPCS2, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
+#endif
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS2_PD1
+#define PIN_SPI1_CS2_PD1  {PIO_PD1C_SPI1_NPCS2,  PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
+#endif
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS3_PC30
+#define PIN_SPI1_CS3_PC30 {PIO_PC30C_SPI1_NPCS3, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
+#endif
+#ifdef CONFIG_SPI_SAM_PORT_1_PIN_CS3_PD2
+#define PIN_SPI1_CS3_PD2  {PIO_PD2C_SPI1_NPCS3,  PIOD, ID_PIOD, SOC_GPIO_FUNC_C}
+#endif
+
+#define PINS_SPI1_MASK \
+	(PIO_PC26C_SPI1_MISO | PIO_PC27C_SPI1_MOSI | PIO_PC24C_SPI1_SPCK)
+#define PINS_SPI1 {PINS_SPI1_MASK, PIOC, ID_PIOC, SOC_GPIO_FUNC_C}
+
 #endif /* _ATMEL_SAM_SOC_PINMAP_H_ */