From f1d78d8f3850a0cf9e28352d64a2bd8d083da130 Mon Sep 17 00:00:00 2001 From: Pushpal Sidhu Date: Mon, 4 Dec 2017 09:59:16 -0800 Subject: [PATCH] arm: st: add stm32l4r5xx support New parts from ST. See http://www.st.com/en/microcontrollers/stm32l4r5-s5.html for more details. Signed-off-by: Pushpal Sidhu --- dts/arm/st/l4/stm32l4r5.dtsi | 123 ++++++++++++++++++ dts/arm/st/l4/stm32l4r5Xi.dtsi | 18 +++ .../stm32l4/Kconfig.defconfig.stm32l4r5xx | 37 ++++++ soc/arm/st_stm32/stm32l4/Kconfig.soc | 3 + 4 files changed, 181 insertions(+) create mode 100644 dts/arm/st/l4/stm32l4r5.dtsi create mode 100644 dts/arm/st/l4/stm32l4r5Xi.dtsi create mode 100644 soc/arm/st_stm32/stm32l4/Kconfig.defconfig.stm32l4r5xx diff --git a/dts/arm/st/l4/stm32l4r5.dtsi b/dts/arm/st/l4/stm32l4r5.dtsi new file mode 100644 index 00000000000..3ffd4baee4a --- /dev/null +++ b/dts/arm/st/l4/stm32l4r5.dtsi @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2018 Pushpal Sidhu + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/ { + sram0: memory@20000000 { + reg = <0x20000000 DT_SIZE_K(640)>; + }; + + soc { + flash-controller@40022000 { + flash0: flash@8000000 { + erase-block-size = <4096>; + }; + }; + + pinctrl: pin-controller@48000000 { + gpiod: gpio@48000c00 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48000c00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000008>; + label = "GPIOD"; + }; + + gpioe: gpio@48001000 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48001000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>; + label = "GPIOE"; + }; + + gpiof: gpio@48001400 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48001400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000020>; + label = "GPIOF"; + }; + + gpiog: gpio@48001800 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48001800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000040>; + label = "GPIOG"; + }; + }; + + uart4: serial@40004c00 { + compatible = "st,stm32-uart"; + reg = <0x40004c00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>; + interrupts = <52 0>; + status = "disabled"; + label = "UART_4"; + }; + + uart5: serial@40005000 { + compatible = "st,stm32-uart"; + reg = <0x40005000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>; + interrupts = <53 0>; + status = "disabled"; + label = "UART_5"; + }; + + i2c3: i2c@40005C00 { + compatible = "st,stm32-i2c-v2"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40005C00 0x400>; + interrupts = <72 0>, <73 0>; + interrupt-names = "event", "error"; + status = "disabled"; + label= "I2C_3"; + }; + + i2c4: i2c@40008400 { + compatible = "st,stm32-i2c-v2"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40008400 0x400>; + interrupts = <83 0>, <84 0>; + interrupt-names = "event", "error"; + status = "disabled"; + label= "I2C_4"; + }; + + spi3: spi@40003C00 { + compatible = "st,stm32-spi-fifo"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40003C00 0x400>; + interrupts = <51 5>; + status = "disabled"; + label = "SPI_3"; + }; + + usbotg_fs: otgfs@50000000 { + compatible = "st,stm32-otgfs"; + reg = <0x50000000 0x40000>; + interrupts = <67 0>; + interrupt-names = "otgfs"; + num-bidir-endpoints = <6>; + ram-size = <1280>; + status = "disabled"; + label= "OTGFS"; + }; + }; +}; diff --git a/dts/arm/st/l4/stm32l4r5Xi.dtsi b/dts/arm/st/l4/stm32l4r5Xi.dtsi new file mode 100644 index 00000000000..9154d8820f8 --- /dev/null +++ b/dts/arm/st/l4/stm32l4r5Xi.dtsi @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2018 Pushpal Sidhu + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/ { + soc { + flash-controller@40022000 { + flash0: flash@8000000 { + reg = <0x08000000 DT_SIZE_K(2048)>; + }; + }; + }; +}; diff --git a/soc/arm/st_stm32/stm32l4/Kconfig.defconfig.stm32l4r5xx b/soc/arm/st_stm32/stm32l4/Kconfig.defconfig.stm32l4r5xx new file mode 100644 index 00000000000..30aa66ee3ad --- /dev/null +++ b/soc/arm/st_stm32/stm32l4/Kconfig.defconfig.stm32l4r5xx @@ -0,0 +1,37 @@ +# Kconfig - ST Microelectronics STM32L4R5xx MCU +# +# Copyright (c) 2018 Pushpal Sidhu +# +# SPDX-License-Identifier: Apache-2.0 +# + +if SOC_STM32L4R5XI + +config SOC + string + default "stm32l4r5xx" + +config NUM_IRQS + int + default 95 + +if GPIO_STM32 + +config GPIO_STM32_PORTD + def_bool y + +config GPIO_STM32_PORTE + default y + +config GPIO_STM32_PORTF + default y + +config GPIO_STM32_PORTG + default y + +config GPIO_STM32_PORTH + default y + +endif # GPIO_STM32 + +endif # SOC_STM32L4R5XI diff --git a/soc/arm/st_stm32/stm32l4/Kconfig.soc b/soc/arm/st_stm32/stm32l4/Kconfig.soc index 0b96d007328..5091347f5fa 100644 --- a/soc/arm/st_stm32/stm32l4/Kconfig.soc +++ b/soc/arm/st_stm32/stm32l4/Kconfig.soc @@ -25,4 +25,7 @@ config SOC_STM32L433XC config SOC_STM32L475XG bool "STM32L475XG" +config SOC_STM32L4R5XI + bool "STM32L4R5XI" + endchoice