boards: lpcxpresso55s69_cpu1 definitions

LPC55S69 CPU1 definition added.
Dual Core is not enabled!
Definitions related to dual core split of SoC's CPUs.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>

boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0.dts

@@ -64,10 +64,6 @@
 	status = "okay";
 };
 
-&blue_led {
-	status = "okay";
-};
-
 &red_led {
 	status = "okay";
 };

boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0_defconfig

@@ -14,3 +14,8 @@ CONFIG_CORTEX_M_SYSTICK=y
 CONFIG_GPIO=y
 CONFIG_PINMUX=y
 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
+
+# Enable TrustZone-M
+CONFIG_TRUSTED_EXECUTION_SECURE=y
+
+CONFIG_RUNTIME_NMI=y

boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu1.dts

@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2019, NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <nxp/nxp_lpc55S6x_ns.dtsi>
+#include "lpcxpresso55s69.dtsi"
+
+/ {
+	model = "NXP LPCXpresso55S69 board";
+	compatible = "nxp,lpc55xxx", "nxp,lpc";
+
+	cpus {
+		/delete-node/ cpu@0;
+	};
+
+	chosen {
+		zephyr,sram = &sram1;
+		zephyr,flash = &flash0;
+	};
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&blue_led {
+	status = "okay";
+};

boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu1.yaml

@@ -0,0 +1,18 @@
+#
+# Copyright (c) 2019, NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+identifier: lpcxpresso55s69_cpu0
+name: NXP LPCXpresso55S69
+type: mcu
+arch: arm
+ram: 64
+flash: 256
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+supported:
+  - gpio

boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu1_defconfig

@@ -0,0 +1,18 @@
+#
+# Copyright (c) 2019, NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+CONFIG_ARM=y
+CONFIG_SOC_SERIES_LPC55XXX=y
+CONFIG_BOARD_LPCXPRESSO55S69_CPU1=y
+CONFIG_CORTEX_M_SYSTICK=y
+CONFIG_GPIO=y
+CONFIG_PINMUX=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
+
+# Enable TrustZone-M
+CONFIG_TRUSTED_EXECUTION_NONSECURE=y
+
+CONFIG_RUNTIME_NMI=y

dts/arm/nxp/nxp_lpc55S6x_ns.dtsi

@@ -89,6 +89,17 @@
 			};
 		};
 
+		flash_reserved: flash@0009d800 {
+			compatible = "soc-nv-flash";
+			reg = <0x0009d800 DT_SIZE_K(10)>;
+			status = "disabled";
+		};
+
+		boot_rom: flash@3000000 {
+			compatible = "soc-nv-flash";
+			reg = <0x3000000 DT_SIZE_K(128)>;
+		};
+
 		usart0: usart@40086000 {
 			compatible = "nxp,lpc-usart";
 			reg = <0x40086000 0xe44>;