drivers: pinctrl: Add driver for smartbond

This adds pinctrl driver for Renesas SmartBond(tm) MCU family.

Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>

drivers/pinctrl/CMakeLists.txt

@@ -23,3 +23,4 @@ zephyr_library_sources_ifdef(CONFIG_PINCTRL_CC13XX_CC26XX pinctrl_cc13xx_cc26xx.
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_ESP32 pinctrl_esp32.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_RV32M1 pinctrl_rv32m1.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_XLNX_ZYNQ pinctrl_xlnx_zynq.c)
+zephyr_library_sources_ifdef(CONFIG_PINCTRL_SMARTBOND pinctrl_smartbond.c)

drivers/pinctrl/Kconfig

@@ -52,5 +52,6 @@ source "drivers/pinctrl/Kconfig.cc13xx_cc26xx"
 source "drivers/pinctrl/Kconfig.esp32"
 source "drivers/pinctrl/Kconfig.rv32m1"
 source "drivers/pinctrl/Kconfig.xlnx"
+source "drivers/pinctrl/Kconfig.smartbond"
 
 endif # PINCTRL

drivers/pinctrl/Kconfig.smartbond

@@ -0,0 +1,9 @@
+# Copyright (c) 2022 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+config PINCTRL_SMARTBOND
+	bool "Renesas SmartBond(tm) pinctrl driver"
+	default y
+	depends on DT_HAS_RENESAS_SMARTBOND_PINCTRL_ENABLED
+	help
+	  Enable pinctrl driver for Renesas SmartBond(tm) MCU family.

drivers/pinctrl/pinctrl_smartbond.c

@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2022, Renesas Electronics Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/drivers/pinctrl.h>
+#include <DA1469xAB.h>
+
+/** Utility macro to retrieve starting mode register and pin count for GPIO port from DT */
+#define GPIO_PORT_ENTRY(nodelabel)							\
+		{ DT_REG_ADDR_BY_IDX(DT_NODELABEL(nodelabel), 1),			\
+		  DT_PROP(DT_NODELABEL(nodelabel), ngpios) }
+
+struct gpio_port {
+	uint32_t p0_mode_addr;
+	uint8_t pin_count;
+};
+
+static const struct gpio_port smartbond_gpio_ports[] = {
+	GPIO_PORT_ENTRY(gpio0),
+	GPIO_PORT_ENTRY(gpio1),
+};
+
+static void pinctrl_configure_pin(const pinctrl_soc_pin_t *pin)
+{
+	volatile uint32_t *reg;
+	uint32_t reg_val;
+
+	__ASSERT_NO_MSG(pin->port < ARRAY_SIZE(smartbond_gpio_ports));
+	__ASSERT_NO_MSG(pin->pin < smartbond_gpio_ports[pin->port].pin_count);
+
+	reg = (volatile uint32_t *)smartbond_gpio_ports[pin->port].p0_mode_addr;
+	reg += pin->pin;
+
+	reg_val = pin->func << GPIO_P0_00_MODE_REG_PID_Pos;
+	if (pin->bias_pull_up) {
+		reg_val |= 0x01 << GPIO_P0_00_MODE_REG_PUPD_Pos;
+	} else if (pin->bias_pull_down) {
+		reg_val |= 0x02 << GPIO_P0_00_MODE_REG_PUPD_Pos;
+	}
+
+	*reg = reg_val;
+}
+
+int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
+			   uintptr_t reg)
+{
+	ARG_UNUSED(reg);
+
+	for (uint8_t i = 0U; i < pin_cnt; i++) {
+		pinctrl_configure_pin(pins++);
+	}
+
+	return 0;
+}

dts/arm/renesas/smartbond/da1469x.dtsi

@@ -24,6 +24,12 @@
 			compatible = "mmio-sram";
 		};
 
+		pinctrl: pin-controller@50020a00 {
+			compatible = "renesas,smartbond-pinctrl";
+			reg = <0x50020a00 0x100>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
 			gpio0: gpio@50020a00 {
 				compatible = "renesas,smartbond-gpio";
 				gpio-controller;
@@ -51,6 +57,7 @@
 			};
 		};
 	};
+};
 
 &nvic {
 	arm,num-irq-priority-bits = <4>;

dts/bindings/pinctrl/renesas,smartbond-pinctrl.yaml

@@ -0,0 +1,94 @@
+# Copyright (c) 2022 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+description: |
+    The SmartBond pin controller is a singleton node responsible for controlling
+    pin function selection and pin properties, such as routing a UART RX to pin
+    P1.8 and enabling the pullup resistor on that pin.
+
+    The node has the 'pinctrl' node label set in your SoC's devicetree,
+    so you can modify it like this:
+
+      &pinctrl {
+              /* your modifications go here */
+      };
+
+    All device pin configurations should be placed in child nodes of the
+    'pinctrl' node, as shown in this example:
+
+      /* You can put this in places like a board-pinctrl.dtsi file in
+       * your board directory, or a devicetree overlay in your application.
+       */
+
+     /* include definitions and utility macros for the SoC used by the board */
+     #include <dt-bindings/pinctrl/smartbond-pinctrl.h>
+
+      &pinctrl {
+        /* configuration for uart device, default state */
+        uart_default: uart_default {
+          /* group 1 */
+          group1 {
+            /* route UART TX to P0.9 */
+            pinmux = <SMARTBOND_PINMUX(UART_TX, 0, 9)>;
+          };
+          /* group 2 */
+          group2 {
+            /* route UART RX to P0.8 and enable pull-up */
+            pinmux = <SMARTBOND_PINMUX(UART_RX, 0, 8)>;
+            bias-pull-up;
+          };
+        };
+      };
+
+    The 'uart0_default' child node encodes the pin configurations for a
+    particular state of a device; in this case, the default (that is, active)
+    state.
+
+    As shown, pin configurations are organized in groups within each child node.
+    Each group can specify a list of pin function selections in the 'pinmux'
+    property. Note that 'pinmux' property is an array so you can configure multiple
+    pins at once there. The SMARTBOND_PINMUX macro is used to create pinmux value.
+
+    A group can also specify shared pin properties common to all the specified
+    pins, such as the 'bias-pull-up' property in group 2. Here is a list of
+    supported standard pin properties:
+
+    - bias-pull-up: Enable pull-up resistor.
+    - bias-pull-down: Enable pull-down resistor.
+
+    Note that bias options are mutually exclusive.
+
+    To link this pin configuration with a device, use a pinctrl-N property
+    for some number N, like this example you could place in your board's DTS
+    file:
+
+       #include "board-pinctrl.dtsi"
+
+       &uart {
+             pinctrl-0 = <&uart_default>;
+             pinctrl-names = "default";
+       };
+
+compatible: "renesas,smartbond-pinctrl"
+
+include:
+    - name: base.yaml
+    - name: pincfg-node-group.yaml
+      child-binding:
+        child-binding:
+          property-allowlist:
+            - bias-pull-down
+            - bias-pull-up
+
+child-binding:
+  description: |
+    Definitions for a pinctrl state.
+  child-binding:
+    properties:
+      pinmux:
+        required: true
+        type: array
+        description: |
+          An array of pins sharing the same group properties. The pins should
+          be defined using the SMARTBOND_PINMUX utility macro that encodes the port,
+          pin and function.

include/zephyr/dt-bindings/pinctrl/smartbond-pinctrl.h

@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2022, Renesas Electronics Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_SMARTBOND_PINCTRL_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_SMARTBOND_PINCTRL_H_
+
+/** Definitions of pin functions */
+#define SMARTBOND_FUNC_GPIO		0
+#define SMARTBOND_FUNC_UART_RX		1
+#define SMARTBOND_FUNC_UART_TX		2
+#define SMARTBOND_FUNC_UART2_RX		3
+#define SMARTBOND_FUNC_UART2_TX		4
+#define SMARTBOND_FUNC_UART2_CTSN	5
+#define SMARTBOND_FUNC_UART2_RTSN	6
+#define SMARTBOND_FUNC_UART3_RX		7
+#define SMARTBOND_FUNC_UART3_TX		8
+#define SMARTBOND_FUNC_UART3_CTSN	9
+#define SMARTBOND_FUNC_UART3_RTSN	10
+#define SMARTBOND_FUNC_ISO_CLK		11
+#define SMARTBOND_FUNC_ISO_DATA		12
+#define SMARTBOND_FUNC_SPI_DI		13
+#define SMARTBOND_FUNC_SPI_DO		14
+#define SMARTBOND_FUNC_SPI_CLK		15
+#define SMARTBOND_FUNC_SPI_EN		16
+#define SMARTBOND_FUNC_SPI2_DI		17
+#define SMARTBOND_FUNC_SPI2_DO		18
+#define SMARTBOND_FUNC_SPI2_CLK		19
+#define SMARTBOND_FUNC_SPI2_EN		20
+#define SMARTBOND_FUNC_I2C_SCL		21
+#define SMARTBOND_FUNC_I2C_SDA		22
+#define SMARTBOND_FUNC_I2C2_SCL		23
+#define SMARTBOND_FUNC_I2C2_SDA		24
+#define SMARTBOND_FUNC_USB_SOF		25
+#define SMARTBOND_FUNC_ADC		26
+#define SMARTBOND_FUNC_USB		27
+#define SMARTBOND_FUNC_PCM_DI		28
+#define SMARTBOND_FUNC_PCM_DO		29
+#define SMARTBOND_FUNC_PCM_FSC		30
+#define SMARTBOND_FUNC_PCM_CLK		31
+#define SMARTBOND_FUNC_PDM_DATA		32
+#define SMARTBOND_FUNC_PDM_CLK		33
+#define SMARTBOND_FUNC_COEX_EXT_ACT	34
+#define SMARTBOND_FUNC_COEX_SMART_ACT	35
+#define SMARTBOND_FUNC_COEX_SMART_PRI	36
+#define SMARTBOND_FUNC_PORT0_DCF	37
+#define SMARTBOND_FUNC_PORT1_DCF	38
+#define SMARTBOND_FUNC_PORT2_DCF	39
+#define SMARTBOND_FUNC_PORT3_DCF	40
+#define SMARTBOND_FUNC_PORT4_DCF	41
+#define SMARTBOND_FUNC_CLOCK		42
+#define SMARTBOND_FUNC_PG		43
+#define SMARTBOND_FUNC_LCD		44
+#define SMARTBOND_FUNC_LCD_SPI_DC	45
+#define SMARTBOND_FUNC_LCD_SPI_DO	46
+#define SMARTBOND_FUNC_LCD_SPI_CLK	47
+#define SMARTBOND_FUNC_LCD_SPI_EN	48
+#define SMARTBOND_FUNC_TIM_PWM		49
+#define SMARTBOND_FUNC_TIM2_PWM		50
+#define SMARTBOND_FUNC_TIM_1SHOT	51
+#define SMARTBOND_FUNC_TIM2_1SHOT	52
+#define SMARTBOND_FUNC_TIM3_PWM		53
+#define SMARTBOND_FUNC_TIM4_PWM		54
+
+/** Definitions of bit positions and bit masks in pinmux */
+#define SMARTBOND_PINMUX_PIN_POS	0
+#define SMARTBOND_PINMUX_PIN_MASK	0x1f
+#define SMARTBOND_PINMUX_PORT_POS	5
+#define SMARTBOND_PINMUX_PORT_MASK	0x01
+#define SMARTBOND_PINMUX_FUNC_POS	6
+#define SMARTBOND_PINMUX_FUNC_MASK	0xff
+
+/** Utility macro to create pinmux */
+#define SMARTBOND_PINMUX(func, port, pin)				\
+	(((SMARTBOND_FUNC_ ## func) << SMARTBOND_PINMUX_FUNC_POS) |	\
+	 ((port) << SMARTBOND_PINMUX_PORT_POS) |			\
+	 (pin) << SMARTBOND_PINMUX_PIN_POS)
+
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_SMARTBOND_PINCTRL_H_ */

soc/arm/renesas_smartbond/da1469x/pinctrl_soc.h

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2022 Renesas Electronics Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_SOC_ARM_RENESAS_SMARTBOND_DA1469X_PINCTRL_SOC_H_
+#define ZEPHYR_SOC_ARM_RENESAS_SMARTBOND_DA1469X_PINCTRL_SOC_H_
+
+#include <zephyr/dt-bindings/pinctrl/smartbond-pinctrl.h>
+
+struct smartbond_pinctrl_soc_pin {
+	uint32_t func : 6;
+	uint32_t port : 1;
+	uint32_t pin : 5;
+	uint32_t bias_pull_up : 1;
+	uint32_t bias_pull_down : 1;
+};
+
+typedef struct smartbond_pinctrl_soc_pin pinctrl_soc_pin_t;
+
+#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx)			\
+	{								\
+		SMARTBOND_GET_FUNC(DT_PROP_BY_IDX(node_id, prop, idx)),	\
+		SMARTBOND_GET_PORT(DT_PROP_BY_IDX(node_id, prop, idx)),	\
+		SMARTBOND_GET_PIN(DT_PROP_BY_IDX(node_id, prop, idx)),	\
+		DT_PROP(node_id, bias_pull_up),				\
+		DT_PROP(node_id, bias_pull_down),			\
+	},
+
+#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop)			\
+	{DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop),		\
+				DT_FOREACH_PROP_ELEM, pinmux,		\
+				Z_PINCTRL_STATE_PIN_INIT)}
+
+#define SMARTBOND_GET_FUNC(pinmux) \
+	(((pinmux) >> SMARTBOND_PINMUX_FUNC_POS) & SMARTBOND_PINMUX_FUNC_MASK)
+#define SMARTBOND_GET_PORT(pinmux) \
+	(((pinmux) >> SMARTBOND_PINMUX_PORT_POS) & SMARTBOND_PINMUX_PORT_MASK)
+#define SMARTBOND_GET_PIN(pinmux) \
+	(((pinmux) >> SMARTBOND_PINMUX_PIN_POS) & SMARTBOND_PINMUX_PIN_MASK)
+
+#endif /* ZEPHYR_SOC_ARM_RENESAS_SMARTBOND_DA1469X_PINCTRL_SOC_H_ */