boards/socs: Rename folders to have proper vendor prefix in
Replaces inaccurate or wrong vendor prefixes in board and soc folder names with those from thr vendor prefix file Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit is contained in:
Jamie McCrae
Carles Cufí
parent
6704557bf9
commit
f103c82c31
460 changed files with 0 additions and 10 deletions
9
boards/snps/em_starterkit/CMakeLists.txt
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9
boards/snps/em_starterkit/CMakeLists.txt
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@ -0,0 +1,9 @@
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# SPDX-License-Identifier: Apache-2.0
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# Copyright (c) 2017 Synopsys
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if((CONFIG_BOARD_EM_STARTERKIT_EMSK_EM9D OR CONFIG_BOARD_EM_STARTERKIT_EMSK_EM11D) AND "${BOARD_REVISION}" STREQUAL "2.2")
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message(FATAL_ERROR "Board revision 2.2 is not supported for this SoC")
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endif()
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zephyr_sources(pmodmux.c)
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zephyr_sources_ifdef(CONFIG_ARC_MPU_ENABLE arc_mpu_regions.c)
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13
boards/snps/em_starterkit/Kconfig.defconfig
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13
boards/snps/em_starterkit/Kconfig.defconfig
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@ -0,0 +1,13 @@
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# SPDX-License-Identifier: Apache-2.0
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# Copyright (c) 2017 Synopsys
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if BOARD_EM_STARTERKIT
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if I2C_DW
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config I2C_DW_CLOCK_SPEED
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default 100
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endif # I2C_DW
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endif # BOARD_EM_STARTERKIT
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17
boards/snps/em_starterkit/Kconfig.em_starterkit
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17
boards/snps/em_starterkit/Kconfig.em_starterkit
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@ -0,0 +1,17 @@
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# DesignWare ARC EM Starter Kit board configuration
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# Copyright (c) 2016 Synopsys, Inc. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_EM_STARTERKIT
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select SOC_EMSK
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select SOC_EMSK_EM7D if BOARD_EM_STARTERKIT_EMSK_EM7D
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select SOC_EMSK_EM9D if BOARD_EM_STARTERKIT_EMSK_EM9D
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select SOC_EMSK_EM11D if BOARD_EM_STARTERKIT_EMSK_EM11D
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help
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The DesignWare ARC EM Starter Kit board is a board
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that can host up to 3 different SOC FPGA bit files.
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Both version 2.2 and 2.3 firmware have EM7D, EM9D and EM11D configurations.
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EM9D using CCM memories and is a Harvard Architecture.
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EM7D and EM11D have access to 128MB DRAM and use i-cache and d-cache.
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EM7D of EMSK 2.3 supports secure mode.
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72
boards/snps/em_starterkit/arc_mpu_regions.c
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72
boards/snps/em_starterkit/arc_mpu_regions.c
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@ -0,0 +1,72 @@
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/*
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* Copyright (c) 2017 Synopsys
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/devicetree.h>
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#include <zephyr/arch/arc/v2/mpu/arc_mpu.h>
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#include <zephyr/linker/linker-defs.h>
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/*
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* for secure firmware, MPU entries are only set up for secure world.
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* All regions not listed here are shared by secure world and normal world.
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*/
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static struct arc_mpu_region mpu_regions[] = {
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#if DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0
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/* Region ICCM */
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MPU_REGION_ENTRY("ICCM",
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DT_REG_ADDR(DT_INST(0, arc_iccm)),
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DT_REG_SIZE(DT_INST(0, arc_iccm)),
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REGION_ROM_ATTR),
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#endif
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#if DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0
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/* Region DCCM */
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MPU_REGION_ENTRY("DCCM",
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DT_REG_ADDR(DT_INST(0, arc_dccm)),
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DT_REG_SIZE(DT_INST(0, arc_dccm)),
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REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC),
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#endif
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#if DT_REG_SIZE(DT_INST(0, arc_xccm)) > 0
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/* Region XCCM */
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MPU_REGION_ENTRY("XCCM",
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DT_REG_ADDR(DT_INST(0, arc_xccm)),
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DT_REG_SIZE(DT_INST(0, arc_xccm)),
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REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC),
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#endif
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#if DT_REG_SIZE(DT_INST(0, arc_yccm)) > 0
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/* Region YCCM */
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MPU_REGION_ENTRY("YCCM",
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DT_REG_ADDR(DT_INST(0, arc_yccm)),
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DT_REG_SIZE(DT_INST(0, arc_yccm)),
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REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC),
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#endif
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#if DT_REG_SIZE(DT_INST(0, mmio_sram)) > 0
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/* Region DDR RAM */
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MPU_REGION_ENTRY("DDR RAM",
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DT_REG_ADDR(DT_INST(0, mmio_sram)),
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DT_REG_SIZE(DT_INST(0, mmio_sram)),
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AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR | AUX_MPU_ATTR_UR |
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AUX_MPU_ATTR_KE | AUX_MPU_ATTR_UE | REGION_DYNAMIC),
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#endif
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/*
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* Region peripheral is shared by secure world and normal world by default,
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* no need a static mpu entry. If some peripherals belong to secure world,
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* add it here.
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*/
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#ifndef CONFIG_ARC_SECURE_FIRMWARE
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/* Region Peripheral */
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MPU_REGION_ENTRY("PERIPHERAL",
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0xF0000000,
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64 * 1024,
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REGION_KERNEL_RAM_ATTR)
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#endif
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};
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struct arc_mpu_config mpu_config = {
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.num_regions = ARRAY_SIZE(mpu_regions),
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.mpu_regions = mpu_regions,
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};
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7
boards/snps/em_starterkit/board.cmake
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7
boards/snps/em_starterkit/board.cmake
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@ -0,0 +1,7 @@
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# SPDX-License-Identifier: Apache-2.0
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# Copyright (c) 2017 Synopsys
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board_runner_args(openocd "--use-elf")
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board_runner_args(mdb-hw "--jtag=digilent")
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/mdb-hw.board.cmake)
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109
boards/snps/em_starterkit/board.dtsi
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109
boards/snps/em_starterkit/board.dtsi
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@ -0,0 +1,109 @@
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/* SPDX-License-Identifier: Apache-2.0 */
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/* Copyright (c) 2017 Synopsys */
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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aliases {
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led0 = &led0;
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led1 = &led1;
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led2 = &led2;
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led3 = &led3;
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led4 = &led4;
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led5 = &led5;
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led6 = &led6;
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led7 = &led7;
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led8 = &led8;
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sw0 = &button0;
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sw1 = &button1;
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sw2 = &button2;
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};
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leds {
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compatible = "gpio-leds";
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led0: led_0 {
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gpios = <&gpio1 0 0>;
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label = "LED 0";
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};
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led1: led_1 {
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gpios = <&gpio1 1 0>;
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label = "LED 1";
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};
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led2: led_2 {
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gpios = <&gpio1 2 0>;
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label = "LED 2";
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};
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led3: led_3 {
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gpios = <&gpio1 3 0>;
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label = "LED 3";
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};
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led4: led_4 {
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gpios = <&gpio1 4 0>;
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label = "LED 4";
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};
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led5: led_5 {
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gpios = <&gpio1 5 0>;
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label = "LED 5";
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};
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led6: led_6 {
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gpios = <&gpio1 6 0>;
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label = "LED 6";
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};
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led7: led_7 {
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gpios = <&gpio1 7 0>;
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label = "LED 7";
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};
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led8: led_8 {
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gpios = <&gpio1 8 0>;
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label = "LED 8";
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};
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};
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buttons {
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compatible = "gpio-keys";
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button0: button_0 {
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/* gpio flags need validation */
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gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
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label = "Push button switch 0";
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zephyr,code = <INPUT_KEY_0>;
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};
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button1: button_1 {
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/* gpio flags need validation */
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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label = "Push button switch 1";
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zephyr,code = <INPUT_KEY_1>;
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};
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button2: button_2 {
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/* gpio flags need validation */
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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label = "Push button switch 2";
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zephyr,code = <INPUT_KEY_2>;
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};
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switch0: switch_0 {
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/* gpio flags need validation */
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gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
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label = "DIP SW1 - Switch 1";
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zephyr,code = <INPUT_KEY_3>;
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};
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switch1: switch_1 {
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/* gpio flags need validation */
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gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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label = "DIP SW1 - Switch 2";
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zephyr,code = <INPUT_KEY_4>;
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};
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switch2: switch_2 {
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/* gpio flags need validation */
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gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
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label = "DIP SW1 - Switch 3";
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zephyr,code = <INPUT_KEY_5>;
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};
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switch3: switch_3 {
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/* gpio flags need validation */
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gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
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label = "DIP SW1 - Switch 4";
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zephyr,code = <INPUT_KEY_6>;
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};
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};
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};
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13
boards/snps/em_starterkit/board.yml
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13
boards/snps/em_starterkit/board.yml
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board:
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name: em_starterkit
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vendor: snps
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socs:
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- name: emsk_em7d
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- name: emsk_em9d
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- name: emsk_em11d
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revision:
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format: major.minor.patch
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default: "2.3"
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revisions:
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- name: "2.2"
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- name: "2.3"
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BIN
boards/snps/em_starterkit/doc/em_starterkit.jpg
Normal file
BIN
boards/snps/em_starterkit/doc/em_starterkit.jpg
Normal file
Binary file not shown.
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After Width: | Height: | Size: 34 KiB |
318
boards/snps/em_starterkit/doc/index.rst
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318
boards/snps/em_starterkit/doc/index.rst
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@ -0,0 +1,318 @@
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.. _em_starterkit:
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DesignWare(R) ARC(R) EM Starter Kit
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###################################
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Overview
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********
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The DesignWare(R) ARC(R) EM Starter Kit is a low-cost, versatile solution
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enabling rapid software development and software debugging, and profiling
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for the ARC EM Family of processors. The EM Family includes the EM4, EM6,
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EM5D, EM7D, EM9D, and EM11D cores. The Zephyr RTOS can be used with the
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EM Starter Kit.
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.. image:: em_starterkit.jpg
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:align: center
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:alt: DesignWare(R) ARC(R) EM Starter Kit (synopsys.com)
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The ARC EM Starter Kit consists of a hardware platform, including pre-installed
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FPGA images of different ARC EM processor configurations with peripherals.
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Documentation for this board can be found at `embARC website`_.
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See also this URL for details about the board:
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`Designware ARC EM Starter Kit website`_ .
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The latest version of EM Starter Kit is 2.3, developer can upgrade from
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2.0/2.1/2.2 to 2.3 using latest firmware.
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The default configuration for EM Starter Kit boards can be found in
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:zephyr_file:`boards/synopsys/em_starterkit/em_starterkit_defconfig`.
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The default SoC for this board supported in Zephyr is the EM9D.
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This configuration is a Harvard Architecture, with a separate
|
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instruction bus and data bus. Instruction memory is called ICCM
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and data memory is called DCCM. The configuration file for EM9D
|
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is found in :zephyr_file:`soc/synopsys/emsk/Kconfig.defconfig.em9d`.
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If you have a larger program, you can select the EM7D or EM11D, which gives
|
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access to 128KB DRAM with i-cache and d-cache. The configuration file for EM7D
|
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is found in :zephyr_file:`soc/synopsys/emsk/Kconfig.defconfig.em7d` and EM11D is
|
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found in :zephyr_file:`soc/synopsys/emsk/Kconfig.defconfig.em11d`.
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||||
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Hardware
|
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********
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Board Layout
|
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============
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The ARC EM Starter Kit main board has 6 Pmod connectors. These can be configured
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to support attachment of GPIO, I2C, UART or SPI devices.
|
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The board also has a 16MB SPI-FLASH and an SDCard for storage. There are 9 LEDs,
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3 buttons, and 4 dip switches that can be used with GPIO.
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The Xilinx Spartan(R)-6 LX150 FPGA can auto-load one of 3 FPGA SoC bit files
|
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which have the EM7D, EM9D, or EM11D SoC.
|
||||
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Documentation and general information for the board can be found at the
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`embARC website`_, which also includes some free sample software.
|
||||
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||||
|
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Supported Firmware Versions
|
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===========================
|
||||
|
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The EM Starter Kit has different versions, such as 1.0, 1.1, 2.0, 2.1,
|
||||
2.2 and 2.3.
|
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In Zephyr, only firmware versions 2.2 and 2.3 are supported.
|
||||
|
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Supported Features
|
||||
==================
|
||||
|
||||
The Zephyr kernel supports multiple hardware features on the EM Starter Kit
|
||||
through the use of device drivers.
|
||||
|
||||
The EM Starter Kit supports 6 Digilent Pmod(TM) Interfaces, which enables the
|
||||
use of a large variety of pluggable modules for storage, communications,
|
||||
sensors, displays, etc. With the Pmod interface, you can prototype your
|
||||
applications using the Zephyr RTOS.
|
||||
|
||||
The table below shows which drivers are supported and which functionality can
|
||||
be found on which architectures:
|
||||
|
||||
+-----------+------------+-----+-------+-----------------------+
|
||||
| Interface | Controller |EM9D | EM11D | Driver/Component |
|
||||
+===========+============+=====+=======+=======================+
|
||||
| INT | on-chip | Y | Y | interrupt_controller |
|
||||
+-----------+------------+-----+-------+-----------------------+
|
||||
| UART | usb + | Y | Y | serial port-polling; |
|
||||
| | 2 Pmods | | | serial port-interrupt |
|
||||
+-----------+------------+-----+-------+-----------------------+
|
||||
| SPI | 2 Pmods | Y | Y | spi |
|
||||
+-----------+------------+-----+-------+-----------------------+
|
||||
| ADC | n/a | N | N | adc (can add via Pmod)|
|
||||
+-----------+------------+-----+-------+-----------------------+
|
||||
| I2C | 2 Pmods | Y | Y | i2c |
|
||||
+-----------+------------+-----+-------+-----------------------+
|
||||
| GPIO | 6 Pmods | Y | Y | gpio |
|
||||
+-----------+------------+-----+-------+-----------------------+
|
||||
| PWM | n/a | N | N | pwm |
|
||||
+-----------+------------+-----+-------+-----------------------+
|
||||
|
||||
The board has 3 (debounced and interrupting) buttons for use with GPIO, 4 dip
|
||||
switches, 9 LEDs, SDCard on SPI, and a 16MB SPI-Flash memory.
|
||||
|
||||
The SPI-FLASH driver is supported with sample, which can be found in
|
||||
``samples/drivers/spi_flash``.
|
||||
|
||||
The SPI-Flash also holds 3 (or 4) separate FPGA CPU bit files, selectable via
|
||||
dip switch.
|
||||
|
||||
The SPI-Flash is also programmed with a bootloader. The bootloader can copy a
|
||||
program image from SPI-Flash into executable memory. Zephyr initialization will
|
||||
copy the initialized data section to the data memory if CONFIG_XIP is used.
|
||||
|
||||
|
||||
Programming and Debugging
|
||||
*************************
|
||||
|
||||
Required Hardware and Software
|
||||
==============================
|
||||
|
||||
To use Zephyr RTOS applications on the EM Starter Kit board, a few additional
|
||||
pieces of hardware are required.
|
||||
|
||||
* USB Cable (delivered as part of the ARC EM Starter Kit)
|
||||
|
||||
* The USB cable provides power to the board; however, if the board is to run
|
||||
standalone, the universal switching power adaptor (110-240V AC to 5V DC),
|
||||
provided in the package, can be used to power the board.
|
||||
|
||||
* :ref:`The Zephyr SDK <toolchain_zephyr_sdk>`
|
||||
|
||||
* Terminal emulator software for use with the USB-UART. Suggestion:
|
||||
`Putty Website`_.
|
||||
|
||||
* (optional) A collection of Pmods.
|
||||
See `Digilent Pmod Modules`_ or develop your custom interfaces to attach
|
||||
to the Pmod connector.
|
||||
|
||||
Set up the ARC EM Starter Kit
|
||||
=============================
|
||||
|
||||
To run Zephyr application on correct arc core of EM Starter Kit, you need to
|
||||
setup the board correctly.
|
||||
|
||||
* Connect the digilent usb cable from your host to the board.
|
||||
|
||||
* Connect the 5V DC power supply to your board.
|
||||
|
||||
* Select the core configuration of the board by choosing correct dip switch
|
||||
SW1 settings, then press then FPGA configure button located above the letter
|
||||
'C' of the ARC logo on the board.
|
||||
|
||||
* Then the board will be reconfigured with selected core configuration, you
|
||||
can download and debug Zephyr application now.
|
||||
|
||||
* If you want to know more about how to use this board, you can take a look
|
||||
at the `ARC EM Starter Kit User Guide`_.
|
||||
|
||||
Set up Zephyr Software
|
||||
======================
|
||||
|
||||
Since there are different firmware versions of EM Starter Kit, you need to
|
||||
choose the proper firmware version supported in Zephyr.
|
||||
|
||||
Three different configurations exist for this board:
|
||||
|
||||
* EM7D: em_starterkit_em7d_defconfig
|
||||
* EM9D: em_starterkit_defconfig
|
||||
* EM11D: em_starterkit_em11d_defconfig
|
||||
|
||||
|
||||
Building Sample Applications
|
||||
==============================
|
||||
|
||||
You can try many of the sample applications or tests, but let us discuss
|
||||
the one called :ref:`hello_world`.
|
||||
It is found in :zephyr_file:`samples/hello_world`.
|
||||
|
||||
Configuring
|
||||
-----------
|
||||
|
||||
You may need to write a prj_arc.conf file if the sample doesn't have one.
|
||||
Next, you can use the menuconfig rule to configure the target. By
|
||||
specifying ``em_starterkit`` as the board configuration, you can select the ARC
|
||||
EM Starter Kit board support for Zephyr.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: em_starterkit
|
||||
:zephyr-app: samples/hello_world
|
||||
:goals: menuconfig
|
||||
|
||||
On this board you will also need to consider the "ARC SoC Selection" and set
|
||||
it either to EM9D or EM11D. To boot up the EM9D on the board, all dip
|
||||
switches should be UP except for switch 1. Other configuration choices
|
||||
are made in the normal way. To boot up the EM11D on the board,
|
||||
all dip switches should be UP except for switch 2. Next press the button
|
||||
above the letter C in the "ARC" logo on the silkscreen.
|
||||
|
||||
Building
|
||||
--------
|
||||
|
||||
You can build application in the usual way. Refer to
|
||||
:ref:`build_an_application` for more details. Here is an example for
|
||||
:ref:`hello_world`.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: em_starterkit
|
||||
:zephyr-app: samples/hello_world
|
||||
:maybe-skip-config:
|
||||
:goals: build
|
||||
|
||||
Connecting Serial Output
|
||||
=========================
|
||||
|
||||
In the default configuration, Zephyr's EM Starter Kit images support
|
||||
serial output via the UART1 on the board. To enable serial output:
|
||||
|
||||
On your development environment, you will need to:
|
||||
|
||||
* Open a serial port emulator (i.e. on Linux minicom, putty, screen, etc)
|
||||
* Specify the tty driver name, for example, on Linux this may be :file:`/dev/ttyUSB1`
|
||||
* Set the communication settings to:
|
||||
|
||||
|
||||
========= =====
|
||||
Parameter Value
|
||||
========= =====
|
||||
Baud: 115200
|
||||
Data: 8 bits
|
||||
Parity: None
|
||||
Stopbits: 1
|
||||
========= =====
|
||||
|
||||
Debugging
|
||||
==========
|
||||
|
||||
Using the latest version of Zephyr SDK(>=0.9), you can debug and flash
|
||||
EM Starterkit directly.
|
||||
|
||||
One option is to build and debug the application using the usual
|
||||
Zephyr build system commands.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: em_starterkit
|
||||
:app: <my app>
|
||||
:goals: debug
|
||||
|
||||
At this point you can do your normal debug session. Set breakpoints and then
|
||||
'c' to continue into the program.
|
||||
|
||||
The other option is to launch a debug server, as follows.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: em_starterkit
|
||||
:app: <my app>
|
||||
:goals: debugserver
|
||||
|
||||
Then connect to the debug server at the EM Starter Kit from a second
|
||||
console, from the build directory containing the output :file:`zephyr.elf`.
|
||||
|
||||
.. code-block:: console
|
||||
|
||||
$ cd <my app>
|
||||
$ $ZEPHYR_SDK_INSTALL_DIR/arc-zephyr-elf/bin/arc-zephyr-elf-gdb zephyr.elf
|
||||
(gdb) target remote localhost:3333
|
||||
(gdb) load
|
||||
(gdb) b main
|
||||
(gdb) c
|
||||
|
||||
Flashing
|
||||
========
|
||||
|
||||
If you just want to download the application to the EM Starter Kit's CCM
|
||||
or DDR and run, you can do so in the usual way.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: em_starterkit
|
||||
:goals: flash
|
||||
|
||||
This command still uses openocd and gdb to load application elf file
|
||||
to EM Starter Kit, but it will load application and then run immediately.
|
||||
If power is lost, the application will also lost due to power loss.
|
||||
|
||||
Most of the time you will not be flashing your program but will instead
|
||||
debug it using openocd and gdb. The program can be download via the USB
|
||||
cable into the code and data memories.
|
||||
|
||||
When you are ready to deploy the program so that it boots up automatically
|
||||
on reset or power-up, you can follow the steps to place the program on
|
||||
SPI-FLASH.
|
||||
|
||||
For instructions on how to write your program to SPI-FLASH,
|
||||
refer to the documentation on the ARC EM Starter Kit at the
|
||||
`embARC website`_, which includes instructions for how to place an
|
||||
executable image onto the SPI-FLASH in such a way that it is understood
|
||||
by the bootloader.
|
||||
|
||||
Release Notes
|
||||
*************
|
||||
|
||||
The following is a list of TODO items:
|
||||
|
||||
* ``GH-2647``: Zephyr needs i-cache API (all targets)
|
||||
* ``GH-2230``: Zephyr ARC port doesn't yet support nested regular interrupts.
|
||||
* pinmux driver: Possibly it can be written to configure PMods too.
|
||||
|
||||
References
|
||||
**********
|
||||
|
||||
.. _embARC website: https://www.embarc.org
|
||||
|
||||
.. _Designware ARC EM Starter Kit website: https://www.synopsys.com/dw/ipdir.php?ds=arc_em_starter_kit
|
||||
|
||||
.. _Digilent Pmod Modules: http://store.digilentinc.com/pmod-modules
|
||||
|
||||
.. _Putty website: http://www.putty.org
|
||||
|
||||
.. _ARC EM Starter Kit User Guide: https://www.synopsys.com/dw/ipdir.php?ds=arc_em_starter_kit
|
||||
14
boards/snps/em_starterkit/em_starterkit_defconfig
Normal file
14
boards/snps/em_starterkit/em_starterkit_defconfig
Normal file
|
|
@ -0,0 +1,14 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
# Copyright (c) 2017 Synopsys
|
||||
|
||||
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
|
||||
CONFIG_XIP=n
|
||||
CONFIG_BUILD_NO_GAP_FILL=y
|
||||
CONFIG_BUILD_OUTPUT_BIN=n
|
||||
CONFIG_ARCV2_INTERRUPT_UNIT=y
|
||||
CONFIG_ARCV2_TIMER=y
|
||||
CONFIG_CONSOLE=y
|
||||
CONFIG_UART_CONSOLE=y
|
||||
CONFIG_SERIAL=y
|
||||
CONFIG_UART_INTERRUPT_DRIVEN=y
|
||||
CONFIG_GPIO=y
|
||||
54
boards/snps/em_starterkit/em_starterkit_emsk_em11d.dts
Normal file
54
boards/snps/em_starterkit/em_starterkit_emsk_em11d.dts
Normal file
|
|
@ -0,0 +1,54 @@
|
|||
/*
|
||||
* Copyright (c) 2018, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <mem.h>
|
||||
#include <synopsys/emsk.dtsi>
|
||||
#include "em_starterkit_r23.dtsi"
|
||||
#include "board.dtsi"
|
||||
|
||||
/ {
|
||||
model = "em_starterkit-em11d";
|
||||
compatible = "snps,em_starterkit-em11d", "snps,em_starterkit";
|
||||
|
||||
aliases {
|
||||
uart-0 = &uart0;
|
||||
uart-1 = &uart1;
|
||||
uart-2 = &uart2;
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &ddr0;
|
||||
zephyr,console = &uart1;
|
||||
zephyr,shell-uart = &uart1;
|
||||
};
|
||||
|
||||
iccm0: iccm@0 {
|
||||
compatible = "arc,iccm";
|
||||
reg = <0x0 DT_SIZE_K(64)>;
|
||||
};
|
||||
|
||||
dccm0: dccm@80000000 {
|
||||
compatible = "arc,dccm";
|
||||
reg = <0x80000000 DT_SIZE_K(64)>;
|
||||
};
|
||||
|
||||
xccm@c0000000 {
|
||||
compatible = "arc,xccm";
|
||||
reg = <0xc0000000 DT_SIZE_K(8)>;
|
||||
};
|
||||
|
||||
yccm@e0000000 {
|
||||
compatible = "arc,yccm";
|
||||
reg = <0xe0000000 DT_SIZE_K(8)>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
17
boards/snps/em_starterkit/em_starterkit_emsk_em11d.yaml
Normal file
17
boards/snps/em_starterkit/em_starterkit_emsk_em11d.yaml
Normal file
|
|
@ -0,0 +1,17 @@
|
|||
identifier: em_starterkit/emsk_em11d
|
||||
name: EM Starterkit EM11D
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
supported:
|
||||
- i2c
|
||||
- spi
|
||||
- gpio
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
5
boards/snps/em_starterkit/em_starterkit_emsk_em7d.dts
Normal file
5
boards/snps/em_starterkit/em_starterkit_emsk_em7d.dts
Normal file
|
|
@ -0,0 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2018, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
17
boards/snps/em_starterkit/em_starterkit_emsk_em7d.yaml
Normal file
17
boards/snps/em_starterkit/em_starterkit_emsk_em7d.yaml
Normal file
|
|
@ -0,0 +1,17 @@
|
|||
identifier: em_starterkit/emsk_em7d
|
||||
name: EM Starterkit EM7D
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
supported:
|
||||
- i2c
|
||||
- spi
|
||||
- gpio
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
/*
|
||||
* Copyright (c) 2018, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <mem.h>
|
||||
#include <synopsys/emsk.dtsi>
|
||||
#include "em_starterkit_r22.dtsi"
|
||||
#include "board.dtsi"
|
||||
|
||||
/ {
|
||||
model = "em_starterkit-em7d";
|
||||
compatible = "snps,em_starterkit-em7d", "snps,em_starterkit";
|
||||
|
||||
aliases {
|
||||
uart-0 = &uart0;
|
||||
uart-1 = &uart1;
|
||||
uart-2 = &uart2;
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &dccm0;
|
||||
zephyr,console = &uart1;
|
||||
zephyr,shell-uart = &uart1;
|
||||
};
|
||||
|
||||
iccm0: iccm@0 {
|
||||
compatible = "arc,iccm";
|
||||
reg = <0x0 DT_SIZE_K(256)>;
|
||||
};
|
||||
|
||||
dccm0: dccm@80000000 {
|
||||
compatible = "arc,dccm";
|
||||
reg = <0x80000000 DT_SIZE_K(128)>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
status = "okay";
|
||||
};
|
||||
17
boards/snps/em_starterkit/em_starterkit_emsk_em7d_2_2.yaml
Normal file
17
boards/snps/em_starterkit/em_starterkit_emsk_em7d_2_2.yaml
Normal file
|
|
@ -0,0 +1,17 @@
|
|||
identifier: em_starterkit@2.2/emsk_em7d
|
||||
name: EM Starterkit EM7D
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
supported:
|
||||
- i2c
|
||||
- spi
|
||||
- gpio
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
/*
|
||||
* Copyright (c) 2018, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <mem.h>
|
||||
#include <synopsys/emsk-sec.dtsi>
|
||||
#include "em_starterkit_r23.dtsi"
|
||||
#include "board.dtsi"
|
||||
|
||||
/ {
|
||||
model = "em_starterkit-em7d";
|
||||
compatible = "snps,em_starterkit-em7d", "snps,em_starterkit";
|
||||
|
||||
aliases {
|
||||
uart-0 = &uart0;
|
||||
uart-1 = &uart1;
|
||||
uart-2 = &uart2;
|
||||
spi-flash0 = &w25q128bv;
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &dccm0;
|
||||
zephyr,console = &uart1;
|
||||
zephyr,shell-uart = &uart1;
|
||||
};
|
||||
|
||||
iccm0: iccm@0 {
|
||||
compatible = "arc,iccm";
|
||||
reg = <0x0 DT_SIZE_K(256)>;
|
||||
};
|
||||
|
||||
dccm0: dccm@80000000 {
|
||||
compatible = "arc,dccm";
|
||||
reg = <0x80000000 DT_SIZE_K(128)>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
# Copyright (c) 2017 Synopsys
|
||||
|
||||
CONFIG_ARC_HAS_SECURE=y
|
||||
CONFIG_TRUSTED_EXECUTION_SECURE=y
|
||||
CONFIG_INIT_ARCH_HW_AT_BOOT=y
|
||||
|
|
@ -0,0 +1,4 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
# Copyright (c) 2017 Synopsys
|
||||
|
||||
CONFIG_ARC_MPU_ENABLE=y
|
||||
54
boards/snps/em_starterkit/em_starterkit_emsk_em9d.dts
Normal file
54
boards/snps/em_starterkit/em_starterkit_emsk_em9d.dts
Normal file
|
|
@ -0,0 +1,54 @@
|
|||
/*
|
||||
* Copyright (c) 2018, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <mem.h>
|
||||
#include <synopsys/emsk.dtsi>
|
||||
#include "em_starterkit_r23.dtsi"
|
||||
#include "board.dtsi"
|
||||
|
||||
/ {
|
||||
model = "em_starterkit-em9d";
|
||||
compatible = "snps,em_starterkit-em9d", "snps,em_starterkit";
|
||||
|
||||
aliases {
|
||||
uart-0 = &uart0;
|
||||
uart-1 = &uart1;
|
||||
uart-2 = &uart2;
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &dccm0;
|
||||
zephyr,console = &uart1;
|
||||
zephyr,shell-uart = &uart1;
|
||||
};
|
||||
|
||||
iccm0: iccm@0 {
|
||||
compatible = "arc,iccm";
|
||||
reg = <0x0 DT_SIZE_K(256)>;
|
||||
};
|
||||
|
||||
dccm0: dccm@80000000 {
|
||||
compatible = "arc,dccm";
|
||||
reg = <0x80000000 DT_SIZE_K(128)>;
|
||||
};
|
||||
|
||||
xccm@c0000000 {
|
||||
compatible = "arc,xccm";
|
||||
reg = <0xc0000000 DT_SIZE_K(8)>;
|
||||
};
|
||||
|
||||
yccm@e0000000 {
|
||||
compatible = "arc,yccm";
|
||||
reg = <0xe0000000 DT_SIZE_K(8)>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
17
boards/snps/em_starterkit/em_starterkit_emsk_em9d.yaml
Normal file
17
boards/snps/em_starterkit/em_starterkit_emsk_em9d.yaml
Normal file
|
|
@ -0,0 +1,17 @@
|
|||
identifier: em_starterkit/emsk_em9d
|
||||
name: EM Starterkit
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
supported:
|
||||
- i2c
|
||||
- spi
|
||||
- gpio
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
41
boards/snps/em_starterkit/em_starterkit_r22.dtsi
Normal file
41
boards/snps/em_starterkit/em_starterkit_r22.dtsi
Normal file
|
|
@ -0,0 +1,41 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Linaro Limited
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/ {
|
||||
soc {
|
||||
i2c@f0004000 {
|
||||
interrupts = <23 1>;
|
||||
};
|
||||
|
||||
i2c@f0005000 {
|
||||
interrupts = <24 1>;
|
||||
};
|
||||
|
||||
uart@f0008000 {
|
||||
interrupts = <27 1>;
|
||||
};
|
||||
|
||||
uart@f0009000 {
|
||||
interrupts = <28 1>;
|
||||
};
|
||||
|
||||
uart@f000a000 {
|
||||
interrupts = <29 1>;
|
||||
};
|
||||
|
||||
gpio@f0002000 {
|
||||
interrupts = <22 1>;
|
||||
};
|
||||
|
||||
spi@f0006000 {
|
||||
interrupts = <25 1>;
|
||||
};
|
||||
|
||||
spi@f0007000 {
|
||||
interrupts = <26 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
73
boards/snps/em_starterkit/em_starterkit_r23.dtsi
Normal file
73
boards/snps/em_starterkit/em_starterkit_r23.dtsi
Normal file
|
|
@ -0,0 +1,73 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Linaro Limited
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
spi-flash0 = &w25q128bv;
|
||||
};
|
||||
|
||||
soc {
|
||||
i2c@f0004000 {
|
||||
interrupts = <25 1>;
|
||||
};
|
||||
|
||||
i2c@f0005000 {
|
||||
interrupts = <26 1>;
|
||||
};
|
||||
|
||||
uart@f0008000 {
|
||||
interrupts = <29 1>;
|
||||
};
|
||||
|
||||
uart@f0009000 {
|
||||
interrupts = <30 1>;
|
||||
};
|
||||
|
||||
uart@f000a000 {
|
||||
interrupts = <31 1>;
|
||||
};
|
||||
|
||||
gpio@f0002000 {
|
||||
interrupts = <24 1>;
|
||||
};
|
||||
|
||||
creg_gpio: creg_gpio@f0000014 {
|
||||
compatible = "snps,creg-gpio";
|
||||
reg = <0xf0000014 0x4>;
|
||||
ngpios = <6>;
|
||||
bit_per_gpio = <1>;
|
||||
off_val = <0>;
|
||||
on_val = <1>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
spi@f0006000 {
|
||||
interrupts = <27 1>;
|
||||
cs-gpios = <&creg_gpio 0 GPIO_ACTIVE_HIGH>,
|
||||
<&creg_gpio 1 GPIO_ACTIVE_HIGH>,
|
||||
<&creg_gpio 2 GPIO_ACTIVE_HIGH>,
|
||||
<&creg_gpio 3 GPIO_ACTIVE_HIGH>,
|
||||
<&creg_gpio 4 GPIO_ACTIVE_HIGH>,
|
||||
<&creg_gpio 5 GPIO_ACTIVE_HIGH>;
|
||||
w25q128bv: w25q128bv@0 {
|
||||
compatible ="jedec,spi-nor";
|
||||
size = <0x8000000>;
|
||||
reg = <0>;
|
||||
spi-max-frequency = <20000000>;
|
||||
status = "okay";
|
||||
jedec-id = [ef 40 18];
|
||||
};
|
||||
};
|
||||
|
||||
spi@f0007000 {
|
||||
interrupts = <28 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
155
boards/snps/em_starterkit/pmodmux.c
Normal file
155
boards/snps/em_starterkit/pmodmux.c
Normal file
|
|
@ -0,0 +1,155 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Synopsys
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <zephyr/init.h>
|
||||
|
||||
#define PMODMUX_BASE_ADDR 0xF0000000
|
||||
|
||||
/*
|
||||
* 32-bits, offset 0x0, This register controls mapping of the peripheral device
|
||||
* signals on Pmod connectors
|
||||
*/
|
||||
#define PMOD_MUX_CTRL 0
|
||||
/* 32-bits, offset 0x4 */
|
||||
#define I2C_MAP_CTRL 1
|
||||
|
||||
/*
|
||||
* 32-bits, offset 0x8, SPI_MAP_CTRL[0] selects the mode of operation of the SPI
|
||||
* Slave: Normal operation, SPI_MAP_CTRL[0]=0: SPI Slave is connected to Pmod1
|
||||
* at connector J1. Loop-back mode, SPI_MAP_CTRL[0]=1: SPI Slave is connected to
|
||||
* the SPI Master inside the FPGA using CS4.
|
||||
*/
|
||||
#define SPI_MAP_CTRL 2
|
||||
/*
|
||||
* 32-bits, offset 0x8, This register controls the mapping of the UART signals
|
||||
* on the Pmod1 connector.
|
||||
*/
|
||||
#define UART_MAP_CTRL 3
|
||||
|
||||
#define BIT0 (0)
|
||||
#define BIT1 (1)
|
||||
#define BIT2 (2)
|
||||
#define BIT3 (3)
|
||||
#define PM1_OFFSET (0)
|
||||
#define PM2_OFFSET (4)
|
||||
#define PM3_OFFSET (8)
|
||||
#define PM4_OFFSET (12)
|
||||
#define PM5_OFFSET (16)
|
||||
#define PM6_OFFSET (20)
|
||||
#define PM7_OFFSET (24)
|
||||
|
||||
#define PM1_MASK (0xf << PM1_OFFSET)
|
||||
#define PM2_MASK (0xf << PM2_OFFSET)
|
||||
#define PM3_MASK (0xf << PM3_OFFSET)
|
||||
#define PM4_MASK (0xf << PM4_OFFSET)
|
||||
#define PM5_MASK (0xf << PM5_OFFSET)
|
||||
#define PM6_MASK (0xf << PM6_OFFSET)
|
||||
#define PM7_MASK (0xf << PM7_OFFSET)
|
||||
|
||||
#define SPI_MAP_NORMAL (0)
|
||||
#define SPI_MAP_LOOPBACK (1)
|
||||
|
||||
#define UART_MAP_TYPE4 (0xE4)
|
||||
#define UART_MAP_TYPE3 (0x6C)
|
||||
|
||||
/* all pins are configured as GPIO inputs */
|
||||
#define PMOD_MUX_CTRL_DEFAULT (0)
|
||||
/* normal SPI mode */
|
||||
#define SPI_MAP_CTRL_DEFAULT (SPI_MAP_NORMAL)
|
||||
/* TYPE4 PMOD compatible */
|
||||
#define UART_MAP_CTRL_DEFAULT (UART_MAP_TYPE4)
|
||||
|
||||
/* Pmod1[4:1] are connected to DW GPIO Port C[11:8] */
|
||||
#define PM1_UR_GPIO_C ((0 << BIT0) << PM1_OFFSET)
|
||||
/* Pmod1[4:1] are connected to DW UART0 signals */
|
||||
#define PM1_UR_UART_0 ((1 << BIT0) << PM1_OFFSET)
|
||||
|
||||
/* Pmod1[10:7] are connected to DW GPIO Port A[11:8] */
|
||||
#define PM1_LR_GPIO_A ((0 << BIT2) << PM1_OFFSET)
|
||||
/* Pmod1[10:7] are connected to DW SPI Slave signals */
|
||||
#define PM1_LR_SPI_S ((1 << BIT2) << PM1_OFFSET)
|
||||
/*
|
||||
* Pmod2[4:1] are connected to DW GPIO Port C[15:12],
|
||||
* Pmod2[10:7] are connected to DW GPIO Port A[15:12]
|
||||
*/
|
||||
#define PM2_GPIO_AC ((0 << BIT0) << PM2_OFFSET)
|
||||
/* connect I2C to Pmod2[4:1] and halt/run interface to Pmod2[10:7] */
|
||||
#define PM2_I2C_HRI ((1 << BIT0) << PM2_OFFSET)
|
||||
/*
|
||||
* Pmod3[4:1] are connected to DW GPIO Port C[19:16],
|
||||
* Pmod3[10:7] are connected to DW GPIO Port A[19:16]
|
||||
*/
|
||||
#define PM3_GPIO_AC ((0 << BIT0) << PM3_OFFSET)
|
||||
/*
|
||||
* Pmod3[4:3] are connected to DW I2C signals,
|
||||
* Pmod3[2:1] are connected to DW GPIO Port D[1:0],
|
||||
* Pmod3[10:7] are connected to DW GPIO Port D[3:2]
|
||||
*/
|
||||
#define PM3_I2C_GPIO_D ((1 << BIT0) << PM3_OFFSET)
|
||||
/*
|
||||
* Pmod4[4:1] are connected to DW GPIO Port C[23:20],
|
||||
* Pmod4[10:7] are connected to DW GPIO Port A[23:20]
|
||||
*/
|
||||
#define PM4_GPIO_AC ((0 << BIT0) << PM4_OFFSET)
|
||||
/*
|
||||
* Pmod4[4:3] are connected to DW I2C signals,
|
||||
* Pmod4[2:1] are connected to DW GPIO Port D[5:4],
|
||||
* Pmod4[10:7] are connected to DW GPIO Port D[7:6]
|
||||
*/
|
||||
#define PM4_I2C_GPIO_D ((1 << BIT0) << PM4_OFFSET)
|
||||
|
||||
/* Pmod5[4:1] are connected to DW GPIO Port C[27:24] */
|
||||
#define PM5_UR_GPIO_C ((0 << BIT0) << PM5_OFFSET)
|
||||
/* Pmod5[4:1] are connected to DW SPI Master signals using CS1_N */
|
||||
#define PM5_UR_SPI_M1 ((1 << BIT0) << PM5_OFFSET)
|
||||
/* Pmod5[10:7] are connected to DW GPIO Port A[27:24] */
|
||||
#define PM5_LR_GPIO_A ((0 << BIT2) << PM5_OFFSET)
|
||||
/* Pmod5[10:7] are connected to DW SPI Master signals using CS2_N */
|
||||
#define PM5_LR_SPI_M2 ((1 << BIT2) << PM5_OFFSET)
|
||||
|
||||
/* Pmod6[4:1] are connected to DW GPIO Port C[31:28] */
|
||||
#define PM6_UR_GPIO_C ((0 << BIT0) << PM6_OFFSET)
|
||||
/* Pmod6[4:1] are connected to DW SPI Master signals using CS0_N */
|
||||
#define PM6_UR_SPI_M0 ((1 << BIT0) << PM6_OFFSET)
|
||||
/* Pmod6[10:7] are connected to DW GPIO Port A[31:28] */
|
||||
#define PM6_LR_GPIO_A ((0 << BIT2) << PM6_OFFSET)
|
||||
/*
|
||||
* Pmod6[8:7] are connected to the DW SPI Master chip select signals CS1_N and
|
||||
* CS2_N, Pmod6[6:5] are connected to the ARC EM halt and sleep status signals
|
||||
*/
|
||||
#define PM6_LR_CSS_STAT ((1 << BIT2) << PM6_OFFSET)
|
||||
|
||||
|
||||
static int pmod_mux_init(void)
|
||||
{
|
||||
volatile uint32_t *mux_regs = (uint32_t *)(PMODMUX_BASE_ADDR);
|
||||
|
||||
mux_regs[SPI_MAP_CTRL] = SPI_MAP_CTRL_DEFAULT;
|
||||
mux_regs[UART_MAP_CTRL] = UART_MAP_CTRL_DEFAULT;
|
||||
|
||||
/**
|
||||
* + Please refer to corresponding EMSK User Guide for detailed
|
||||
* information -> Appendix: A Hardware Functional Description ->
|
||||
* Pmods Configuration summary
|
||||
* + Set up pin-multiplexer of all PMOD connections
|
||||
* - PM1 J1: Upper row as UART 0, lower row as SPI Slave
|
||||
* - PM2 J2: IIC 0 and run/halt signals
|
||||
* - PM3 J3: GPIO Port A and Port C
|
||||
* - PM4 J4: IIC 1 and Port D
|
||||
* - PM5 J5: Upper row as SPI Master, lower row as Port A
|
||||
* - PM6 J6: Upper row as SPI Master, lower row as Port A
|
||||
*/
|
||||
mux_regs[PMOD_MUX_CTRL] = PM1_UR_UART_0 | PM1_LR_SPI_S
|
||||
| PM2_I2C_HRI | PM3_GPIO_AC
|
||||
| PM4_I2C_GPIO_D | PM5_UR_SPI_M1
|
||||
| PM5_LR_GPIO_A | PM6_UR_SPI_M0
|
||||
| PM6_LR_GPIO_A;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
SYS_INIT(pmod_mux_init, PRE_KERNEL_1,
|
||||
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
|
||||
24
boards/snps/em_starterkit/support/openocd.cfg
Normal file
24
boards/snps/em_starterkit/support/openocd.cfg
Normal file
|
|
@ -0,0 +1,24 @@
|
|||
# Configure JTAG cable
|
||||
# EM Starter Kit has built-in FT2232 chip, which is similar to Digilent HS-1.
|
||||
adapter driver ftdi
|
||||
ftdi vid_pid 0x0403 0x6010
|
||||
# channel 1 does not have any functionality
|
||||
ftdi channel 0
|
||||
# just TCK TDI TDO TMS, no reset
|
||||
ftdi layout_init 0x0088 0x008b
|
||||
reset_config none
|
||||
|
||||
# Only specify FTDI serial number if it is specified via
|
||||
# "set _ZEPHYR_BOARD_SERIAL 12345" before reading this script
|
||||
if { [info exists _ZEPHYR_BOARD_SERIAL] } {
|
||||
ftdi_serial $_ZEPHYR_BOARD_SERIAL
|
||||
}
|
||||
|
||||
# EM11D reportedly requires 5 MHz. Other cores and board can work faster.
|
||||
adapter speed 5000
|
||||
|
||||
# ARCs support only JTAG.
|
||||
transport select jtag
|
||||
|
||||
# Configure FPGA. This script supports both LX45 and LX150.
|
||||
source [find target/snps_em_sk_fpga.cfg]
|
||||
4
boards/snps/emsdp/CMakeLists.txt
Normal file
4
boards/snps/emsdp/CMakeLists.txt
Normal file
|
|
@ -0,0 +1,4 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
zephyr_sources_ifdef(CONFIG_ARC_MPU_ENABLE arc_mpu_regions.c)
|
||||
zephyr_sources(platform.c)
|
||||
15
boards/snps/emsdp/Kconfig.defconfig
Normal file
15
boards/snps/emsdp/Kconfig.defconfig
Normal file
|
|
@ -0,0 +1,15 @@
|
|||
# DesignWare ARC EM Software Development Platform board configuration
|
||||
|
||||
# Copyright (c) 2019 Synopsys, Inc. All rights reserved.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
if BOARD_EMSDP
|
||||
|
||||
if SPI
|
||||
|
||||
config SPI_DW
|
||||
default y
|
||||
|
||||
endif # SPI
|
||||
|
||||
endif # BOARD_EMSDP
|
||||
21
boards/snps/emsdp/Kconfig.emsdp
Normal file
21
boards/snps/emsdp/Kconfig.emsdp
Normal file
|
|
@ -0,0 +1,21 @@
|
|||
# DesignWare ARC EM Software Development Platform board configuration
|
||||
|
||||
# Copyright (c) 2019 Synopsys, Inc. All rights reserved.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
config BOARD_EMSDP
|
||||
select SOC_ARC_EMSDP
|
||||
select SOC_EMSDP_EM4 if BOARD_EMSDP_EMSDP_EM4
|
||||
select SOC_EMSDP_EM5D if BOARD_EMSDP_EMSDP_EM5D
|
||||
select SOC_EMSDP_EM6 if BOARD_EMSDP_EMSDP_EM6
|
||||
select SOC_EMSDP_EM7D if BOARD_EMSDP_EMSDP_EM7D
|
||||
select SOC_EMSDP_EM7D_ESP if BOARD_EMSDP_EMSDP_EM7D_ESP
|
||||
select SOC_EMSDP_EM9D if BOARD_EMSDP_EMSDP_EM9D
|
||||
select SOC_EMSDP_EM11D if BOARD_EMSDP_EMSDP_EM11D
|
||||
help
|
||||
The ARC EM Software Development Platform (emsdp) is an FPGA based
|
||||
development platform intended to support ARC licenses in developing
|
||||
their software for the ARC EM processor family and ARC EM Subsystems.
|
||||
It has the support for ARC EM4, EM5D, EM6, EM7D, EM9D and EM11D
|
||||
processors. ARC EM Enhanced Security Package (ESP) and ARC EM
|
||||
Subsystems (DFSS, SCSS, DSS) are also supported.
|
||||
53
boards/snps/emsdp/arc_mpu_regions.c
Normal file
53
boards/snps/emsdp/arc_mpu_regions.c
Normal file
|
|
@ -0,0 +1,53 @@
|
|||
/*
|
||||
* Copyright (c) 2019 Synopsys
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <zephyr/devicetree.h>
|
||||
#include <zephyr/arch/arc/v2/mpu/arc_mpu.h>
|
||||
#include <zephyr/linker/linker-defs.h>
|
||||
|
||||
static struct arc_mpu_region mpu_regions[] = {
|
||||
/* Region ICCM */
|
||||
MPU_REGION_ENTRY("ICCM",
|
||||
DT_REG_ADDR(DT_INST(0, arc_iccm)),
|
||||
DT_REG_SIZE(DT_INST(0, arc_iccm)),
|
||||
REGION_ROM_ATTR),
|
||||
/* Region DCCM */
|
||||
MPU_REGION_ENTRY("DCCM",
|
||||
DT_REG_ADDR(DT_INST(0, arc_dccm)),
|
||||
DT_REG_SIZE(DT_INST(0, arc_dccm)),
|
||||
REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC),
|
||||
/* Region XCCM */
|
||||
#if DT_REG_SIZE(DT_INST(0, arc_xccm)) > 0
|
||||
MPU_REGION_ENTRY("XCCM",
|
||||
DT_REG_ADDR(DT_INST(0, arc_xccm)),
|
||||
DT_REG_SIZE(DT_INST(0, arc_xccm)),
|
||||
REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC),
|
||||
#endif
|
||||
/* Region YCCM */
|
||||
#if DT_REG_SIZE(DT_INST(0, arc_yccm)) > 0
|
||||
MPU_REGION_ENTRY("YCCM",
|
||||
DT_REG_ADDR(DT_INST(0, arc_yccm)),
|
||||
DT_REG_SIZE(DT_INST(0, arc_yccm)),
|
||||
REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC),
|
||||
#endif
|
||||
/* Region DDR RAM */
|
||||
MPU_REGION_ENTRY("SRAM",
|
||||
DT_REG_ADDR(DT_INST(0, mmio_sram)),
|
||||
DT_REG_SIZE(DT_INST(0, mmio_sram)),
|
||||
REGION_KERNEL_RAM_ATTR |
|
||||
AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR | AUX_MPU_ATTR_UR |
|
||||
AUX_MPU_ATTR_KE | AUX_MPU_ATTR_UE | REGION_DYNAMIC),
|
||||
/* Region Peripheral */
|
||||
MPU_REGION_ENTRY("PERIPHERAL",
|
||||
0xF0000000,
|
||||
32 * 1024 * 1024,
|
||||
REGION_KERNEL_RAM_ATTR),
|
||||
};
|
||||
|
||||
struct arc_mpu_config mpu_config = {
|
||||
.num_regions = ARRAY_SIZE(mpu_regions),
|
||||
.mpu_regions = mpu_regions,
|
||||
};
|
||||
6
boards/snps/emsdp/board.cmake
Normal file
6
boards/snps/emsdp/board.cmake
Normal file
|
|
@ -0,0 +1,6 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
board_runner_args(openocd "--use-elf")
|
||||
board_runner_args(mdb-hw "--jtag=digilent")
|
||||
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
|
||||
include(${ZEPHYR_BASE}/boards/common/mdb-hw.board.cmake)
|
||||
85
boards/snps/emsdp/board.dtsi
Normal file
85
boards/snps/emsdp/board.dtsi
Normal file
|
|
@ -0,0 +1,85 @@
|
|||
/* SPDX-License-Identifier: Apache-2.0 */
|
||||
|
||||
#include <zephyr/dt-bindings/input/input-event-codes.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
led2 = &led2;
|
||||
led3 = &led3;
|
||||
led4 = &led4;
|
||||
led5 = &led5;
|
||||
led6 = &led6;
|
||||
led7 = &led7;
|
||||
sw0 = &switch0;
|
||||
sw1 = &switch1;
|
||||
sw2 = &switch2;
|
||||
sw2 = &switch3;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
led0: led_0 {
|
||||
gpios = <&gpio1 0 0>;
|
||||
label = "LED 0";
|
||||
};
|
||||
led1: led_1 {
|
||||
gpios = <&gpio1 1 0>;
|
||||
label = "LED 1";
|
||||
};
|
||||
led2: led_2 {
|
||||
gpios = <&gpio1 2 0>;
|
||||
label = "LED 2";
|
||||
};
|
||||
led3: led_3 {
|
||||
gpios = <&gpio1 3 0>;
|
||||
label = "LED 3";
|
||||
};
|
||||
led4: led_4 {
|
||||
gpios = <&gpio1 4 0>;
|
||||
label = "LED 4";
|
||||
};
|
||||
led5: led_5 {
|
||||
gpios = <&gpio1 5 0>;
|
||||
label = "LED 5";
|
||||
};
|
||||
led6: led_6 {
|
||||
gpios = <&gpio1 6 0>;
|
||||
label = "LED 6";
|
||||
};
|
||||
led7: led_7 {
|
||||
gpios = <&gpio1 7 0>;
|
||||
label = "LED 7";
|
||||
};
|
||||
};
|
||||
|
||||
buttons {
|
||||
compatible = "gpio-keys";
|
||||
switch0: switch_0 {
|
||||
/* gpio flags need validation */
|
||||
gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
|
||||
label = "DIP SW1 - Switch 1";
|
||||
zephyr,code = <INPUT_KEY_0>;
|
||||
};
|
||||
switch1: switch_1 {
|
||||
/* gpio flags need validation */
|
||||
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
|
||||
label = "DIP SW1 - Switch 2";
|
||||
zephyr,code = <INPUT_KEY_1>;
|
||||
};
|
||||
switch2: switch_2 {
|
||||
/* gpio flags need validation */
|
||||
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
|
||||
label = "DIP SW1 - Switch 3";
|
||||
zephyr,code = <INPUT_KEY_2>;
|
||||
};
|
||||
switch3: switch_3 {
|
||||
/* gpio flags need validation */
|
||||
gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
|
||||
label = "DIP SW1 - Switch 4";
|
||||
zephyr,code = <INPUT_KEY_3>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
11
boards/snps/emsdp/board.yml
Normal file
11
boards/snps/emsdp/board.yml
Normal file
|
|
@ -0,0 +1,11 @@
|
|||
board:
|
||||
name: emsdp
|
||||
vendor: snps
|
||||
socs:
|
||||
- name: emsdp_em4
|
||||
- name: emsdp_em5d
|
||||
- name: emsdp_em6
|
||||
- name: emsdp_em7d
|
||||
- name: emsdp_em7d_esp
|
||||
- name: emsdp_em9d
|
||||
- name: emsdp_em11d
|
||||
BIN
boards/snps/emsdp/doc/emsdp.jpg
Normal file
BIN
boards/snps/emsdp/doc/emsdp.jpg
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 61 KiB |
286
boards/snps/emsdp/doc/index.rst
Normal file
286
boards/snps/emsdp/doc/index.rst
Normal file
|
|
@ -0,0 +1,286 @@
|
|||
.. _emsdp:
|
||||
|
||||
DesignWare(R) ARC(R) EM Software Development Platform
|
||||
#####################################################
|
||||
|
||||
Overview
|
||||
********
|
||||
|
||||
The DesignWare® ARC® EM Software Development Platform (SDP) is a flexible platform
|
||||
for rapid software development on ARC EM processor-based subsystems. It is intended
|
||||
to accelerate software development and debug of ARC EM processors and subsystems for
|
||||
a wide range of ultra-low power embedded applications such as IoT, sensor fusion,
|
||||
and voice applications.
|
||||
|
||||
.. image:: emsdp.jpg
|
||||
:align: center
|
||||
:alt: DesignWare(R) ARC(R) EM Software Development Platform (synopsys.com)
|
||||
|
||||
For details about the board, see: `DesignWare ARC EM Software Development Platform
|
||||
(EM SDP) <https://www.synopsys.com/dw/ipdir.php?ds=arc-em-software-development-platform>`__
|
||||
|
||||
|
||||
Hardware
|
||||
********
|
||||
|
||||
The EM Software Development Platform supports different core configurations, such as EM4,
|
||||
EM5D, EM6, EM7D, EM7D+ESP, EM9D, EM11D. The core must be supplied as the variant of the base
|
||||
board which takes the form ``emsdp/<core>`` whereby core is ``emsdp_em4`` for EM4,
|
||||
``emsdp_em5D`` for EM5D, ``emsdp_em6`` for EM6, ``emsdp_em7d`` for EM7D, ``emsdp_em7d_esp``
|
||||
for EM7D+ESP, ``emsdp_em9d`` for EM9D and ``emsdp_em11d`` for EM11D.
|
||||
|
||||
The following table shows the hardware features supported for different core configuration:
|
||||
|
||||
+-----------+-----+-----+------+------+----------+------+-------+
|
||||
| Features | EM4 | EM6 | EM5D | EM7D | EM7D_ESP | EM9D | EM11D |
|
||||
+===========+=====+=====+======+======+==========+======+=======+
|
||||
| Caches | N | Y | N | Y | Y | N | Y |
|
||||
+-----------+-----+-----+------+------+----------+------+-------+
|
||||
| DSP | N | N | Y | Y | Y | Y | Y |
|
||||
+-----------+-----+-----+------+------+----------+------+-------+
|
||||
| XY Memory | N | N | N | N | N | Y | Y |
|
||||
+-----------+-----+-----+------+------+----------+------+-------+
|
||||
| Secure | N | N | N | N | Y | N | N |
|
||||
+-----------+-----+-----+------+------+----------+------+-------+
|
||||
|
||||
The table below shows which drivers are currently available in Zephyr.
|
||||
|
||||
+-----------+------------+-------+-----------------------+
|
||||
| Interface | Controller | EMSDP | Driver/Component |
|
||||
+===========+============+=======+=======================+
|
||||
| SDIO | on-chip | N | SD-card controller |
|
||||
+-----------+------------+-------+-----------------------+
|
||||
| UART | Arduino + | Y | serial port-polling; |
|
||||
| | 3 Pmods | | serial port-interrupt |
|
||||
+-----------+------------+-------+-----------------------+
|
||||
| SPI | Arduino + | Y | spi |
|
||||
| | Pmod + adc | | |
|
||||
+-----------+------------+-------+-----------------------+
|
||||
| ADC | 1 Pmod | N | adc (via spi) |
|
||||
+-----------+------------+-------+-----------------------+
|
||||
| I2C | Arduino + | N | i2c |
|
||||
| | Pmod | | |
|
||||
+-----------+------------+-------+-----------------------+
|
||||
| GPIO | Arduino + | Y | gpio |
|
||||
| | Pmod + Pin | | |
|
||||
+-----------+------------+-------+-----------------------+
|
||||
| PWM | Arduino + | N | pwm |
|
||||
| | Pmod | | |
|
||||
+-----------+------------+-------+-----------------------+
|
||||
| I2S | on-chip | N | Audio interface |
|
||||
+-----------+------------+-------+-----------------------+
|
||||
|
||||
Support two 32 MByte Quad-SPI Flash memory, one only contains FPGA image, the other
|
||||
one is user SPI-FLASH, which is connected via SPI bus and its sample can be found in
|
||||
``samples/drivers/spi_flash``.
|
||||
|
||||
To configure the FPGA, The ARC EM SDP offers a single USB 2.0 host port, which is
|
||||
both used to access the FPGAs configuration memory and as a DEBUG/ UART port.
|
||||
|
||||
When connected using the USB cable to a PC, the ARC EM SDP presents itself as a mass
|
||||
storage device. This allows an FPGA configuration bitstream to be dragged and dropped into
|
||||
the configuration memory. The FPGA bitstream is automatically loaded into the FPGA device
|
||||
upon power-on reset, or when the configuration button is pressed.
|
||||
|
||||
For hardware feature details, refer to : `ARC EM Software Development Platform
|
||||
<https://embarc.org/project/arc-em-software-development-platform-sdp/>`__
|
||||
|
||||
Peripheral driver test and sample
|
||||
=================================
|
||||
|
||||
``tests/drivers/spi/spi_loopback``: verify DesignWare SPI driver. No need to connect
|
||||
MISO with MOSI, DW SPI register is configured to internally connect them. This test
|
||||
use two different speed to verify data transfer with asynchronous functionality.
|
||||
Note: DW SPI only available on SPI0 and SPI1.
|
||||
|
||||
``samples/drivers/spi_flash``: Verfiy DW SPI and SPI-FLASH on SPI1. First erase the
|
||||
whole flash then write 4 byte data to the flash. Read from the flash and compare the
|
||||
result with buffer to check functionality.
|
||||
|
||||
Pinmux interface
|
||||
================
|
||||
|
||||
The following pinmux peripheral module standards are supported:
|
||||
|
||||
* Digilent Pmod (3x)
|
||||
|
||||
The ARC EM SDP features three 12-pin Pmod connectors: Pmod_A, Pmod_B, and Pmod_C.
|
||||
The functionality of the Pmod connectors is programmable and includes GPIO, UART, SPI,
|
||||
I2C, and PWM (Note: support two type UART Pmod interface: UARTA is newer version).
|
||||
Multiplexing is controlled by software using the PMOD_MUX_CTRL register.
|
||||
|
||||
* Arduino (1x)
|
||||
|
||||
The ARC EM SDP provides an Arduino shield interface. Multiplexing is controlled by software
|
||||
using the ARDUINO_MUX_CTRL register. Note: some IO must be programmed in group and can't be
|
||||
set individually, for details see Table 9 in `EM Software Development Platform user guide`_.
|
||||
|
||||
* MikroBUS (1x)
|
||||
|
||||
Note that since the controllers that are mapped to the MikroBUS are shared with the Arduino
|
||||
controllers, and therefore the MikroBUS functions are only available when the Arduino
|
||||
multiplexer ARDUINO_MUX_CTRL is in the default mode (GPIO).
|
||||
|
||||
Programming and Debugging
|
||||
*************************
|
||||
|
||||
Required Hardware and Software
|
||||
==============================
|
||||
|
||||
To use Zephyr RTOS applications on the EM Software Development Platform board,
|
||||
a few additional pieces of hardware are required.
|
||||
|
||||
* A micro USB cable to connect the computer.
|
||||
|
||||
* A universal switching power adaptor (110-240V AC to 12 DC),
|
||||
provided in the package, which used to power the board.
|
||||
|
||||
* :ref:`The Zephyr SDK <toolchain_zephyr_sdk>`
|
||||
|
||||
* Terminal emulator software for use with the USB-UART. Suggestion:
|
||||
`Putty Website`_.
|
||||
|
||||
* (optional) A collection of Pmods, Arduino modules, or Mikro modules.
|
||||
See `Digilent Pmod Modules`_ or develop your custom interfaces to attach
|
||||
to the Pmod connector.
|
||||
|
||||
Set up the EM Software Development Platform
|
||||
===========================================
|
||||
|
||||
To run Zephyr application on EM Software Development Platform, you need to
|
||||
setup the board correctly.
|
||||
|
||||
* Connect the 12V DC power supply to your board.
|
||||
|
||||
* Connect the digilent usb cable from your host to the board.
|
||||
|
||||
Set up Zephyr Software
|
||||
======================
|
||||
|
||||
Building Sample Applications
|
||||
==============================
|
||||
|
||||
You can try many of the sample applications or tests, but let us discuss
|
||||
the one called :ref:`hello_world`.
|
||||
It is found in :zephyr_file:`samples/hello_world`.
|
||||
|
||||
Configuring
|
||||
-----------
|
||||
|
||||
You may need to write a prj_arc.conf file if the sample doesn't have one.
|
||||
Next, you can use the menuconfig rule to configure the target. By specifying
|
||||
``emsdp`` as the board configuration, you can select the ARC EM Software
|
||||
Development Platform board support for Zephyr, note that the core also need to
|
||||
be supplied, for example for the em7d:
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: emsdp/emsdp_em7d
|
||||
:zephyr-app: samples/hello_world
|
||||
:goals: menuconfig
|
||||
|
||||
|
||||
Building
|
||||
--------
|
||||
|
||||
You can build an application in the usual way. Refer to
|
||||
:ref:`build_an_application` for more details. Here is an example for
|
||||
:ref:`hello_world` for the em4.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: emsdp/emsdp_em4
|
||||
:zephyr-app: samples/hello_world
|
||||
:maybe-skip-config:
|
||||
:goals: build
|
||||
|
||||
Connecting Serial Output
|
||||
=========================
|
||||
|
||||
In the default configuration, Zephyr's EM Software Development Platform images
|
||||
support serial output via the USB-UART on the board. To enable serial output:
|
||||
|
||||
* Open a serial port emulator (i.e. on Linux minicom, putty, screen, etc)
|
||||
|
||||
* Specify the tty driver name, for example, on Linux this may be
|
||||
:file:`/dev/ttyUSB0`
|
||||
|
||||
* Set the communication settings to:
|
||||
|
||||
|
||||
========= =====
|
||||
Parameter Value
|
||||
========= =====
|
||||
Baud: 115200
|
||||
Data: 8 bits
|
||||
Parity: None
|
||||
Stopbits: 1
|
||||
========= =====
|
||||
|
||||
Debugging
|
||||
==========
|
||||
|
||||
Using the latest version of Zephyr SDK(>=0.9), you can debug and flash IoT
|
||||
Development Kit directly.
|
||||
|
||||
One option is to build and debug the application using the usual
|
||||
Zephyr build system commands, for example for the em6
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: emsdp/emsdp_em6
|
||||
:app: <my app>
|
||||
:goals: debug
|
||||
|
||||
At this point you can do your normal debug session. Set breakpoints and then
|
||||
'c' to continue into the program.
|
||||
|
||||
The other option is to launch a debug server, as follows.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: emsdp/emsdp_em6
|
||||
:app: <my app>
|
||||
:goals: debugserver
|
||||
|
||||
Then connect to the debug server at the EM Software Development Platform from a
|
||||
second console, from the build directory containing the output :file:`zephyr.elf`.
|
||||
|
||||
.. code-block:: console
|
||||
|
||||
$ cd <my app>
|
||||
$ $ZEPHYR_SDK_INSTALL_DIR/sysroots/x86_64-pokysdk-linux/usr/bin/ \
|
||||
arc-zephyr-elf/arc-zephyr-elf-gdb zephyr.elf
|
||||
(gdb) target remote localhost:3333
|
||||
(gdb) load
|
||||
(gdb) b main
|
||||
(gdb) c
|
||||
|
||||
Flashing
|
||||
========
|
||||
|
||||
If you just want to download the application to the EM Software Development
|
||||
Platform's CCM and run, you can do so in the usual way.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: emsdp/emsdp_em6
|
||||
:app: <my app>
|
||||
:goals: flash
|
||||
|
||||
This command still uses openocd and gdb to load the application elf file to EM
|
||||
Software Development Platform, but it will load the application and immediately run.
|
||||
If power is removed, the application will be lost since it wasn't written to flash.
|
||||
|
||||
Most of the time you will not be flashing your program but will instead debug
|
||||
it using openocd and gdb. The program can be download via the USB cable into
|
||||
the code and data memories.
|
||||
|
||||
References
|
||||
**********
|
||||
|
||||
.. target-notes::
|
||||
|
||||
.. _EM Software Development Platform user guide:
|
||||
https://www.synopsys.com/dw/ipdir.php?ds=arc-em-software-development-platform
|
||||
|
||||
.. _Digilent Pmod Modules:
|
||||
http://store.digilentinc.com/pmod-modules
|
||||
|
||||
.. _Putty website:
|
||||
http://www.putty.org
|
||||
138
boards/snps/emsdp/emsdp-pinctrl.dtsi
Normal file
138
boards/snps/emsdp/emsdp-pinctrl.dtsi
Normal file
|
|
@ -0,0 +1,138 @@
|
|||
/* SPDX-License-Identifier: Apache-2.0 */
|
||||
|
||||
#include <zephyr/dt-bindings/pinctrl/emsdp-pinctrl.h>
|
||||
|
||||
&pinctrl {
|
||||
/* PMOD_A */
|
||||
pmodA_gpio: pmodA_gpio {
|
||||
pinmux = <PMOD_A PMOD_GPIO>;
|
||||
};
|
||||
pmodA_uarta: pmodA_uarta {
|
||||
pinmux = <PMOD_A PMOD_UARTA>;
|
||||
};
|
||||
pmodA_uartb: pmodA_uartb {
|
||||
pinmux = <PMOD_A PMOD_UARTB>;
|
||||
};
|
||||
pmodA_spi1_cs0: pmodA_spi1_cs0 {
|
||||
pinmux = <PMOD_A PMOD_SPI>;
|
||||
};
|
||||
pmodA_i2c2: pmodA_i2c2 {
|
||||
pinmux = <PMOD_A PMOD_I2C>;
|
||||
};
|
||||
pmodA_pwm1: pmodA_pwm1 {
|
||||
pinmux = <PMOD_A PMOD_PWM_MODE1>;
|
||||
};
|
||||
pmodA_pwm2: pmodA_pwm2 {
|
||||
pinmux = <PMOD_A PMOD_PWM_MODE2>;
|
||||
};
|
||||
|
||||
/* PMOD_B */
|
||||
pmodB_gpio: pmodB_gpio {
|
||||
pinmux = <PMOD_B PMOD_GPIO>;
|
||||
};
|
||||
pmodB_uarta: pmodB_uarta {
|
||||
pinmux = <PMOD_B PMOD_UARTA>;
|
||||
};
|
||||
pmodB_uartb: pmodB_uartb {
|
||||
pinmux = <PMOD_B PMOD_UARTB>;
|
||||
};
|
||||
pmodB_spi1_cs1: pmodB_spi1_cs1 {
|
||||
pinmux = <PMOD_B PMOD_SPI>;
|
||||
};
|
||||
pmodB_i2c2: pmodB_i2c2 {
|
||||
pinmux = <PMOD_B PMOD_I2C>;
|
||||
};
|
||||
pmodB_pwm1: pmodB_pwm1 {
|
||||
pinmux = <PMOD_B PMOD_PWM_MODE1>;
|
||||
};
|
||||
pmodB_pwm2: pmodB_pwm2 {
|
||||
pinmux = <PMOD_B PMOD_PWM_MODE2>;
|
||||
};
|
||||
|
||||
/* PMOD_C */
|
||||
pmodC_gpio: pmodC_gpio {
|
||||
pinmux = <PMOD_C PMOD_GPIO>;
|
||||
};
|
||||
pmodC_uarta: pmodC_uarta {
|
||||
pinmux = <PMOD_C PMOD_UARTA>;
|
||||
};
|
||||
pmodC_uartb: pmodC_uartb {
|
||||
pinmux = <PMOD_C PMOD_UARTB>;
|
||||
};
|
||||
pmodC_spi1_cs2: pmodC_spi1_cs2 {
|
||||
pinmux = <PMOD_C PMOD_SPI>;
|
||||
};
|
||||
pmodC_i2c2: pmodC_i2c2 {
|
||||
pinmux = <PMOD_C PMOD_I2C>;
|
||||
};
|
||||
pmodC_pwm1: pmodC_pwm1 {
|
||||
pinmux = <PMOD_C PMOD_PWM_MODE1>;
|
||||
};
|
||||
pmodC_pwm2: pmodC_pwm2 {
|
||||
pinmux = <PMOD_C PMOD_PWM_MODE2>;
|
||||
};
|
||||
|
||||
/* ARDUINO_PIN_1 */
|
||||
arduino_CFG0_gpio: arduino_CFG0_gpio {
|
||||
pinmux = <ARDUINO_PIN_1 ARDUINO_GPIO>;
|
||||
};
|
||||
arduino_CFG0_uart: arduino_CFG0_uart {
|
||||
pinmux = <ARDUINO_PIN_1 ARDUINO_UART>;
|
||||
};
|
||||
|
||||
/* ARDUINO_PIN_3 */
|
||||
arduino_CFG1_gpio: arduino_CFG1_gpio {
|
||||
pinmux = <ARDUINO_PIN_3 ARDUINO_GPIO>;
|
||||
};
|
||||
arduino_CFG1_pwm: arduino_CFG1_pwm{
|
||||
pinmux = <ARDUINO_PIN_3 ARDUINO_PWM>;
|
||||
};
|
||||
|
||||
/* ARDUINO_PIN_5 */
|
||||
arduino_CFG2_gpio: arduino_CFG2_gpio {
|
||||
pinmux = <ARDUINO_PIN_5 ARDUINO_GPIO>;
|
||||
};
|
||||
arduino_CFG2_pwm: arduino_CFG2_pwm {
|
||||
pinmux = <ARDUINO_PIN_5 ARDUINO_PWM>;
|
||||
};
|
||||
|
||||
/* ARDUINO_PIN_7 */
|
||||
arduino_CFG3_gpio: arduino_CFG3_gpio {
|
||||
pinmux = <ARDUINO_PIN_7 ARDUINO_GPIO>;
|
||||
};
|
||||
arduino_CFG3_pwm: arduino_CFG3_pwm {
|
||||
pinmux = <ARDUINO_PIN_7 ARDUINO_PWM>;
|
||||
};
|
||||
|
||||
/* ARDUINO_PIN_9 */
|
||||
arduino_CFG4_gpio: arduino_CFG4_gpio {
|
||||
pinmux = <ARDUINO_PIN_9 ARDUINO_GPIO>;
|
||||
};
|
||||
arduino_CFG4_pwm: arduino_CFG4_pwm {
|
||||
pinmux = <ARDUINO_PIN_9 ARDUINO_PWM>;
|
||||
};
|
||||
|
||||
/* ARDUINO_PIN_13 */
|
||||
arduino_CFG5_gpio: arduino_CFG5_gpio {
|
||||
pinmux = <ARDUINO_PIN_13 ARDUINO_GPIO>;
|
||||
};
|
||||
arduino_CFG5_spi: arduino_CFG5_spi {
|
||||
pinmux = <ARDUINO_PIN_13 ARDUINO_SPI>;
|
||||
};
|
||||
arduino_CFG5_pwm: arduino_CFG5_pwm {
|
||||
pinmux = <ARDUINO_PIN_13 ARDUINO_PWM>;
|
||||
};
|
||||
|
||||
/* ARDUINO_PIN_AD5 */
|
||||
arduino_CFG6_gpio: arduino_CFG6_gpio {
|
||||
pinmux = <ARDUINO_PIN_AD5 ARDUINO_GPIO>;
|
||||
};
|
||||
arduino_CFG6_i2c: arduino_CFG6_i2c {
|
||||
pinmux = <ARDUINO_PIN_AD5 ARDUINO_I2C>;
|
||||
};
|
||||
|
||||
/* INNER_CONNECT, DUMMY MUX */
|
||||
unmuxed_pin: unmuxed_pin {
|
||||
pinmux = <UNMUXED_PIN NOT_PINMUX>;
|
||||
};
|
||||
};
|
||||
14
boards/snps/emsdp/emsdp_defconfig
Normal file
14
boards/snps/emsdp/emsdp_defconfig
Normal file
|
|
@ -0,0 +1,14 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
|
||||
CONFIG_XIP=n
|
||||
CONFIG_BUILD_NO_GAP_FILL=y
|
||||
CONFIG_BUILD_OUTPUT_BIN=n
|
||||
CONFIG_ARCV2_INTERRUPT_UNIT=y
|
||||
CONFIG_ARCV2_TIMER=y
|
||||
CONFIG_CONSOLE=y
|
||||
CONFIG_UART_CONSOLE=y
|
||||
CONFIG_SERIAL=y
|
||||
CONFIG_UART_INTERRUPT_DRIVEN=y
|
||||
CONFIG_ARC_MPU_ENABLE=y
|
||||
CONFIG_GPIO=y
|
||||
68
boards/snps/emsdp/emsdp_emsdp_em11d.dts
Normal file
68
boards/snps/emsdp/emsdp_emsdp_em11d.dts
Normal file
|
|
@ -0,0 +1,68 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <synopsys/emsdp.dtsi>
|
||||
#include <mem.h>
|
||||
#include "board.dtsi"
|
||||
#include "emsdp-pinctrl.dtsi"
|
||||
|
||||
/ {
|
||||
model = "emsdp";
|
||||
compatible = "snps,emsdp", "snps,emsdp";
|
||||
|
||||
aliases {
|
||||
uart-0 = &uart0;
|
||||
spi-flash0 = &s25fl256s;
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &sram0;
|
||||
zephyr,console = &uart0;
|
||||
zephyr,shell-uart = &uart0;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
/ {
|
||||
soc {
|
||||
|
||||
uart@f0004000 {
|
||||
interrupts = <107 1>;
|
||||
};
|
||||
|
||||
gpio@f0002000 {
|
||||
interrupts = <85 1>;
|
||||
};
|
||||
|
||||
spi@f0008000 {
|
||||
interrupts = <83 1>;
|
||||
};
|
||||
|
||||
spi@f1000000 {
|
||||
interrupts = <84 1>;
|
||||
pinctrl-0 = <&unmuxed_pin>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
spi@80010000 {
|
||||
interrupts = <63 2>, <64 2>, <65 2>;
|
||||
pinctrl-0 = <&arduino_CFG5_spi>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
spi@80010100 {
|
||||
interrupts = <67 2>, <68 2>, <69 2>;
|
||||
pinctrl-0 = <&pmodA_spi1_cs0>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
};
|
||||
};
|
||||
16
boards/snps/emsdp/emsdp_emsdp_em11d.yaml
Normal file
16
boards/snps/emsdp/emsdp_emsdp_em11d.yaml
Normal file
|
|
@ -0,0 +1,16 @@
|
|||
identifier: emsdp/emsdp_em11d
|
||||
name: EM Software Development Platform (EM11D)
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
ram: 128
|
||||
supported:
|
||||
- spi
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
4
boards/snps/emsdp/emsdp_emsdp_em11d_defconfig
Normal file
4
boards/snps/emsdp/emsdp_emsdp_em11d_defconfig
Normal file
|
|
@ -0,0 +1,4 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
CONFIG_SPI=y
|
||||
CONFIG_PINCTRL=y
|
||||
52
boards/snps/emsdp/emsdp_emsdp_em4.dts
Normal file
52
boards/snps/emsdp/emsdp_emsdp_em4.dts
Normal file
|
|
@ -0,0 +1,52 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <synopsys/emsdp.dtsi>
|
||||
#include "board.dtsi"
|
||||
|
||||
/ {
|
||||
model = "emsdp";
|
||||
compatible = "snps,emsdp", "snps,emsdp";
|
||||
|
||||
aliases {
|
||||
uart-0 = &uart0;
|
||||
spi-flash0 = &s25fl256s;
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &sram0;
|
||||
zephyr,console = &uart0;
|
||||
zephyr,shell-uart = &uart0;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
/ {
|
||||
soc {
|
||||
|
||||
uart@f0004000 {
|
||||
interrupts = <108 1>;
|
||||
};
|
||||
|
||||
gpio@f0002000 {
|
||||
interrupts = <86 1>;
|
||||
};
|
||||
|
||||
spi@f0008000 {
|
||||
interrupts = <83 1>;
|
||||
};
|
||||
|
||||
spi@f1000000 {
|
||||
interrupts = <84 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
14
boards/snps/emsdp/emsdp_emsdp_em4.yaml
Normal file
14
boards/snps/emsdp/emsdp_emsdp_em4.yaml
Normal file
|
|
@ -0,0 +1,14 @@
|
|||
identifier: emsdp/emsdp_em4
|
||||
name: EM Software Development Platform (EM4)
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
ram: 128
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
52
boards/snps/emsdp/emsdp_emsdp_em5d.dts
Normal file
52
boards/snps/emsdp/emsdp_emsdp_em5d.dts
Normal file
|
|
@ -0,0 +1,52 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <synopsys/emsdp.dtsi>
|
||||
#include "board.dtsi"
|
||||
|
||||
/ {
|
||||
model = "emsdp";
|
||||
compatible = "snps,emsdp", "snps,emsdp";
|
||||
|
||||
aliases {
|
||||
uart-0 = &uart0;
|
||||
spi-flash0 = &s25fl256s;
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &sram0;
|
||||
zephyr,console = &uart0;
|
||||
zephyr,shell-uart = &uart0;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
/ {
|
||||
soc {
|
||||
|
||||
uart@f0004000 {
|
||||
interrupts = <107 1>;
|
||||
};
|
||||
|
||||
gpio@f0002000 {
|
||||
interrupts = <85 1>;
|
||||
};
|
||||
|
||||
spi@f0008000 {
|
||||
interrupts = <83 1>;
|
||||
};
|
||||
|
||||
spi@f1000000 {
|
||||
interrupts = <84 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
14
boards/snps/emsdp/emsdp_emsdp_em5d.yaml
Normal file
14
boards/snps/emsdp/emsdp_emsdp_em5d.yaml
Normal file
|
|
@ -0,0 +1,14 @@
|
|||
identifier: emsdp/emsdp_em5d
|
||||
name: EM Software Development Platform (EM5D)
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
ram: 128
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
3
boards/snps/emsdp/emsdp_emsdp_em5d_defconfig
Normal file
3
boards/snps/emsdp/emsdp_emsdp_em5d_defconfig
Normal file
|
|
@ -0,0 +1,3 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
CONFIG_SPI=y
|
||||
52
boards/snps/emsdp/emsdp_emsdp_em6.dts
Normal file
52
boards/snps/emsdp/emsdp_emsdp_em6.dts
Normal file
|
|
@ -0,0 +1,52 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <synopsys/emsdp.dtsi>
|
||||
#include "board.dtsi"
|
||||
|
||||
/ {
|
||||
model = "emsdp";
|
||||
compatible = "snps,emsdp", "snps,emsdp";
|
||||
|
||||
aliases {
|
||||
uart-0 = &uart0;
|
||||
spi-flash0 = &s25fl256s;
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &sram0;
|
||||
zephyr,console = &uart0;
|
||||
zephyr,shell-uart = &uart0;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
/ {
|
||||
soc {
|
||||
|
||||
uart@f0004000 {
|
||||
interrupts = <108 1>;
|
||||
};
|
||||
|
||||
gpio@f0002000 {
|
||||
interrupts = <86 1>;
|
||||
};
|
||||
|
||||
spi@f0008000 {
|
||||
interrupts = <83 1>;
|
||||
};
|
||||
|
||||
spi@f1000000 {
|
||||
interrupts = <84 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
16
boards/snps/emsdp/emsdp_emsdp_em6.yaml
Normal file
16
boards/snps/emsdp/emsdp_emsdp_em6.yaml
Normal file
|
|
@ -0,0 +1,16 @@
|
|||
identifier: emsdp/emsdp_em6
|
||||
name: EM Software Development Platform (EM6)
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
ram: 128
|
||||
supported:
|
||||
- spi
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
3
boards/snps/emsdp/emsdp_emsdp_em6_defconfig
Normal file
3
boards/snps/emsdp/emsdp_emsdp_em6_defconfig
Normal file
|
|
@ -0,0 +1,3 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
CONFIG_SPI=y
|
||||
52
boards/snps/emsdp/emsdp_emsdp_em7d.dts
Normal file
52
boards/snps/emsdp/emsdp_emsdp_em7d.dts
Normal file
|
|
@ -0,0 +1,52 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <synopsys/emsdp.dtsi>
|
||||
#include "board.dtsi"
|
||||
|
||||
/ {
|
||||
model = "emsdp";
|
||||
compatible = "snps,emsdp", "snps,emsdp";
|
||||
|
||||
aliases {
|
||||
uart-0 = &uart0;
|
||||
spi-flash0 = &s25fl256s;
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &sram0;
|
||||
zephyr,console = &uart0;
|
||||
zephyr,shell-uart = &uart0;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
/ {
|
||||
soc {
|
||||
|
||||
uart@f0004000 {
|
||||
interrupts = <107 1>;
|
||||
};
|
||||
|
||||
gpio@f0002000 {
|
||||
interrupts = <85 1>;
|
||||
};
|
||||
|
||||
spi@f0008000 {
|
||||
interrupts = <83 1>;
|
||||
};
|
||||
|
||||
spi@f1000000 {
|
||||
interrupts = <84 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
14
boards/snps/emsdp/emsdp_emsdp_em7d.yaml
Normal file
14
boards/snps/emsdp/emsdp_emsdp_em7d.yaml
Normal file
|
|
@ -0,0 +1,14 @@
|
|||
identifier: emsdp/emsdp_em7d
|
||||
name: EM Software Development Platform (EM7D)
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
ram: 128
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
53
boards/snps/emsdp/emsdp_emsdp_em7d_esp.dts
Normal file
53
boards/snps/emsdp/emsdp_emsdp_em7d_esp.dts
Normal file
|
|
@ -0,0 +1,53 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <synopsys/emsdp-sec.dtsi>
|
||||
#include "board.dtsi"
|
||||
|
||||
/ {
|
||||
model = "emsdp";
|
||||
compatible = "snps,emsdp", "snps,emsdp";
|
||||
|
||||
aliases {
|
||||
uart-0 = &uart0;
|
||||
spi-flash0 = &s25fl256s;
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &sram0;
|
||||
zephyr,console = &uart0;
|
||||
zephyr,shell-uart = &uart0;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
/ {
|
||||
soc {
|
||||
|
||||
uart@f0004000 {
|
||||
interrupts = <108 1>;
|
||||
};
|
||||
|
||||
gpio@f0002000 {
|
||||
interrupts = <86 1>;
|
||||
};
|
||||
|
||||
/* IRQ line in em7d_esp is different to others */
|
||||
spi@f0008000 {
|
||||
interrupts = <84 1>;
|
||||
};
|
||||
|
||||
spi@f1000000 {
|
||||
interrupts = <85 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
16
boards/snps/emsdp/emsdp_emsdp_em7d_esp.yaml
Normal file
16
boards/snps/emsdp/emsdp_emsdp_em7d_esp.yaml
Normal file
|
|
@ -0,0 +1,16 @@
|
|||
identifier: emsdp/emsdp_em7d_esp
|
||||
name: EM Software Development Platform (EM7D_ESP)
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
ram: 128
|
||||
supported:
|
||||
- spi
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
5
boards/snps/emsdp/emsdp_emsdp_em7d_esp_defconfig
Normal file
5
boards/snps/emsdp/emsdp_emsdp_em7d_esp_defconfig
Normal file
|
|
@ -0,0 +1,5 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
CONFIG_ARC_HAS_SECURE=y
|
||||
CONFIG_TRUSTED_EXECUTION_SECURE=y
|
||||
CONFIG_SPI=y
|
||||
63
boards/snps/emsdp/emsdp_emsdp_em9d.dts
Normal file
63
boards/snps/emsdp/emsdp_emsdp_em9d.dts
Normal file
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <synopsys/emsdp.dtsi>
|
||||
#include <mem.h>
|
||||
#include "board.dtsi"
|
||||
|
||||
/ {
|
||||
model = "emsdp";
|
||||
compatible = "snps,emsdp", "snps,emsdp";
|
||||
|
||||
aliases {
|
||||
uart-0 = &uart0;
|
||||
spi-flash0 = &s25fl256s;
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &sram0;
|
||||
zephyr,console = &uart0;
|
||||
zephyr,shell-uart = &uart0;
|
||||
};
|
||||
|
||||
xccm@c0000000 {
|
||||
compatible = "arc,xccm";
|
||||
reg = <0xc0000000 DT_SIZE_K(16)>;
|
||||
};
|
||||
|
||||
yccm@e0000000 {
|
||||
compatible = "arc,yccm";
|
||||
reg = <0xe0000000 DT_SIZE_K(16)>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
/ {
|
||||
soc {
|
||||
|
||||
uart@f0004000 {
|
||||
interrupts = <107 1>;
|
||||
};
|
||||
|
||||
gpio@f0002000 {
|
||||
interrupts = <85 1>;
|
||||
};
|
||||
|
||||
spi@f0008000 {
|
||||
interrupts = <83 1>;
|
||||
};
|
||||
|
||||
spi@f1000000 {
|
||||
interrupts = <84 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
16
boards/snps/emsdp/emsdp_emsdp_em9d.yaml
Normal file
16
boards/snps/emsdp/emsdp_emsdp_em9d.yaml
Normal file
|
|
@ -0,0 +1,16 @@
|
|||
identifier: emsdp/emsdp_em9d
|
||||
name: EM Software Development Platform (EM9D)
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
ram: 128
|
||||
supported:
|
||||
- spi
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
3
boards/snps/emsdp/emsdp_emsdp_em9d_defconfig
Normal file
3
boards/snps/emsdp/emsdp_emsdp_em9d_defconfig
Normal file
|
|
@ -0,0 +1,3 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
CONFIG_SPI=y
|
||||
23
boards/snps/emsdp/platform.c
Normal file
23
boards/snps/emsdp/platform.c
Normal file
|
|
@ -0,0 +1,23 @@
|
|||
/*
|
||||
* Copyright (c) 2023 Synopsys
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <zephyr/arch/cpu.h>
|
||||
#include <zephyr/init.h>
|
||||
|
||||
#define DFSS_SPI0_BASE 0x80010000
|
||||
#define DFSS_SPI1_BASE 0x80010100
|
||||
#define REG_CLK_ENA_OFFSET (0x16) /* DFSS only */
|
||||
|
||||
/* Enable clock for DFSS SPI0 controller & DFSS SPI1 controller */
|
||||
static int emsdp_dfss_clock_init(void)
|
||||
{
|
||||
sys_out32(1, DFSS_SPI0_BASE + REG_CLK_ENA_OFFSET);
|
||||
sys_out32(1, DFSS_SPI1_BASE + REG_CLK_ENA_OFFSET);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
SYS_INIT(emsdp_dfss_clock_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
|
||||
47
boards/snps/emsdp/support/openocd.cfg
Normal file
47
boards/snps/emsdp/support/openocd.cfg
Normal file
|
|
@ -0,0 +1,47 @@
|
|||
# Copyright (C) 2019 Synopsys, Inc.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
#
|
||||
# Synopsys DesignWare ARC EM Software Development Platform
|
||||
#
|
||||
|
||||
# Configure JTAG cable
|
||||
# EM SDP has built-in FT2232 chip, which is similar to Digilent HS-1.
|
||||
adapter driver ftdi
|
||||
|
||||
# Only specify FTDI serial number if it is specified via
|
||||
# "set _ZEPHYR_BOARD_SERIAL 12345" before reading this script
|
||||
if { [info exists _ZEPHYR_BOARD_SERIAL] } {
|
||||
ftdi_serial $_ZEPHYR_BOARD_SERIAL
|
||||
}
|
||||
|
||||
ftdi vid_pid 0x0403 0x6010
|
||||
ftdi layout_init 0x0088 0x008b
|
||||
ftdi channel 0
|
||||
|
||||
|
||||
# EM11D requires 10 MHz.
|
||||
adapter speed 10000
|
||||
|
||||
# ARCs support only JTAG.
|
||||
transport select jtag
|
||||
|
||||
source [find cpu/arc/em.tcl]
|
||||
|
||||
set _CHIPNAME arc-em
|
||||
set _TARGETNAME $_CHIPNAME.cpu
|
||||
|
||||
# EM SDP IDENTITY is 0x200444b1
|
||||
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -expected-id 0x200044b1
|
||||
|
||||
set _coreid 0
|
||||
set _dbgbase [expr {0x00000000 | ($_coreid << 13)}]
|
||||
|
||||
target create $_TARGETNAME arcv2 -chain-position $_TARGETNAME \
|
||||
-coreid 0 -dbgbase $_dbgbase -endian little
|
||||
|
||||
# There is no SRST, so do a software reset
|
||||
$_TARGETNAME configure -event reset-assert "arc_em_reset $_TARGETNAME"
|
||||
|
||||
arc_em_init_regs
|
||||
7
boards/snps/hsdk/CMakeLists.txt
Normal file
7
boards/snps/hsdk/CMakeLists.txt
Normal file
|
|
@ -0,0 +1,7 @@
|
|||
#
|
||||
# Copyright (c) 2019 Synopsys, Inc. All rights reserved.
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
zephyr_sources(platform.c)
|
||||
20
boards/snps/hsdk/Kconfig.defconfig
Normal file
20
boards/snps/hsdk/Kconfig.defconfig
Normal file
|
|
@ -0,0 +1,20 @@
|
|||
# Copyright (c) 2019 Synopsys, Inc. All rights reserved.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
if BOARD_HSDK
|
||||
|
||||
if SPI_DW
|
||||
|
||||
config SPI_DW_ACCESS_WORD_ONLY
|
||||
default y
|
||||
|
||||
endif # SPI_DW
|
||||
|
||||
if I2C_DW
|
||||
|
||||
config I2C_DW_CLOCK_SPEED
|
||||
default 200
|
||||
|
||||
endif # I2C_DW
|
||||
|
||||
endif # BOARD_HSDK
|
||||
12
boards/snps/hsdk/Kconfig.hsdk
Normal file
12
boards/snps/hsdk/Kconfig.hsdk
Normal file
|
|
@ -0,0 +1,12 @@
|
|||
# DesignWare ARC HS Development Kit board configuration
|
||||
|
||||
# Copyright (c) 2019 Synopsys, Inc. All rights reserved.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
config BOARD_HSDK
|
||||
select SOC_ARC_HSDK
|
||||
help
|
||||
The DesignWare ARC HS Development Kit is a ready-to-use platform for
|
||||
rapid software development on the ARC HS3x family of processors. It
|
||||
supports single- and multi-core ARC HS34, HS36 and HS38 processors
|
||||
and offers a wide range of interfaces
|
||||
10
boards/snps/hsdk/board.cmake
Normal file
10
boards/snps/hsdk/board.cmake
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
board_runner_args(openocd "--use-elf")
|
||||
|
||||
if(${CONFIG_MP_MAX_NUM_CPUS} EQUAL 2)
|
||||
board_runner_args(openocd "--config=${CMAKE_CURRENT_LIST_DIR}/support/openocd-2-cores.cfg")
|
||||
endif()
|
||||
|
||||
board_runner_args(mdb-hw "--jtag=digilent" "--cores=${CONFIG_MP_MAX_NUM_CPUS}")
|
||||
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
|
||||
include(${ZEPHYR_BASE}/boards/common/mdb-hw.board.cmake)
|
||||
7
boards/snps/hsdk/board.yml
Normal file
7
boards/snps/hsdk/board.yml
Normal file
|
|
@ -0,0 +1,7 @@
|
|||
board:
|
||||
name: hsdk
|
||||
vendor: snps
|
||||
socs:
|
||||
- name: arc_hsdk
|
||||
variants:
|
||||
- name: 2cores
|
||||
BIN
boards/snps/hsdk/doc/arduino_shield_interface.jpg
Normal file
BIN
boards/snps/hsdk/doc/arduino_shield_interface.jpg
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 36 KiB |
BIN
boards/snps/hsdk/doc/hsdk.jpg
Normal file
BIN
boards/snps/hsdk/doc/hsdk.jpg
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 46 KiB |
527
boards/snps/hsdk/doc/index.rst
Normal file
527
boards/snps/hsdk/doc/index.rst
Normal file
|
|
@ -0,0 +1,527 @@
|
|||
.. _hsdk:
|
||||
|
||||
DesignWare(R) ARC(R) HS Development Kit
|
||||
########################################
|
||||
|
||||
Overview
|
||||
********
|
||||
|
||||
The DesignWare(R) ARC(R) HS Development Kit is a ready-to-use platform for
|
||||
rapid software development on the ARC HS3x family of processors. It supports
|
||||
single-core and multi-core ARC HS34, HS36 and HS38 processors and offers a wide
|
||||
range of interfaces including Ethernet, WiFi, Bluetooth, USB, SDIO, I2C, SPI,
|
||||
UART, I2S, ADC, PWM and GPIO. A Vivante GPU is also contained in the ARC
|
||||
Development System SoC. This allows developers to build and debug complex
|
||||
software on a comprehensive hardware platform
|
||||
|
||||
.. image:: hsdk.jpg
|
||||
:align: center
|
||||
:alt: DesignWare(R) ARC(R) HS Development Kit (synopsys.com)
|
||||
|
||||
For details about the board, see: `ARC HS Development Kit
|
||||
(HSDK) <https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit>`__
|
||||
|
||||
Hardware
|
||||
********
|
||||
|
||||
The ARC HSDK has 24 general GPIOs, which divided into 8 groups named from GPIO_SEL_0 to GPIO_SEL_7.
|
||||
Each sel can configured for different functions, such as: GPIO, UART, SPI, I2C and PWM. We can program
|
||||
CREG_GPIO_MUX register to do configuration for each sel. Tables below show the bit definition for
|
||||
CREG_GPIO_MUX register and the details configuration for each pin.
|
||||
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| Bit | Name | Access | Reset value | Description |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 2:0 | GPIO_SEL_0 | RW | 0x0* | GPIO mux select for gpio[3:0] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 5:3 | GPIO_SEL_1 | RW | 0x0* | GPIO mux select for gpio[7:4] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 8:6 | GPIO_SEL_2 | RW | 0x0* | GPIO mux select for gpio[11:8] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 11:9 | GPIO_SEL_3 | RW | 0x0* | GPIO mux select for gpio[15:12] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 14:12 | GPIO_SEL_4 | RW | 0x0* | GPIO mux select for gpio[17:16] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 17:15 | GPIO_SEL_5 | RW | 0x0* | GPIO mux select for gpio[19:18] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 20:18 | GPIO_SEL_6 | RW | 0x0* | GPIO mux select for gpio[21:20] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 23:21 | GPIO_SEL_7 | RW | 0x0* | GPIO mux select for gpio[23:22] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SELS | GPIO PINS | FUN0 | FUN1 | FUN2 | FUN3 | FUN4 | FUN5 | FUN6 | FUN7 |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL0 | 0 | gpio[0] | uart0_cts | spi1_cs[0] | gpio[0] | gpio[0] | pwm_ch[6] | pwm_ch[6] | pwm_ch[1] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 1 | gpio[1] | uart0_txd | spi1_mosi | gpio[1] | pwm_ch[0] | gpio[1] | pwm_ch[0] | pwm_ch[0] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 2 | gpio[2] | uart0_rxd | spi1 _miso | i2c1_scl | gpio[2] | gpio[2] | gpio[2] | gpio[2] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 3 | gpio[3] | uart0_rts | spi1_clk | i2c1_sda | gpio[3] | gpio[3] | gpio[3] | gpio[3] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL1 | 4 | gpio[4] | uart1_cts | spi2_cs[0] | gpio[4] | gpio[4] | pwm_ch[4] | pwm_ch[4] | pwm_ch[3] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 5 | gpio[5] | uart1_txd | spi2_mosi | gpio[5] | pwm_ch[2] | gpio[5] | pwm_ch[2] | pwm_ch[2] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 6 | gpio[6] | uart1_rxd | spi2_miso | i2c2_scl | gpio[6] | gpio[6] | gpio[6] | gpio[6] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 7 | gpio[7] | uart1_rts | spi2_clk | i2c2_sda | gpio[7] | gpio[7] | gpio[7] | gpio[7] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL2 | 8 | gpio[8] | uart2_cts | spi1_cs[1] | gpio[8] | gpio[8] | pwm_ch[2] | pwm_ch[2] | pwm_ch[5] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 9 | gpio[9] | uart2_txd | spi1_mosi | gpio[9] | pwm_ch[4] | gpio[9] | pwm_ch[4] | pwm_ch[4] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 10 | gpio[10] | uart2_rxd | spi1_miso | i2c1_scl | gpio[10] | gpio[10] | gpio[10] | gpio[10] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 11 | gpio[11] | uart2_rts | spi1_clk | i2c1_sda | gpio[11] | gpio[11] | gpio[11] | gpio[11] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL3 | 12 | gpio[12] | uart0_cts | spi2_cs[1] | gpio[12] | gpio[12] | pwm_ch[0] | pwm_ch[0] | pwm_ch[7] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 13 | gpio[13] | uart0_txd | spi2_mosi | gpio[13] | pwm_ch[6] | gpio[13] | pwm_ch[6] | pwm_ch[6] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 14 | gpio[14] | uart0_rxd | spi2_miso | i2c2_scl | gpio[14] | gpio[14] | gpio[14] | gpio[14] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 15 | gpio[15] | uart0_rts | spi2_clk | i2c2_sda | gpio[15] | gpio[15] | gpio[15] | gpio[15] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL4 | 16 | gpio[16] | uart1_txd | spi1_cs[2] | i2c1_scl | gpio[16] | pwm_fault_0 | gpio[16] | pwm_fault_0 |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 17 | gpio[17] | uart1_rxd | spi1_mosi | i2c1_sda | pwm_ch[0] | pwm_ch[0] | pwm_ch[5] | pwm_ch[5] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL5 | 18 | gpio[18] | uart2_txd | spi1_miso | i2c2_scl | gpio[18] | gpio[18] | gpio[18] | gpio[18] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 19 | gpio[19] | uart2_rxd | spi1_clk | i2c2_sda | gpio[19] | gpio[19] | gpio[19] | gpio[19] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL6 | 20 | gpio[20] | uart0_txd | spi2_cs[2] | i2c1_scl | gpio[20] | pwm_fault_1 | gpio[20] | pwm_fault_1 |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 21 | gpio[21] | uart0_rxd | spi2_mosi | i2c1_sda | pwm_ch[6] | pwm_ch[6] | pwm_ch[3] | pwm_ch[3] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL7 | 22 | gpio[22] | uart2_txd | spi2_miso | i2c2_scl | gpio[22] | gpio[22] | gpio[22] | gpio[22] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 23 | gpio[23] | uart2_rxd | spi2_clk | i2c2_sda | gpio[23] | gpio[23] | gpio[23] | gpio[23] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
|
||||
Digilent Pmod
|
||||
=============
|
||||
|
||||
The ARC HSDK features two 12-pin Pmod connectors Pmod_A and Pmod_B and one 6-pin Pmod connector Pmod_C.
|
||||
The functionality of the Pmod connectors is programmable and includes GPIO, UART, SPI, I2C and PWM.
|
||||
The location of the pins on the Pmod connectors is shown in Figure below. Detailed pin descriptions
|
||||
depending on the pin multiplexer settings are provided in the subsequent sections.
|
||||
|
||||
.. image:: pinout_diagram_of_the_pmod.jpg
|
||||
:align: center
|
||||
:alt: Pinout Diagram of the Pmod
|
||||
|
||||
Pmod_A Connector
|
||||
----------------
|
||||
|
||||
Table below lists the pin assignment of valid protocols that can be multiplexed on the Pmod_A
|
||||
connector. The GPIO column is the default assignment after Reset.
|
||||
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| Pin | GPIO | UART | SPI | I2C | PWM_1 | PWM_2 |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A1 | gpio[8] | uart2_cts | spi1_cs[1] | gpio[8] | gpio[8] | pwm_ch[2] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A2 | gpio[9] | uart2_txd | spi1_mosi | gpio[9] | pwm_ch[4] | gpio[9] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A3 | gpio[10] | uart2_rxd | spi1_miso | i2c1_scl | gpio[10] | gpio[10] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A4 | gpio[11] | uart2_rts | spi1_clk | i2c1_sda | gpio[11] | gpio[11] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A5 | GND | GND | GND | GND | GND | GND |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A6 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A7 | gpio[20] | gpio[20] | gpio[20] | gpio[20] | gpio[20] | gpio[20] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A8 | gpio[21] | gpio[21] | gpio[21] | gpio[21] | gpio[21] | gpio[21] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A9 | n.c. | n.c. | n.c. | n.c. | n.c. | n.c. |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A10 | n.c. | n.c. | n.c. | n.c. | n.c. | n.c. |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A11 | GND | GND | GND | GND | GND | GND |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A12 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
|
||||
Pmod_B Connector
|
||||
----------------
|
||||
|
||||
Table below lists the pin assignment of valid protocols that can be multiplexed on the Pmod_B
|
||||
connector. The GPIO column is the default assignment after Reset.
|
||||
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| Pin | GPIO | UART | SPI | I2C | PWM_1 | PWM_2 |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B1 | gpio[12] | uart0_cts | spi2_cs[1] | gpio[12] | gpio[12] | pwm_ch[0] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B2 | gpio[13] | uart0_txd | spi2_mosi | gpio[13] | pwm_ch[6] | gpio[13] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B3 | gpio[14] | uart0_rxd | spi2_miso | i2c2_scl | gpio[14] | gpio[14] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B4 | gpio[15] | uart0_rts | spi2_clk | i2c2_sda | gpio[15] | gpio[15] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B5 | GND | GND | GND | GND | GND | GND |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B6 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B7 | gpio[22] | gpio[22] | gpio[22] | gpio[22] | gpio[22] | gpio[22] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B8 | gpio[23] | gpio[23] | gpio[23] | gpio[23] | gpio[23] | gpio[23] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B9 | n.c. | n.c. | n.c. | n.c. | n.c. | n.c. |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B10 | n.c. | n.c. | n.c. | n.c. | n.c. | n.c. |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B11 | GND | GND | GND | GND | GND | GND |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B12 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
|
||||
Pmod_C Connector
|
||||
----------------
|
||||
|
||||
Table below lists the pin assignment of valid protocols that can be multiplexed on the Pmod_C
|
||||
connector. The GPIO column is the default assignment after Reset.
|
||||
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| Pin | GPIO | UART | SPI | I2C | PWM |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| C1 | gpio[16] | uart1_txd | spi1_cs[2] | i2c1_scl | gpio[16] |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| C2 | gpio[17] | uart1_rxd | spi1_mosi | i2c1_sda | pwm_ch[0] |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| C3 | gpio[18] | uart2_txd | spi1_miso | i2c2_scl | gpio[18] |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| C4 | gpio[19] | uart2_rxd | spi1_clk | i2c2_sda | gpio[19] |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| C5 | GND | GND | GND | GND | GND |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| C6 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
|
||||
Mikrobus
|
||||
========
|
||||
|
||||
The ARC HSDK features a set of MikroBUS headers. Figure below shows the relevant function assignments,
|
||||
fully compatible with the MikroBUS standard. Table below shows the pin assignment on the I/O Multiplexer.
|
||||
|
||||
.. image:: mikrobus_header.jpg
|
||||
:align: center
|
||||
:alt: mikrobus header
|
||||
|
||||
+-------+-----------------+------+-----------+
|
||||
| Pin | I/O | Pin | I/O |
|
||||
+-------+-----------------+------+-----------+
|
||||
| AN | ADC VIN6* | PWM | pwm_ch[0] |
|
||||
+-------+-----------------+------+-----------+
|
||||
| RST | GPX_Port0_bit1 | INT | gpio[16] |
|
||||
+-------+-----------------+------+-----------+
|
||||
| CS | spi2_cs[1] | RX | uart2_rxd |
|
||||
+-------+-----------------+------+-----------+
|
||||
| SCK | spi2_clk | TX | uart2_txd |
|
||||
+-------+-----------------+------+-----------+
|
||||
| MISO | spi2_miso | SCL | i2c2_scl |
|
||||
+-------+-----------------+------+-----------+
|
||||
| MOSI | spi2_mosi | SDA | i2c2_sda |
|
||||
+-------+-----------------+------+-----------+
|
||||
|
||||
.. note::
|
||||
ADC VIN6 is available through the on-board ADC and is
|
||||
read though SPI0 using SPI chip select 1.
|
||||
|
||||
Arduino
|
||||
=======
|
||||
|
||||
The ARC HSDK provides an Arduino shield interface. Figure below shows the relevant
|
||||
function assignments. The Arduino shield interface is compatible with the Arduino UNO
|
||||
R3 with the following exceptions: 5 Volt shields are not supported, the IOREF voltage on
|
||||
the ARC HSDK board is fixed to 3V3. Note that the ICSP header is also not available. Most
|
||||
shields do not require this ICSP header as the SPI master interface on this ICSP header
|
||||
is also available on the IO10 to IO13 pins.
|
||||
|
||||
.. image:: arduino_shield_interface.jpg
|
||||
:align: center
|
||||
:alt: arduino shield interface
|
||||
|
||||
Table below shows the pin assignment on the I/O Multiplexer. Multiplexing is controlled by software
|
||||
using the CREG_GPIO_MUX register (see Pinmux ). After a reset, all ports are configured as GPIO inputs.
|
||||
|
||||
+-------+------------+-----------------+------------+
|
||||
| Pin | I/O-1 | I/O-2 | I/O-3 |
|
||||
+-------+------------+-----------------+------------+
|
||||
| AD0 | ADC VIN0* | GPX_port0_bit2 | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| AD1 | ADC VIN1* | GPX_port0_bit3 | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| AD2 | ADC VIN2* | GPX_port0_bit4 | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| AD3 | ADC VIN3* | GPX_port0_bit5 | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| AD4 | ADC VIN4* | gpio[18] | i2c2_sda |
|
||||
+-------+------------+-----------------+------------+
|
||||
| AD5 | ADC VIN5* | gpio[19] | i2c2_scl |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO0 | gpio[23] | uart2_rxd | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO1 | gpio[22] | uart2_txd | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO2 | gpio[16] | - | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO3 | gpio[17] | pwm_ch[5] | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO4 | gpio[11] | - | |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO5 | gpio[9] | pwm_ch[4] | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO6 | gpio[21] | pwm_ch[3] | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO7 | gpio[20] | - | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO8 | gpio[10] | - | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO9 | gpio[8] | pwm_ch[2] | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO10 | gpio[12] | pwm_ch[0] | spi2_cs[1] |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO11 | gpio[13] | pwm_ch[6] | spi2_mosi |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO12 | gpio[14] | - | spi2_miso |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO13 | gpio[15] | - | spi2_clk |
|
||||
+-------+------------+-----------------+------------+
|
||||
|
||||
I/O expander
|
||||
============
|
||||
|
||||
The ARC HSDK board includes a CY8C9520A I/O expander from `Cypress CY8C9520A
|
||||
<https://www.cypress.com/file/37971/download>`__. The I/O
|
||||
expander offers additional GPIO signals and board control signals and can be accessed
|
||||
through the on-board I2C bus, we have implemented a basic driver for it.
|
||||
Tables below shows an overview of relevant I/O signals.
|
||||
|
||||
+------------+---------------------------------------------+
|
||||
| Pins | Usage |
|
||||
+------------+---------------------------------------------+
|
||||
| port0_bit0 | RS9113 Bluetooth I2S RX enable (active low) |
|
||||
+------------+---------------------------------------------+
|
||||
| port0_bit1 | mikroBUS Reset (active low) |
|
||||
+------------+---------------------------------------------+
|
||||
| port0_bit2 | GPIO for Arduino AD0 |
|
||||
+------------+---------------------------------------------+
|
||||
| port0_bit3 | GPIO for Arduino AD1 |
|
||||
+------------+---------------------------------------------+
|
||||
| port0_bit4 | GPIO for Arduino AD2 |
|
||||
+------------+---------------------------------------------+
|
||||
| port0_bit5 | GPIO for Arduino AD3 |
|
||||
+------------+---------------------------------------------+
|
||||
| port1_bit4 | On-board user LED0 |
|
||||
+------------+---------------------------------------------+
|
||||
| port1_bit5 | On-board user LED1 |
|
||||
+------------+---------------------------------------------+
|
||||
| port1_bit6 | On-board user LED2 |
|
||||
+------------+---------------------------------------------+
|
||||
| port1_bit7 | On-board user LED3 |
|
||||
+------------+---------------------------------------------+
|
||||
|
||||
On-board user LEDS
|
||||
==================
|
||||
|
||||
The ARC HSDK includes 4 user LEDs(active high), which can be controlled through the I/O expander pins.
|
||||
|
||||
+-------+-----------------+
|
||||
| LEDs | PINs |
|
||||
+-------+-----------------+
|
||||
| LED0 | GPX_port1_bit4 |
|
||||
+-------+-----------------+
|
||||
| LED1 | GPX_port1_bit5 |
|
||||
+-------+-----------------+
|
||||
| LED2 | GPX_port1_bit6 |
|
||||
+-------+-----------------+
|
||||
| LED3 | GPX_port1_bit7 |
|
||||
+-------+-----------------+
|
||||
|
||||
For hardware feature details, refer to : `Designware HS Development Kit website
|
||||
<https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit>`__.
|
||||
|
||||
Programming and Debugging
|
||||
*************************
|
||||
|
||||
Required Hardware and Software
|
||||
==============================
|
||||
|
||||
To use Zephyr RTOS applications on the HS Development Kit board, a few
|
||||
additional pieces of hardware are required.
|
||||
|
||||
* A micro USB cable provides USB-JTAG debug and USB-UART communication
|
||||
to the board
|
||||
|
||||
* A universal switching power adaptor (110-240V
|
||||
AC to 12V DC), provided in the package, provides power to the board.
|
||||
|
||||
* :ref:`The Zephyr SDK <toolchain_zephyr_sdk>`
|
||||
|
||||
* Terminal emulator software for use with the USB-UART. Suggestion:
|
||||
`Putty Website`_.
|
||||
|
||||
* (optional) A collection of Pmods, Arduino modules, or Mikro modules.
|
||||
See `Digilent Pmod Modules`_ or develop your custom interfaces to attach
|
||||
to the Pmod connector.
|
||||
|
||||
Set up the ARC HS Development Kit
|
||||
==================================
|
||||
|
||||
To run Zephyr application on IoT Development Kit, you need to
|
||||
set up the board correctly.
|
||||
|
||||
* Connect the digilent USB cable from your host to the board.
|
||||
|
||||
* Connect the 12V DC power supply to your board
|
||||
|
||||
Set up Zephyr Software
|
||||
======================
|
||||
|
||||
Building Sample Applications
|
||||
==============================
|
||||
|
||||
You can try many of the :ref:`sample applications and demos
|
||||
<samples-and-demos>`. We'll use :ref:`hello_world`, found in
|
||||
:zephyr_file:`samples/hello_world` as an example.
|
||||
|
||||
Configuring
|
||||
-----------
|
||||
|
||||
You may need to write a prj_arc.conf file if the sample doesn't have one.
|
||||
Next, you can use the menuconfig rule to configure the target. By specifying
|
||||
``hsdk`` as the board configuration, you can select the ARC HS Development
|
||||
Kit board support for Zephyr.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: hsdk
|
||||
:zephyr-app: samples/hello_world
|
||||
:goals: menuconfig
|
||||
|
||||
|
||||
Building
|
||||
--------
|
||||
|
||||
You can build an application in the usual way. Refer to
|
||||
:ref:`build_an_application` for more details. Here is an example for
|
||||
:ref:`hello_world`.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: hsdk
|
||||
:zephyr-app: samples/hello_world
|
||||
:maybe-skip-config:
|
||||
:goals: build
|
||||
|
||||
|
||||
Connecting Serial Output
|
||||
=========================
|
||||
|
||||
In the default configuration, Zephyr's HS Development Kit images support
|
||||
serial output via the USB-UART on the board. To enable serial output:
|
||||
|
||||
* Open a serial port emulator (i.e. on Linux minicom, putty, screen, etc)
|
||||
|
||||
* Specify the tty driver name, for example, on Linux this may be
|
||||
:file:`/dev/ttyUSB0`
|
||||
|
||||
* Set the communication settings to:
|
||||
|
||||
|
||||
========= =====
|
||||
Parameter Value
|
||||
========= =====
|
||||
Baud: 115200
|
||||
Data: 8 bits
|
||||
Parity: None
|
||||
Stopbits: 1
|
||||
========= =====
|
||||
|
||||
Debugging
|
||||
==========
|
||||
|
||||
Using the latest version of Zephyr SDK(>=0.10), you can debug and
|
||||
flash (run) HS Development Kit directly.
|
||||
|
||||
One option is to build and debug the application using the usual
|
||||
Zephyr build system commands.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: hsdk
|
||||
:app: <my app>
|
||||
:goals: debug
|
||||
|
||||
At this point you can do your normal debug session. Set breakpoints and then
|
||||
:kbd:`c` to continue into the program.
|
||||
|
||||
The other option is to launch a debug server, as follows.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: hsdk
|
||||
:app: <my app>
|
||||
:goals: debugserver
|
||||
|
||||
Then connect to the debug server at the HS Development Kit from a second
|
||||
console, from the build directory containing the output :file:`zephyr.elf`.
|
||||
|
||||
.. code-block:: console
|
||||
|
||||
$ cd <my app>
|
||||
$ $ZEPHYR_SDK_INSTALL_DIR/arc-zephyr-elf/arc-zephyr-elf-gdb zephyr.elf
|
||||
(gdb) target remote localhost:3333
|
||||
(gdb) load
|
||||
(gdb) b main
|
||||
(gdb) c
|
||||
|
||||
Flashing
|
||||
========
|
||||
|
||||
If you just want to download the application to the HS Development Kit's DDR
|
||||
and run, you can do so in the usual way.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: hsdk
|
||||
:app: <my app>
|
||||
:goals: flash
|
||||
|
||||
This command still uses openocd and gdb to load the application elf file to
|
||||
HS Development Kit, but it will load the application and immediately run. If
|
||||
power is removed, the application will be lost since it wasn't written to flash.
|
||||
|
||||
Most of the time you will not be flashing your program but will instead debug
|
||||
it using openocd and gdb. The program can be download via the USB cable into
|
||||
the code and data memories.
|
||||
|
||||
The HS Development Kit also supports flashing the Zephyr application
|
||||
with the U-Boot bootloader, a powerful and flexible tool for loading
|
||||
an executable from different sources and running it on the target platform.
|
||||
|
||||
The U-Boot implementation for the HS Development Kit was further extended with
|
||||
additional functionality that allows users to better manage the broad
|
||||
configurability of the HS Development Kit
|
||||
|
||||
When you are ready to deploy the program so that it boots up automatically on
|
||||
reset or power-up, you can follow the steps to place the program on SD card.
|
||||
|
||||
For details, see: `Uboot-HSDK-Command-Reference
|
||||
<https://github.com/foss-for-synopsys-dwc-arc-processors/linux/wiki/Uboot-HSDK-Command-Reference#launching-baremetal-application-on-hsdk>`__
|
||||
|
||||
|
||||
Release Notes
|
||||
*************
|
||||
|
||||
References
|
||||
**********
|
||||
|
||||
.. _embARC website: https://www.embarc.org
|
||||
|
||||
.. _Designware HS Development Kit website: https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit
|
||||
|
||||
.. _Digilent Pmod Modules: http://store.digilentinc.com/pmod-modules
|
||||
|
||||
.. _Putty website: http://www.putty.org
|
||||
BIN
boards/snps/hsdk/doc/mikrobus_header.jpg
Normal file
BIN
boards/snps/hsdk/doc/mikrobus_header.jpg
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 32 KiB |
BIN
boards/snps/hsdk/doc/pinout_diagram_of_the_pmod.jpg
Normal file
BIN
boards/snps/hsdk/doc/pinout_diagram_of_the_pmod.jpg
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 11 KiB |
14
boards/snps/hsdk/hsdk.dts
Normal file
14
boards/snps/hsdk/hsdk.dts
Normal file
|
|
@ -0,0 +1,14 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "hsdk.dtsi"
|
||||
|
||||
/ {
|
||||
model = "hsdk";
|
||||
compatible = "snps,hsdk";
|
||||
};
|
||||
147
boards/snps/hsdk/hsdk.dtsi
Normal file
147
boards/snps/hsdk/hsdk.dtsi
Normal file
|
|
@ -0,0 +1,147 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <synopsys/arc_hsdk.dtsi>
|
||||
|
||||
/ {
|
||||
|
||||
aliases {
|
||||
uart-0 = &uart0;
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
led2 = &led2;
|
||||
led3 = &led3;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
led0: led_0 {
|
||||
gpios = <&cy8c95xx_port1 4 GPIO_ACTIVE_HIGH>;
|
||||
label = "LED 0";
|
||||
};
|
||||
led1: led_1 {
|
||||
gpios = <&cy8c95xx_port1 5 GPIO_ACTIVE_HIGH>;
|
||||
label = "LED 1";
|
||||
};
|
||||
led2: led_2 {
|
||||
gpios = <&cy8c95xx_port1 6 GPIO_ACTIVE_HIGH>;
|
||||
label = "LED 2";
|
||||
};
|
||||
led3: led_3 {
|
||||
gpios = <&cy8c95xx_port1 7 GPIO_ACTIVE_HIGH>;
|
||||
label = "LED 3";
|
||||
};
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &ddr0;
|
||||
zephyr,console = &uart0;
|
||||
zephyr,shell-uart = &uart0;
|
||||
};
|
||||
|
||||
arduino_header: connector {
|
||||
compatible = "arduino-header-r3";
|
||||
#gpio-cells = <2>;
|
||||
gpio-map-mask = <0xffffffff 0xffffffc0>;
|
||||
gpio-map-pass-thru = <0 0x3f>;
|
||||
gpio-map = <0 0 &cy8c95xx_port0 2 0>, /* A0 */
|
||||
<1 0 &cy8c95xx_port0 3 0>, /* A1 */
|
||||
<2 0 &cy8c95xx_port0 4 0>, /* A2 */
|
||||
<3 0 &cy8c95xx_port0 5 0>, /* A3 */
|
||||
<4 0 &gpio0 18 0>, /* A4 */
|
||||
<5 0 &gpio0 19 0>, /* A5 */
|
||||
<6 0 &gpio0 23 0>, /* D0 */
|
||||
<7 0 &gpio0 22 0>, /* D1 */
|
||||
<8 0 &gpio0 16 0>, /* D2 */
|
||||
<9 0 &gpio0 17 0>, /* D3 */
|
||||
<10 0 &gpio0 11 0>, /* D4 */
|
||||
<11 0 &gpio0 9 0>, /* D5 */
|
||||
<12 0 &gpio0 21 0>, /* D6 */
|
||||
<13 0 &gpio0 20 0>, /* D7 */
|
||||
<14 0 &gpio0 10 0>, /* D8 */
|
||||
<15 0 &gpio0 8 0>, /* D9 */
|
||||
<16 0 &gpio0 12 0>, /* D10 */
|
||||
<17 0 &gpio0 13 0>, /* D11 */
|
||||
<18 0 &gpio0 14 0>, /* D12 */
|
||||
<19 0 &gpio0 15 0>, /* D13 */
|
||||
<20 0 &gpio0 18 0>, /* D14 */
|
||||
<21 0 &gpio0 19 0>; /* D15 */
|
||||
};
|
||||
};
|
||||
|
||||
arduino_spi: &spi2 {};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
status = "okay";
|
||||
interrupts = <56 1>;
|
||||
};
|
||||
|
||||
&creg_gpio {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
clock-frequency = <33333333>;
|
||||
cs-gpios = <&creg_gpio 0 GPIO_ACTIVE_HIGH>,
|
||||
<&creg_gpio 1 GPIO_ACTIVE_HIGH>,
|
||||
<&creg_gpio 2 GPIO_ACTIVE_HIGH>,
|
||||
<&creg_gpio 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
status = "okay";
|
||||
clock-frequency = <33333333>;
|
||||
cs-gpios = <&creg_gpio 4 GPIO_ACTIVE_HIGH>,
|
||||
<&creg_gpio 5 GPIO_ACTIVE_HIGH>,
|
||||
<&creg_gpio 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&spi2 {
|
||||
status = "okay";
|
||||
clock-frequency = <33333333>;
|
||||
cs-gpios = <&creg_gpio 8 GPIO_ACTIVE_HIGH>,
|
||||
<&creg_gpio 9 GPIO_ACTIVE_HIGH>,
|
||||
<&creg_gpio 10 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
clock-frequency = <I2C_BITRATE_STANDARD>;
|
||||
|
||||
cy8c95xx: cy8c95xx@20 {
|
||||
compatible = "cypress,cy8c95xx-gpio";
|
||||
reg = <0x20>;
|
||||
ranges;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cy8c95xx_port0: cy8c95xx_port@0 {
|
||||
compatible = "cypress,cy8c95xx-gpio-port";
|
||||
reg = <0x00>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
ngpios = <8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
cy8c95xx_port1: cy8c95xx_port@1 {
|
||||
compatible = "cypress,cy8c95xx-gpio-port";
|
||||
reg = <0x01>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
ngpios = <8>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
16
boards/snps/hsdk/hsdk.yaml
Normal file
16
boards/snps/hsdk/hsdk.yaml
Normal file
|
|
@ -0,0 +1,16 @@
|
|||
identifier: hsdk
|
||||
name: HS Development Kit
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
- arcmwdt
|
||||
supported:
|
||||
- smp
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
14
boards/snps/hsdk/hsdk_arc_hsdk_2cores.dts
Normal file
14
boards/snps/hsdk/hsdk_arc_hsdk_2cores.dts
Normal file
|
|
@ -0,0 +1,14 @@
|
|||
/*
|
||||
* Copyright (c) 2020, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "hsdk.dtsi"
|
||||
|
||||
/ {
|
||||
model = "hsdk_2cores";
|
||||
compatible = "snps,hsdk_2cores";
|
||||
};
|
||||
16
boards/snps/hsdk/hsdk_arc_hsdk_2cores.yaml
Normal file
16
boards/snps/hsdk/hsdk_arc_hsdk_2cores.yaml
Normal file
|
|
@ -0,0 +1,16 @@
|
|||
identifier: hsdk/arc_hsdk/2cores
|
||||
name: HS Development Kit(2 cores)
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
- arcmwdt
|
||||
supported:
|
||||
- smp
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
3
boards/snps/hsdk/hsdk_arc_hsdk_2cores_defconfig
Normal file
3
boards/snps/hsdk/hsdk_arc_hsdk_2cores_defconfig
Normal file
|
|
@ -0,0 +1,3 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
CONFIG_MP_MAX_NUM_CPUS=2
|
||||
14
boards/snps/hsdk/hsdk_defconfig
Normal file
14
boards/snps/hsdk/hsdk_defconfig
Normal file
|
|
@ -0,0 +1,14 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
|
||||
CONFIG_XIP=n
|
||||
CONFIG_BUILD_NO_GAP_FILL=y
|
||||
CONFIG_BUILD_OUTPUT_BIN=n
|
||||
CONFIG_ARCV2_INTERRUPT_UNIT=y
|
||||
CONFIG_ARCV2_TIMER=y
|
||||
CONFIG_CONSOLE=y
|
||||
CONFIG_UART_CONSOLE=y
|
||||
CONFIG_SERIAL=y
|
||||
CONFIG_GPIO=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_MP_MAX_NUM_CPUS=4
|
||||
21
boards/snps/hsdk/platform.c
Normal file
21
boards/snps/hsdk/platform.c
Normal file
|
|
@ -0,0 +1,21 @@
|
|||
/*
|
||||
* Copyright (c) 2022 Synopsys
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <zephyr/arch/cpu.h>
|
||||
#include <zephyr/init.h>
|
||||
|
||||
#define HSDK_CREG_GPIO_MUX_REG 0xf0001484
|
||||
#define HSDK_CREG_GPIO_MUX_VAL 0x00000400
|
||||
|
||||
static int hsdk_creg_gpio_mux_init(void)
|
||||
{
|
||||
|
||||
sys_write32(HSDK_CREG_GPIO_MUX_REG, HSDK_CREG_GPIO_MUX_VAL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
SYS_INIT(hsdk_creg_gpio_mux_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
|
||||
85
boards/snps/hsdk/support/openocd-2-cores.cfg
Normal file
85
boards/snps/hsdk/support/openocd-2-cores.cfg
Normal file
|
|
@ -0,0 +1,85 @@
|
|||
# Copyright (C) 2020 Synopsys, Inc.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
# Configure JTAG cable
|
||||
# SDP has built-in FT2232 chip, which is similar to Digilent HS-1, except that
|
||||
# it uses channel B for JTAG, instead of channel A.
|
||||
adapter driver ftdi
|
||||
|
||||
# Only specify FTDI serial number if it is specified via
|
||||
# "set _ZEPHYR_BOARD_SERIAL 12345" before reading this script
|
||||
if { [info exists _ZEPHYR_BOARD_SERIAL] } {
|
||||
ftdi_serial $_ZEPHYR_BOARD_SERIAL
|
||||
}
|
||||
|
||||
ftdi_vid_pid 0x0403 0x6010
|
||||
ftdi_layout_init 0x0088 0x008b
|
||||
ftdi_channel 1
|
||||
|
||||
|
||||
adapter speed 10000
|
||||
|
||||
# ARCs supports only JTAG.
|
||||
transport select jtag
|
||||
|
||||
|
||||
#
|
||||
# HS Development Kit SoC.
|
||||
#
|
||||
# Contains quad-core ARC HS38.
|
||||
#
|
||||
|
||||
source [find cpu/arc/hs.tcl]
|
||||
|
||||
set _coreid 0
|
||||
set _dbgbase [expr 0x00000000 | ($_coreid << 13)]
|
||||
|
||||
# CHIPNAME will be used to choose core family (600, 700 or EM). As far as
|
||||
# OpenOCD is concerned EM and HS are identical.
|
||||
set _CHIPNAME arc-em
|
||||
|
||||
# OpenOCD discovers JTAG TAPs in reverse order.
|
||||
|
||||
set _TARGETNAME4 $_CHIPNAME.cpu4
|
||||
jtag newtap $_CHIPNAME cpu4 -irlen 4 -ircapture 0x1 -expected-id 0x200c24b1
|
||||
set _TARGETNAME3 $_CHIPNAME.cpu3
|
||||
jtag newtap $_CHIPNAME cpu3 -irlen 4 -ircapture 0x1 -expected-id 0x200824b1
|
||||
set _TARGETNAME2 $_CHIPNAME.cpu2
|
||||
jtag newtap $_CHIPNAME cpu2 -irlen 4 -ircapture 0x1 -expected-id 0x200424b1
|
||||
set _TARGETNAME1 $_CHIPNAME.cpu1
|
||||
jtag newtap $_CHIPNAME cpu1 -irlen 4 -ircapture 0x1 -expected-id 0x200024b1
|
||||
|
||||
################################
|
||||
# ARC HS38 core 2
|
||||
################################
|
||||
|
||||
target create $_TARGETNAME2 arcv2 -chain-position $_TARGETNAME2
|
||||
$_TARGETNAME2 configure -coreid $_coreid
|
||||
$_TARGETNAME2 configure -dbgbase $_dbgbase
|
||||
$_TARGETNAME2 configure -event reset-assert "arc_common_reset $_TARGETNAME2"
|
||||
set _coreid [expr $_coreid + 1]
|
||||
set _dbgbase [expr 0x00000000 | ($_coreid << 13)]
|
||||
arc_hs_init_regs
|
||||
|
||||
# Enable L2 cache support for core 2.
|
||||
$_TARGETNAME2 arc cache l2 auto 1
|
||||
|
||||
################################
|
||||
# ARC HS38 core 1
|
||||
################################
|
||||
|
||||
target create $_TARGETNAME1 arcv2 -chain-position $_TARGETNAME1
|
||||
$_TARGETNAME1 configure -coreid $_coreid
|
||||
$_TARGETNAME1 configure -dbgbase $_dbgbase
|
||||
$_TARGETNAME1 configure -event reset-assert "arc_common_reset $_TARGETNAME1"
|
||||
set _coreid [expr $_coreid + 1]
|
||||
set _dbgbase [expr 0x00000000 | ($_coreid << 13)]
|
||||
arc_hs_init_regs
|
||||
|
||||
# Enable L2 cache support for core 1.
|
||||
$_TARGETNAME1 arc cache l2 auto 1
|
||||
|
||||
target smp $_TARGETNAME1 $_TARGETNAME2
|
||||
|
||||
# vi:ft=tcl
|
||||
116
boards/snps/hsdk/support/openocd.cfg
Normal file
116
boards/snps/hsdk/support/openocd.cfg
Normal file
|
|
@ -0,0 +1,116 @@
|
|||
# Copyright (C) 2019-2020 Synopsys, Inc.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
# Configure JTAG cable
|
||||
# SDP has built-in FT2232 chip, which is similar to Digilent HS-1, except that
|
||||
# it uses channel B for JTAG, instead of channel A.
|
||||
adapter driver ftdi
|
||||
|
||||
# Only specify FTDI serial number if it is specified via
|
||||
# "set _ZEPHYR_BOARD_SERIAL 12345" before reading this script
|
||||
if { [info exists _ZEPHYR_BOARD_SERIAL] } {
|
||||
adapter serial $_ZEPHYR_BOARD_SERIAL
|
||||
}
|
||||
|
||||
ftdi vid_pid 0x0403 0x6010
|
||||
ftdi layout_init 0x0088 0x008b
|
||||
ftdi channel 1
|
||||
|
||||
|
||||
adapter speed 10000
|
||||
|
||||
# ARCs supports only JTAG.
|
||||
transport select jtag
|
||||
|
||||
|
||||
#
|
||||
# HS Development Kit SoC.
|
||||
#
|
||||
# Contains quad-core ARC HS38.
|
||||
#
|
||||
|
||||
source [find cpu/arc/hs.tcl]
|
||||
|
||||
set _coreid 0
|
||||
set _dbgbase [expr {0x00000000 | ($_coreid << 13)}]
|
||||
|
||||
# CHIPNAME will be used to choose core family (600, 700 or EM). As far as
|
||||
# OpenOCD is concerned EM and HS are identical.
|
||||
set _CHIPNAME arc-em
|
||||
|
||||
# OpenOCD discovers JTAG TAPs in reverse order.
|
||||
|
||||
set _TARGETNAME4 $_CHIPNAME.cpu4
|
||||
jtag newtap $_CHIPNAME cpu4 -irlen 4 -ircapture 0x1 -expected-id 0x200c24b1
|
||||
set _TARGETNAME3 $_CHIPNAME.cpu3
|
||||
jtag newtap $_CHIPNAME cpu3 -irlen 4 -ircapture 0x1 -expected-id 0x200824b1
|
||||
set _TARGETNAME2 $_CHIPNAME.cpu2
|
||||
jtag newtap $_CHIPNAME cpu2 -irlen 4 -ircapture 0x1 -expected-id 0x200424b1
|
||||
set _TARGETNAME1 $_CHIPNAME.cpu1
|
||||
jtag newtap $_CHIPNAME cpu1 -irlen 4 -ircapture 0x1 -expected-id 0x200024b1
|
||||
|
||||
################################
|
||||
# ARC HS38 core 2
|
||||
################################
|
||||
|
||||
target create $_TARGETNAME2 arcv2 -chain-position $_TARGETNAME2
|
||||
$_TARGETNAME2 configure -coreid $_coreid
|
||||
$_TARGETNAME2 configure -dbgbase $_dbgbase
|
||||
$_TARGETNAME2 configure -event reset-assert "arc_common_reset $_TARGETNAME2"
|
||||
set _coreid [expr {$_coreid + 1}]
|
||||
set _dbgbase [expr {0x00000000 | ($_coreid << 13)}]
|
||||
arc_hs_init_regs
|
||||
|
||||
# Enable L2 cache support for core 2.
|
||||
$_TARGETNAME2 arc cache l2 auto 1
|
||||
|
||||
################################
|
||||
# ARC HS38 core 3
|
||||
################################
|
||||
|
||||
target create $_TARGETNAME3 arcv2 -chain-position $_TARGETNAME3
|
||||
$_TARGETNAME3 configure -coreid $_coreid
|
||||
$_TARGETNAME3 configure -dbgbase $_dbgbase
|
||||
$_TARGETNAME3 configure -event reset-assert "arc_common_reset $_TARGETNAME3"
|
||||
set _coreid [expr {$_coreid + 1}]
|
||||
set _dbgbase [expr {0x00000000 | ($_coreid << 13)}]
|
||||
arc_hs_init_regs
|
||||
|
||||
# Enable L2 cache support for core 3.
|
||||
$_TARGETNAME3 arc cache l2 auto 1
|
||||
|
||||
################################
|
||||
# ARC HS38 core 4
|
||||
################################
|
||||
|
||||
target create $_TARGETNAME4 arcv2 -chain-position $_TARGETNAME4
|
||||
$_TARGETNAME4 configure -coreid $_coreid
|
||||
$_TARGETNAME4 configure -dbgbase $_dbgbase
|
||||
# Flush L2$.
|
||||
$_TARGETNAME4 configure -event reset-assert "arc_hs_reset $_TARGETNAME4"
|
||||
set _coreid [expr {$_coreid + 1}]
|
||||
set _dbgbase [expr {0x00000000 | ($_coreid << 13)}]
|
||||
arc_hs_init_regs
|
||||
|
||||
# Enable L2 cache support for core 4.
|
||||
$_TARGETNAME4 arc cache l2 auto 1
|
||||
|
||||
################################
|
||||
# ARC HS38 core 1
|
||||
################################
|
||||
|
||||
target create $_TARGETNAME1 arcv2 -chain-position $_TARGETNAME1
|
||||
$_TARGETNAME1 configure -coreid $_coreid
|
||||
$_TARGETNAME1 configure -dbgbase $_dbgbase
|
||||
$_TARGETNAME1 configure -event reset-assert "arc_common_reset $_TARGETNAME1"
|
||||
set _coreid [expr {$_coreid + 1}]
|
||||
set _dbgbase [expr {0x00000000 | ($_coreid << 13)}]
|
||||
arc_hs_init_regs
|
||||
|
||||
# Enable L2 cache support for core 1.
|
||||
$_TARGETNAME1 arc cache l2 auto 1
|
||||
|
||||
target smp $_TARGETNAME1 $_TARGETNAME2 $_TARGETNAME3 $_TARGETNAME4
|
||||
|
||||
# vi:ft=tcl
|
||||
5
boards/snps/hsdk4xd/CMakeLists.txt
Normal file
5
boards/snps/hsdk4xd/CMakeLists.txt
Normal file
|
|
@ -0,0 +1,5 @@
|
|||
#
|
||||
# Copyright (c) 2023 Synopsys, Inc. All rights reserved.
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
12
boards/snps/hsdk4xd/Kconfig.hsdk4xd
Normal file
12
boards/snps/hsdk4xd/Kconfig.hsdk4xd
Normal file
|
|
@ -0,0 +1,12 @@
|
|||
# DesignWare ARC HSDK4XD Development Kit board configuration
|
||||
|
||||
# Copyright (c) 2023 Synopsys, Inc. All rights reserved.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
config BOARD_HSDK4XD
|
||||
select SOC_ARC_HSDK4XD
|
||||
help
|
||||
The ARC HS4x/4xD Development Kit is a ready-to-use software development
|
||||
platform for the ARC HS4x/4xD family of processor IP. It includes
|
||||
a multicore ARC HS4x/HS4xD-based chip and integrates a wide range
|
||||
of interfaces.
|
||||
6
boards/snps/hsdk4xd/board.cmake
Normal file
6
boards/snps/hsdk4xd/board.cmake
Normal file
|
|
@ -0,0 +1,6 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
board_runner_args(openocd "--use-elf")
|
||||
board_runner_args(mdb-hw "--jtag=digilent" "--cores=${CONFIG_MP_MAX_NUM_CPUS}")
|
||||
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
|
||||
include(${ZEPHYR_BASE}/boards/common/mdb-hw.board.cmake)
|
||||
5
boards/snps/hsdk4xd/board.yml
Normal file
5
boards/snps/hsdk4xd/board.yml
Normal file
|
|
@ -0,0 +1,5 @@
|
|||
board:
|
||||
name: hsdk4xd
|
||||
vendor: snps
|
||||
socs:
|
||||
- name: arc_hsdk4xd
|
||||
BIN
boards/snps/hsdk4xd/doc/arduino_shield_interface.jpg
Normal file
BIN
boards/snps/hsdk4xd/doc/arduino_shield_interface.jpg
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 36 KiB |
BIN
boards/snps/hsdk4xd/doc/hsdk4xd.jpg
Normal file
BIN
boards/snps/hsdk4xd/doc/hsdk4xd.jpg
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 95 KiB |
557
boards/snps/hsdk4xd/doc/index.rst
Normal file
557
boards/snps/hsdk4xd/doc/index.rst
Normal file
|
|
@ -0,0 +1,557 @@
|
|||
.. _hsdk4xd:
|
||||
|
||||
DesignWare(R) ARC(R) HS4x/HS4xD Development Kit
|
||||
###############################################
|
||||
|
||||
Overview
|
||||
********
|
||||
|
||||
The ARC HS4x/HS4xD Development Kit is the next revision of :ref:`Synopsys HSDK board <hsdk>`.
|
||||
It includes a multicore ARC HS4xD-based chip that integrates a wide range of interfaces
|
||||
including Ethernet, HDMI, WiFi, Bluetooth, USB, SDIO, I2C, SPI, UART, I2S, ADC, PWM and GPIO,
|
||||
as well as a Think Silicon GPU.
|
||||
|
||||
.. image:: hsdk4xd.jpg
|
||||
:align: center
|
||||
:alt: DesignWare(R) ARC(R) HS4x/HS4xD Development Kit (synopsys.com)
|
||||
|
||||
For details about the board, see: `ARC HS4x/HS4xD Development Kit
|
||||
(HSDK4xD) <https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit>`__
|
||||
|
||||
Hardware
|
||||
********
|
||||
|
||||
The ARC HSDK4xD has 24 general GPIOs, which divided into 8 groups named from ``GPIO_SEL_0`` to ``GPIO_SEL_7``.
|
||||
Each sel can configured for different functions, such as: GPIO, UART, SPI, I2C and PWM. We can program
|
||||
``CREG_GPIO_MUX`` register to do configuration for each sel. Tables below show the bit definition for
|
||||
``CREG_GPIO_MUX`` register and the details configuration for each pin.
|
||||
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| Bit | Name | Access | Reset value | Description |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 2:0 | GPIO_SEL_0 | RW | 0x0 | GPIO mux select for gpio[3:0] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 5:3 | GPIO_SEL_1 | RW | 0x0 | GPIO mux select for gpio[7:4] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 8:6 | GPIO_SEL_2 | RW | 0x0 | GPIO mux select for gpio[11:8] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 11:9 | GPIO_SEL_3 | RW | 0x0 | GPIO mux select for gpio[15:12] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 14:12 | GPIO_SEL_4 | RW | 0x0 | GPIO mux select for gpio[17:16] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 17:15 | GPIO_SEL_5 | RW | 0x0 | GPIO mux select for gpio[19:18] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 20:18 | GPIO_SEL_6 | RW | 0x0 | GPIO mux select for gpio[21:20] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
| 23:21 | GPIO_SEL_7 | RW | 0x0 | GPIO mux select for gpio[23:22] |
|
||||
+--------+-------------+---------+--------------+---------------------------------+
|
||||
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SELS | GPIO PINS | FUN0 | FUN1 | FUN2 | FUN3 | FUN4 | FUN5 | FUN6 | FUN7 |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL0 | 0 | gpio[0] | uart0_cts | spi1_cs[0] | gpio[0] | gpio[0] | pwm_ch[6] | pwm_ch[6] | pwm_ch[1] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 1 | gpio[1] | uart0_txd | spi1_mosi | gpio[1] | pwm_ch[0] | gpio[1] | pwm_ch[0] | pwm_ch[0] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 2 | gpio[2] | uart0_rxd | spi1 _miso | i2c1_scl | gpio[2] | gpio[2] | gpio[2] | gpio[2] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 3 | gpio[3] | uart0_rts | spi1_clk | i2c1_sda | gpio[3] | gpio[3] | gpio[3] | gpio[3] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL1 | 4 | gpio[4] | uart1_cts | spi2_cs[0] | gpio[4] | gpio[4] | pwm_ch[4] | pwm_ch[4] | pwm_ch[3] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 5 | gpio[5] | uart1_txd | spi2_mosi | gpio[5] | pwm_ch[2] | gpio[5] | pwm_ch[2] | pwm_ch[2] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 6 | gpio[6] | uart1_rxd | spi2_miso | i2c2_scl | gpio[6] | gpio[6] | gpio[6] | gpio[6] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 7 | gpio[7] | uart1_rts | spi2_clk | i2c2_sda | gpio[7] | gpio[7] | gpio[7] | gpio[7] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL2 | 8 | gpio[8] | uart2_cts | spi1_cs[1] | gpio[8] | gpio[8] | pwm_ch[2] | pwm_ch[2] | pwm_ch[5] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 9 | gpio[9] | uart2_txd | spi1_mosi | gpio[9] | pwm_ch[4] | gpio[9] | pwm_ch[4] | pwm_ch[4] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 10 | gpio[10] | uart2_rxd | spi1_miso | i2c1_scl | gpio[10] | gpio[10] | gpio[10] | gpio[10] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 11 | gpio[11] | uart2_rts | spi1_clk | i2c1_sda | gpio[11] | gpio[11] | gpio[11] | gpio[11] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL3 | 12 | gpio[12] | uart0_cts | spi2_cs[1] | gpio[12] | gpio[12] | pwm_ch[0] | pwm_ch[0] | pwm_ch[7] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 13 | gpio[13] | uart0_txd | spi2_mosi | gpio[13] | pwm_ch[6] | gpio[13] | pwm_ch[6] | pwm_ch[6] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 14 | gpio[14] | uart0_rxd | spi2_miso | i2c2_scl | gpio[14] | gpio[14] | gpio[14] | gpio[14] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 15 | gpio[15] | uart0_rts | spi2_clk | i2c2_sda | gpio[15] | gpio[15] | gpio[15] | gpio[15] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL4 | 16 | gpio[16] | uart1_txd | spi1_cs[2] | i2c1_scl | gpio[16] | pwm_fault_0 | gpio[16] | pwm_fault_0 |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 17 | gpio[17] | uart1_rxd | spi1_mosi | i2c1_sda | pwm_ch[0] | pwm_ch[0] | pwm_ch[5] | pwm_ch[5] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL5 | 18 | gpio[18] | uart2_txd | spi1_miso | i2c2_scl | gpio[18] | gpio[18] | gpio[18] | gpio[18] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 19 | gpio[19] | uart2_rxd | spi1_clk | i2c2_sda | gpio[19] | gpio[19] | gpio[19] | gpio[19] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL6 | 20 | gpio[20] | uart0_txd | spi2_cs[2] | i2c1_scl | gpio[20] | pwm_fault_1 | gpio[20] | pwm_fault_1 |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 21 | gpio[21] | uart0_rxd | spi2_mosi | i2c1_sda | pwm_ch[6] | pwm_ch[6] | pwm_ch[3] | pwm_ch[3] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| SEL7 | 22 | gpio[22] | uart2_txd | spi2_miso | i2c2_scl | gpio[22] | gpio[22] | gpio[22] | gpio[22] |
|
||||
| +-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
| | 23 | gpio[23] | uart2_rxd | spi2_clk | i2c2_sda | gpio[23] | gpio[23] | gpio[23] | gpio[23] |
|
||||
+------+-----------+----------+-----------+------------+----------+-----------+-------------+-----------+-------------+
|
||||
|
||||
Digilent Pmod
|
||||
=============
|
||||
|
||||
The ARC HSDK4xD features two 12-pin Pmod connectors ``Pmod_A`` and ``Pmod_B`` and one 6-pin Pmod connector ``Pmod_C``.
|
||||
The functionality of the Pmod connectors is programmable and includes GPIO, UART, SPI, I2C and PWM.
|
||||
The location of the pins on the Pmod connectors is shown in Figure below. Detailed pin descriptions
|
||||
depending on the pin multiplexer settings are provided in the subsequent sections.
|
||||
|
||||
.. image:: pinout_diagram_of_the_pmod.jpg
|
||||
:align: center
|
||||
:alt: Pinout Diagram of the Pmod
|
||||
|
||||
Pmod_A Connector
|
||||
----------------
|
||||
|
||||
Table below lists the pin assignment of valid protocols that can be multiplexed on the ``Pmod_A``
|
||||
connector. The GPIO column is the default assignment after Reset.
|
||||
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| Pin | GPIO | UART | SPI | I2C | PWM_1 | PWM_2 |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A1 | gpio[8] | uart2_cts | spi1_cs[1] | gpio[8] | gpio[8] | pwm_ch[2] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A2 | gpio[9] | uart2_txd | spi1_mosi | gpio[9] | pwm_ch[4] | gpio[9] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A3 | gpio[10] | uart2_rxd | spi1_miso | i2c1_scl | gpio[10] | gpio[10] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A4 | gpio[11] | uart2_rts | spi1_clk | i2c1_sda | gpio[11] | gpio[11] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A5 | GND | GND | GND | GND | GND | GND |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A6 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A7 | gpio[20] | gpio[20] | gpio[20] | gpio[20] | gpio[20] | gpio[20] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A8 | gpio[21] | gpio[21] | gpio[21] | gpio[21] | gpio[21] | gpio[21] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A9 | n.c. | n.c. | n.c. | n.c. | n.c. | n.c. |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A10 | n.c. | n.c. | n.c. | n.c. | n.c. | n.c. |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A11 | GND | GND | GND | GND | GND | GND |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| A12 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
|
||||
Pmod_B Connector
|
||||
----------------
|
||||
|
||||
Table below lists the pin assignment of valid protocols that can be multiplexed on the ``Pmod_B``
|
||||
connector. The GPIO column is the default assignment after Reset.
|
||||
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| Pin | GPIO | UART | SPI | I2C | PWM_1 | PWM_2 |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B1 | gpio[12] | uart0_cts | spi2_cs[1] | gpio[12] | gpio[12] | pwm_ch[0] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B2 | gpio[13] | uart0_txd | spi2_mosi | gpio[13] | pwm_ch[6] | gpio[13] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B3 | gpio[14] | uart0_rxd | spi2_miso | i2c2_scl | gpio[14] | gpio[14] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B4 | gpio[15] | uart0_rts | spi2_clk | i2c2_sda | gpio[15] | gpio[15] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B5 | GND | GND | GND | GND | GND | GND |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B6 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B7 | gpio[22] | gpio[22] | gpio[22] | gpio[22] | gpio[22] | gpio[22] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B8 | gpio[23] | gpio[23] | gpio[23] | gpio[23] | gpio[23] | gpio[23] |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B9 | n.c. | n.c. | n.c. | n.c. | n.c. | n.c. |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B10 | n.c. | n.c. | n.c. | n.c. | n.c. | n.c. |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B11 | GND | GND | GND | GND | GND | GND |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
| B12 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
|
||||
+------+-----------+------------+-------------+-----------+------------+-----------+
|
||||
|
||||
Pmod_C Connector
|
||||
----------------
|
||||
|
||||
Table below lists the pin assignment of valid protocols that can be multiplexed on the ``Pmod_C``
|
||||
connector. The GPIO column is the default assignment after Reset.
|
||||
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| Pin | GPIO | UART | SPI | I2C | PWM |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| C1 | gpio[16] | uart1_txd | spi1_cs[2] | i2c1_scl | gpio[16] |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| C2 | gpio[17] | uart1_rxd | spi1_mosi | i2c1_sda | pwm_ch[0] |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| C3 | gpio[18] | uart2_txd | spi1_miso | i2c2_scl | gpio[18] |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| C4 | gpio[19] | uart2_rxd | spi1_clk | i2c2_sda | gpio[19] |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| C5 | GND | GND | GND | GND | GND |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
| C6 | 3V3 | 3V3 | 3V3 | 3V3 | 3V3 |
|
||||
+------+-----------+------------+-------------+-----------+-----------+
|
||||
|
||||
Mikrobus
|
||||
========
|
||||
|
||||
The ARC HSDK4xD features a set of MikroBUS headers. Figure below shows the relevant function assignments,
|
||||
fully compatible with the MikroBUS standard. Table below shows the pin assignment on the I/O Multiplexer.
|
||||
|
||||
.. image:: mikrobus_header.jpg
|
||||
:align: center
|
||||
:alt: mikrobus header
|
||||
|
||||
+-------+-----------------+------+-----------+
|
||||
| Pin | I/O | Pin | I/O |
|
||||
+-------+-----------------+------+-----------+
|
||||
| AN | ADC VIN6* | PWM | pwm_ch[0] |
|
||||
+-------+-----------------+------+-----------+
|
||||
| RST | GPX_Port0_bit1 | INT | gpio[16] |
|
||||
+-------+-----------------+------+-----------+
|
||||
| CS | spi2_cs[1] | RX | uart2_rxd |
|
||||
+-------+-----------------+------+-----------+
|
||||
| SCK | spi2_clk | TX | uart2_txd |
|
||||
+-------+-----------------+------+-----------+
|
||||
| MISO | spi2_miso | SCL | i2c2_scl |
|
||||
+-------+-----------------+------+-----------+
|
||||
| MOSI | spi2_mosi | SDA | i2c2_sda |
|
||||
+-------+-----------------+------+-----------+
|
||||
|
||||
.. note::
|
||||
ADC VIN6 is available through the on-board ADC and is
|
||||
read though SPI0 using SPI chip select 1.
|
||||
|
||||
Arduino
|
||||
=======
|
||||
|
||||
The ARC HSDK4xD provides an Arduino shield interface. Figure below shows the relevant
|
||||
function assignments. The Arduino shield interface is compatible with the Arduino UNO
|
||||
R3 with the following exceptions: 5 Volt shields are not supported, the IOREF voltage on
|
||||
the ARC HSDK4xD board is fixed to 3V3. Note that the ICSP header is also not available. Most
|
||||
shields do not require this ICSP header as the SPI master interface on this ICSP header
|
||||
is also available on the ``IO10`` to ``IO13`` pins.
|
||||
|
||||
.. image:: arduino_shield_interface.jpg
|
||||
:align: center
|
||||
:alt: arduino shield interface
|
||||
|
||||
Table below shows the pin assignment on the I/O Multiplexer. Multiplexing is controlled by software
|
||||
using the ``CREG_GPIO_MUX`` register (see Pinmux ). After a reset, all ports are configured as GPIO inputs.
|
||||
|
||||
+-------+------------+-----------------+------------+
|
||||
| Pin | I/O-1 | I/O-2 | I/O-3 |
|
||||
+-------+------------+-----------------+------------+
|
||||
| AD0 | ADC VIN0* | GPX_port0_bit2 | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| AD1 | ADC VIN1* | GPX_port0_bit3 | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| AD2 | ADC VIN2* | GPX_port0_bit4 | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| AD3 | ADC VIN3* | GPX_port0_bit5 | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| AD4 | ADC VIN4* | gpio[18] | i2c2_sda |
|
||||
+-------+------------+-----------------+------------+
|
||||
| AD5 | ADC VIN5* | gpio[19] | i2c2_scl |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO0 | gpio[23] | uart2_rxd | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO1 | gpio[22] | uart2_txd | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO2 | gpio[16] | - | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO3 | gpio[17] | pwm_ch[5] | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO4 | gpio[11] | - | |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO5 | gpio[9] | pwm_ch[4] | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO6 | gpio[21] | pwm_ch[3] | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO7 | gpio[20] | - | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO8 | gpio[10] | - | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO9 | gpio[8] | pwm_ch[2] | - |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO10 | gpio[12] | pwm_ch[0] | spi2_cs[1] |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO11 | gpio[13] | pwm_ch[6] | spi2_mosi |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO12 | gpio[14] | - | spi2_miso |
|
||||
+-------+------------+-----------------+------------+
|
||||
| IO13 | gpio[15] | - | spi2_clk |
|
||||
+-------+------------+-----------------+------------+
|
||||
|
||||
I/O expander
|
||||
============
|
||||
|
||||
The ARC HSDK4xD board includes a CY8C9520A I/O expander from `Cypress CY8C9520A
|
||||
<https://www.cypress.com/file/37971/download>`__. The I/O
|
||||
expander offers additional GPIO signals and board control signals and can be accessed
|
||||
through the on-board I2C bus, we have implemented a basic driver for it.
|
||||
Tables below shows an overview of relevant I/O signals.
|
||||
|
||||
+------------+---------------------------------------------+
|
||||
| Pins | Usage |
|
||||
+------------+---------------------------------------------+
|
||||
| port0_bit0 | RS9113 Bluetooth I2S RX enable (active low) |
|
||||
+------------+---------------------------------------------+
|
||||
| port0_bit1 | mikroBUS Reset (active low) |
|
||||
+------------+---------------------------------------------+
|
||||
| port0_bit2 | GPIO for Arduino AD0 |
|
||||
+------------+---------------------------------------------+
|
||||
| port0_bit3 | GPIO for Arduino AD1 |
|
||||
+------------+---------------------------------------------+
|
||||
| port0_bit4 | GPIO for Arduino AD2 |
|
||||
+------------+---------------------------------------------+
|
||||
| port0_bit5 | GPIO for Arduino AD3 |
|
||||
+------------+---------------------------------------------+
|
||||
| port1_bit4 | On-board user LED0 |
|
||||
+------------+---------------------------------------------+
|
||||
| port1_bit5 | On-board user LED1 |
|
||||
+------------+---------------------------------------------+
|
||||
| port1_bit6 | On-board user LED2 |
|
||||
+------------+---------------------------------------------+
|
||||
| port1_bit7 | On-board user LED3 |
|
||||
+------------+---------------------------------------------+
|
||||
|
||||
On-board user LEDS
|
||||
==================
|
||||
|
||||
The ARC HSDK4xD includes 4 user LEDs(active high), which can be controlled through the I/O expander pins.
|
||||
|
||||
+-------+-----------------+
|
||||
| LEDs | PINs |
|
||||
+-------+-----------------+
|
||||
| LED0 | GPX_port1_bit4 |
|
||||
+-------+-----------------+
|
||||
| LED1 | GPX_port1_bit5 |
|
||||
+-------+-----------------+
|
||||
| LED2 | GPX_port1_bit6 |
|
||||
+-------+-----------------+
|
||||
| LED3 | GPX_port1_bit7 |
|
||||
+-------+-----------------+
|
||||
|
||||
For hardware feature details, refer to : `Designware HS4x/HS4xD Development Kit website
|
||||
<https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit>`__.
|
||||
|
||||
Programming and Debugging
|
||||
*************************
|
||||
|
||||
Required Hardware and Software
|
||||
==============================
|
||||
|
||||
To use Zephyr RTOS applications on the HS4x/HS4xD Development Kit board, a few
|
||||
additional pieces of hardware are required.
|
||||
|
||||
* A micro USB cable provides USB-JTAG debug and USB-UART communication
|
||||
to the board
|
||||
|
||||
* A universal switching power adaptor (110-240V
|
||||
AC to 12V DC), provided in the package, provides power to the board.
|
||||
|
||||
* :ref:`The Zephyr SDK <toolchain_zephyr_sdk>`
|
||||
|
||||
* Terminal emulator software for use with the USB-UART. Suggestion:
|
||||
`Putty Website`_.
|
||||
|
||||
* (optional) A collection of Pmods, Arduino modules, or Mikro modules.
|
||||
See `Digilent Pmod Modules`_ or develop your custom interfaces to attach
|
||||
to the Pmod connector.
|
||||
|
||||
Set up the ARC HS4x/HS4xD Development Kit
|
||||
=========================================
|
||||
|
||||
To run Zephyr application on ARC HS4x/HS4xD Development Kit, you need to
|
||||
set up the board correctly.
|
||||
|
||||
* Connect the digilent USB cable from your host to the board.
|
||||
|
||||
* Connect the 12V DC power supply to your board
|
||||
|
||||
Set up Zephyr Software
|
||||
======================
|
||||
|
||||
Building Sample Applications
|
||||
==============================
|
||||
|
||||
You can try many of the :ref:`sample applications and demos
|
||||
<samples-and-demos>`. We'll use :ref:`hello_world`, found in
|
||||
:zephyr_file:`samples/hello_world` as an example.
|
||||
|
||||
Configuring
|
||||
-----------
|
||||
|
||||
You may need to write a ``prj.conf`` file if the sample doesn't have one.
|
||||
Next, you can use the menuconfig rule to configure the target. By specifying
|
||||
``hsdk4xd`` as the board configuration, you can select the ARC HS4x/HS4xD Development
|
||||
Kit board support for Zephyr.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: hsdk4xd
|
||||
:zephyr-app: samples/hello_world
|
||||
:goals: menuconfig
|
||||
|
||||
|
||||
Building
|
||||
--------
|
||||
|
||||
You can build an application in the usual way. Refer to
|
||||
:ref:`build_an_application` for more details. Here is an example for
|
||||
:ref:`hello_world`.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: hsdk4xd
|
||||
:zephyr-app: samples/hello_world
|
||||
:maybe-skip-config:
|
||||
:goals: build
|
||||
|
||||
|
||||
Connecting Serial Output
|
||||
=========================
|
||||
|
||||
In the default configuration, Zephyr's HS4x/HS4xD Development Kit images support
|
||||
serial output via the USB-UART on the board. To enable serial output:
|
||||
|
||||
* Open a serial port emulator (i.e. on Linux minicom, putty, screen, etc)
|
||||
|
||||
* Specify the tty driver name, for example, on Linux this may be
|
||||
:file:`/dev/ttyUSB0`
|
||||
|
||||
* Set the communication settings to:
|
||||
|
||||
|
||||
========= =====
|
||||
Parameter Value
|
||||
========= =====
|
||||
Baud: 115200
|
||||
Data: 8 bits
|
||||
Parity: None
|
||||
Stopbits: 1
|
||||
========= =====
|
||||
|
||||
Debugging
|
||||
==========
|
||||
|
||||
Using the latest version of Zephyr SDK(>=0.15.2), you can debug and
|
||||
flash (run) HS4x/HS4xD Development Kit directly.
|
||||
|
||||
One option is to build and debug the application using the usual
|
||||
Zephyr build system commands.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: hsdk4xd
|
||||
:app: <my app>
|
||||
:goals: debug
|
||||
|
||||
At this point you can do your normal debug session. Set breakpoints and then
|
||||
:kbd:`c` to continue into the program.
|
||||
|
||||
The other option is to launch a debug server, as follows.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: hsdk4xd
|
||||
:app: <my app>
|
||||
:goals: debugserver
|
||||
|
||||
Then connect to the debug server at the HS4x/HS4xD Development Kit from a second
|
||||
console, from the build directory containing the output :file:`zephyr.elf`.
|
||||
|
||||
.. code-block:: console
|
||||
|
||||
$ cd <my app>
|
||||
$ $ZEPHYR_SDK_INSTALL_DIR/arc-zephyr-elf/arc-zephyr-elf-gdb zephyr.elf
|
||||
(gdb) target remote localhost:3333
|
||||
(gdb) load
|
||||
(gdb) b main
|
||||
(gdb) c
|
||||
|
||||
Flashing
|
||||
========
|
||||
|
||||
If you just want to download the application to the HS4x/HS4xD Development Kit's DDR
|
||||
and run, you can do so in the usual way.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: hsdk4xd
|
||||
:app: <my app>
|
||||
:goals: flash
|
||||
|
||||
This command still uses openocd and gdb to load the application elf file to
|
||||
HS4x/HS4xD Development Kit, but it will load the application and immediately run. If
|
||||
power is removed, the application will be lost since it wasn't written to flash.
|
||||
|
||||
Most of the time you will not be flashing your program but will instead debug
|
||||
it using openocd and gdb. The program can be download via the USB cable into
|
||||
the code and data memories.
|
||||
|
||||
The HS4x/HS4xD Development Kit also supports flashing the Zephyr application
|
||||
with the U-Boot bootloader, a powerful and flexible tool for loading
|
||||
an executable from different sources and running it on the target platform.
|
||||
|
||||
The U-Boot implementation for the HS4x/HS4xD Development Kit was further extended with
|
||||
additional functionality that allows users to better manage the broad
|
||||
configurability of the HS4x/HS4xD Development Kit
|
||||
|
||||
When you are ready to deploy the program so that it boots up automatically on
|
||||
reset or power-up, you can follow the steps to place the program on SD card.
|
||||
|
||||
For details, see: `Uboot-HS4x/HS4xD-Command-Reference
|
||||
<https://github.com/foss-for-synopsys-dwc-arc-processors/linux/wiki/Uboot-HSDK-4xD-Command-Reference#launching-baremetal-application-on-hsdk-4xd>`__
|
||||
|
||||
Supported peripheral
|
||||
====================
|
||||
|
||||
The following list indicates the state of HS4x/HS4xD Development Kit peripherals’ support
|
||||
|
||||
+------------+---------+
|
||||
| Peripheral | Support |
|
||||
+------------+---------+
|
||||
| ADC | No |
|
||||
+------------+---------+
|
||||
| Bluetooth | No |
|
||||
+------------+---------+
|
||||
| Ethernet | No |
|
||||
+------------+---------+
|
||||
| GPIO | No |
|
||||
+------------+---------+
|
||||
| GPU | No |
|
||||
+------------+---------+
|
||||
| HDMI | No |
|
||||
+------------+---------+
|
||||
| I2C | No |
|
||||
+------------+---------+
|
||||
| I2S | No |
|
||||
+------------+---------+
|
||||
| PWM | No |
|
||||
+------------+---------+
|
||||
| SDIO | No |
|
||||
+------------+---------+
|
||||
| SPI | No |
|
||||
+------------+---------+
|
||||
| UART | Yes |
|
||||
+------------+---------+
|
||||
| USB | No |
|
||||
+------------+---------+
|
||||
| WiFi | No |
|
||||
+------------+---------+
|
||||
|
||||
References
|
||||
**********
|
||||
|
||||
.. _embARC website: https://www.embarc.org
|
||||
|
||||
.. _Designware HS Development Kit website: https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit
|
||||
|
||||
.. _Digilent Pmod Modules: http://store.digilentinc.com/pmod-modules
|
||||
|
||||
.. _Putty website: http://www.putty.org
|
||||
BIN
boards/snps/hsdk4xd/doc/mikrobus_header.jpg
Normal file
BIN
boards/snps/hsdk4xd/doc/mikrobus_header.jpg
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 32 KiB |
BIN
boards/snps/hsdk4xd/doc/pinout_diagram_of_the_pmod.jpg
Normal file
BIN
boards/snps/hsdk4xd/doc/pinout_diagram_of_the_pmod.jpg
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 69 KiB |
36
boards/snps/hsdk4xd/hsdk4xd.dts
Normal file
36
boards/snps/hsdk4xd/hsdk4xd.dts
Normal file
|
|
@ -0,0 +1,36 @@
|
|||
/*
|
||||
* Copyright (c) 2023, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <synopsys/arc_hs4xd.dtsi>
|
||||
|
||||
/ {
|
||||
model = "hsdk4xd";
|
||||
compatible = "snps,hsdk4xd";
|
||||
|
||||
aliases {
|
||||
uart-dbg = &uart_dbg;
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &ddr0;
|
||||
zephyr,console = &uart_dbg;
|
||||
zephyr,shell-uart = &uart_dbg;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
arduino_spi: &spi2 {};
|
||||
|
||||
&uart_dbg {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
&creg_gpio {
|
||||
status = "okay";
|
||||
};
|
||||
16
boards/snps/hsdk4xd/hsdk4xd.yaml
Normal file
16
boards/snps/hsdk4xd/hsdk4xd.yaml
Normal file
|
|
@ -0,0 +1,16 @@
|
|||
identifier: hsdk4xd
|
||||
name: HS4xD Development Kit
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
- arcmwdt
|
||||
supported:
|
||||
- smp
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
14
boards/snps/hsdk4xd/hsdk4xd_defconfig
Normal file
14
boards/snps/hsdk4xd/hsdk4xd_defconfig
Normal file
|
|
@ -0,0 +1,14 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
|
||||
CONFIG_BUILD_NO_GAP_FILL=y
|
||||
CONFIG_BUILD_OUTPUT_BIN=n
|
||||
CONFIG_ARCV2_INTERRUPT_UNIT=y
|
||||
CONFIG_ARCV2_TIMER=y
|
||||
CONFIG_CONSOLE=y
|
||||
CONFIG_UART_CONSOLE=y
|
||||
CONFIG_SERIAL=y
|
||||
CONFIG_GPIO=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_MP_MAX_NUM_CPUS=4
|
||||
CONFIG_ARC_DSP_TURNED_OFF=y
|
||||
114
boards/snps/hsdk4xd/support/openocd.cfg
Normal file
114
boards/snps/hsdk4xd/support/openocd.cfg
Normal file
|
|
@ -0,0 +1,114 @@
|
|||
# Copyright (C) 2019-2023 Synopsys, Inc.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
# Configure JTAG cable
|
||||
# SDP has built-in FT2232 chip, which is similar to Digilent HS-1, except that
|
||||
# it uses channel B for JTAG, instead of channel A.
|
||||
adapter driver ftdi
|
||||
|
||||
# Only specify FTDI serial number if it is specified via
|
||||
# "set _ZEPHYR_BOARD_SERIAL 12345" before reading this script
|
||||
if { [info exists _ZEPHYR_BOARD_SERIAL] } {
|
||||
adapter serial $_ZEPHYR_BOARD_SERIAL
|
||||
}
|
||||
|
||||
ftdi vid_pid 0x0403 0x6010
|
||||
ftdi layout_init 0x0088 0x008b
|
||||
ftdi channel 1
|
||||
|
||||
|
||||
adapter speed 10000
|
||||
|
||||
# ARCs supports only JTAG.
|
||||
transport select jtag
|
||||
|
||||
|
||||
#
|
||||
# HS Development Kit SoC.
|
||||
#
|
||||
# Contains quad-core ARC HS4x.
|
||||
#
|
||||
|
||||
source [find cpu/arc/hs.tcl]
|
||||
|
||||
set _coreid 0
|
||||
set _dbgbase [expr {0x00000000 | ($_coreid << 13)}]
|
||||
|
||||
# CHIPNAME will be used to choose core family (600, 700 or EM). As far as
|
||||
# OpenOCD is concerned EM and HS are identical.
|
||||
set _CHIPNAME arc-em
|
||||
|
||||
# OpenOCD discovers JTAG TAPs in reverse order.
|
||||
|
||||
set _TARGETNAME4 $_CHIPNAME.cpu4
|
||||
jtag newtap $_CHIPNAME cpu4 -irlen 4 -ircapture 0x1 -expected-id 0x100c54b1
|
||||
set _TARGETNAME3 $_CHIPNAME.cpu3
|
||||
jtag newtap $_CHIPNAME cpu3 -irlen 4 -ircapture 0x1 -expected-id 0x100854b1
|
||||
set _TARGETNAME2 $_CHIPNAME.cpu2
|
||||
jtag newtap $_CHIPNAME cpu2 -irlen 4 -ircapture 0x1 -expected-id 0x100454b1
|
||||
set _TARGETNAME1 $_CHIPNAME.cpu1
|
||||
jtag newtap $_CHIPNAME cpu1 -irlen 4 -ircapture 0x1 -expected-id 0x100054b1
|
||||
|
||||
################################
|
||||
# ARC HS4x core 2
|
||||
################################
|
||||
|
||||
target create $_TARGETNAME2 arcv2 -chain-position $_TARGETNAME2
|
||||
$_TARGETNAME2 configure -coreid $_coreid
|
||||
$_TARGETNAME2 configure -dbgbase $_dbgbase
|
||||
$_TARGETNAME2 configure -event reset-assert "arc_common_reset $_TARGETNAME2"
|
||||
set _coreid [expr {$_coreid + 1}]
|
||||
set _dbgbase [expr {0x00000000 | ($_coreid << 13)}]
|
||||
arc_hs_init_regs
|
||||
|
||||
# Enable L2 cache support for core 2.
|
||||
$_TARGETNAME2 arc cache l2 auto 1
|
||||
|
||||
################################
|
||||
# ARC HS4x core 3
|
||||
################################
|
||||
|
||||
target create $_TARGETNAME3 arcv2 -chain-position $_TARGETNAME3
|
||||
$_TARGETNAME3 configure -coreid $_coreid
|
||||
$_TARGETNAME3 configure -dbgbase $_dbgbase
|
||||
$_TARGETNAME3 configure -event reset-assert "arc_common_reset $_TARGETNAME3"
|
||||
set _coreid [expr {$_coreid + 1}]
|
||||
set _dbgbase [expr {0x00000000 | ($_coreid << 13)}]
|
||||
arc_hs_init_regs
|
||||
|
||||
# Enable L2 cache support for core 3.
|
||||
$_TARGETNAME3 arc cache l2 auto 1
|
||||
|
||||
################################
|
||||
# ARC HS4x core 4
|
||||
################################
|
||||
|
||||
target create $_TARGETNAME4 arcv2 -chain-position $_TARGETNAME4
|
||||
$_TARGETNAME4 configure -coreid $_coreid
|
||||
$_TARGETNAME4 configure -dbgbase $_dbgbase
|
||||
# Flush L2$.
|
||||
$_TARGETNAME4 configure -event reset-assert "arc_hs_reset $_TARGETNAME4"
|
||||
set _coreid [expr {$_coreid + 1}]
|
||||
set _dbgbase [expr {0x00000000 | ($_coreid << 13)}]
|
||||
arc_hs_init_regs
|
||||
|
||||
# Enable L2 cache support for core 4.
|
||||
$_TARGETNAME4 arc cache l2 auto 1
|
||||
|
||||
################################
|
||||
# ARC HS4x core 1
|
||||
################################
|
||||
|
||||
target create $_TARGETNAME1 arcv2 -chain-position $_TARGETNAME1
|
||||
$_TARGETNAME1 configure -coreid $_coreid
|
||||
$_TARGETNAME1 configure -dbgbase $_dbgbase
|
||||
$_TARGETNAME1 configure -event reset-assert "arc_common_reset $_TARGETNAME1"
|
||||
set _coreid [expr {$_coreid + 1}]
|
||||
set _dbgbase [expr {0x00000000 | ($_coreid << 13)}]
|
||||
arc_hs_init_regs
|
||||
|
||||
# Enable L2 cache support for core 1.
|
||||
$_TARGETNAME1 arc cache l2 auto 1
|
||||
|
||||
target smp $_TARGETNAME1 $_TARGETNAME2 $_TARGETNAME3 $_TARGETNAME4
|
||||
10
boards/snps/index.rst
Normal file
10
boards/snps/index.rst
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
.. _boards-synopsys:
|
||||
|
||||
Synopsys
|
||||
########
|
||||
|
||||
.. toctree::
|
||||
:maxdepth: 1
|
||||
:glob:
|
||||
|
||||
**/*
|
||||
3
boards/snps/iotdk/CMakeLists.txt
Normal file
3
boards/snps/iotdk/CMakeLists.txt
Normal file
|
|
@ -0,0 +1,3 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
zephyr_sources_ifdef(CONFIG_ARC_MPU_ENABLE arc_mpu_regions.c)
|
||||
14
boards/snps/iotdk/Kconfig.iotdk
Normal file
14
boards/snps/iotdk/Kconfig.iotdk
Normal file
|
|
@ -0,0 +1,14 @@
|
|||
# DesignWare ARC IoT Development Kit board configuration
|
||||
|
||||
# Copyright (c) 2018 Synopsys, Inc. All rights reserved.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
config BOARD_IOTDK
|
||||
select SOC_ARC_IOT
|
||||
help
|
||||
The DesignWare ARC IoT Development Kit board is a versatile platform that includes the
|
||||
necessary hardware and software to accelerate software development and debugging of
|
||||
sensor fusion, voice recognition and face detection designs. It includes a silicon
|
||||
implementation of the ARC Data Fusion IP Subsystem running at 144 MHz on SMIC's 55-nm
|
||||
ultra-low power process, and a rich set of peripherals commonly used in IoT designs
|
||||
such as USB, UART, SPI, I2C, PWM, SDIO and ADCs.
|
||||
56
boards/snps/iotdk/arc_mpu_regions.c
Normal file
56
boards/snps/iotdk/arc_mpu_regions.c
Normal file
|
|
@ -0,0 +1,56 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Synopsys
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <zephyr/devicetree.h>
|
||||
#include <zephyr/arch/arc/v2/mpu/arc_mpu.h>
|
||||
#include <zephyr/linker/linker-defs.h>
|
||||
|
||||
static struct arc_mpu_region mpu_regions[] = {
|
||||
/* Region ICCM */
|
||||
MPU_REGION_ENTRY("ICCM",
|
||||
DT_REG_ADDR(DT_INST(0, arc_iccm)),
|
||||
DT_REG_SIZE(DT_INST(0, arc_iccm)),
|
||||
REGION_ROM_ATTR),
|
||||
/* Region DCCM */
|
||||
MPU_REGION_ENTRY("DCCM",
|
||||
DT_REG_ADDR(DT_INST(0, arc_dccm)),
|
||||
DT_REG_SIZE(DT_INST(0, arc_dccm)),
|
||||
REGION_KERNEL_RAM_ATTR),
|
||||
/* Region XCCM */
|
||||
#if DT_REG_SIZE(DT_INST(0, arc_xccm)) > 0
|
||||
MPU_REGION_ENTRY("XCCM",
|
||||
DT_REG_ADDR(DT_INST(0, arc_xccm)),
|
||||
DT_REG_SIZE(DT_INST(0, arc_xccm)),
|
||||
REGION_KERNEL_RAM_ATTR),
|
||||
#endif
|
||||
/* Region YCCM */
|
||||
#if DT_REG_SIZE(DT_INST(0, arc_yccm)) > 0
|
||||
MPU_REGION_ENTRY("YCCM",
|
||||
DT_REG_ADDR(DT_INST(0, arc_yccm)),
|
||||
DT_REG_SIZE(DT_INST(0, arc_yccm)),
|
||||
REGION_KERNEL_RAM_ATTR),
|
||||
#endif
|
||||
/* Region DDR RAM */
|
||||
MPU_REGION_ENTRY("SRAM",
|
||||
CONFIG_SRAM_BASE_ADDRESS,
|
||||
CONFIG_SRAM_SIZE * 1024,
|
||||
REGION_KERNEL_RAM_ATTR |
|
||||
AUX_MPU_ATTR_KE | AUX_MPU_ATTR_UE),
|
||||
MPU_REGION_ENTRY("FLASH_0",
|
||||
CONFIG_FLASH_BASE_ADDRESS,
|
||||
CONFIG_FLASH_SIZE * 1024,
|
||||
REGION_ROM_ATTR),
|
||||
/* Region Peripheral */
|
||||
MPU_REGION_ENTRY("PERIPHERAL",
|
||||
0xF0000000,
|
||||
64 * 1024,
|
||||
REGION_KERNEL_RAM_ATTR),
|
||||
};
|
||||
|
||||
struct arc_mpu_config mpu_config = {
|
||||
.num_regions = ARRAY_SIZE(mpu_regions),
|
||||
.mpu_regions = mpu_regions,
|
||||
};
|
||||
6
boards/snps/iotdk/board.cmake
Normal file
6
boards/snps/iotdk/board.cmake
Normal file
|
|
@ -0,0 +1,6 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
board_runner_args(openocd "--use-elf")
|
||||
board_runner_args(mdb-hw "--jtag=digilent")
|
||||
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
|
||||
include(${ZEPHYR_BASE}/boards/common/mdb-hw.board.cmake)
|
||||
5
boards/snps/iotdk/board.yml
Normal file
5
boards/snps/iotdk/board.yml
Normal file
|
|
@ -0,0 +1,5 @@
|
|||
board:
|
||||
name: iotdk
|
||||
vendor: snps
|
||||
socs:
|
||||
- name: arc_iot
|
||||
198
boards/snps/iotdk/doc/index.rst
Normal file
198
boards/snps/iotdk/doc/index.rst
Normal file
|
|
@ -0,0 +1,198 @@
|
|||
.. _iotdk:
|
||||
|
||||
DesignWare(R) ARC(R) IoT Development Kit
|
||||
########################################
|
||||
|
||||
Overview
|
||||
********
|
||||
|
||||
The DesignWare(R) ARC(R) IoT Development Kit is a versatile platform that
|
||||
includes the necessary hardware and software to accelerate software
|
||||
development and debugging of sensor fusion, voice recognition, and face
|
||||
detection designs. The ARC IoT Development Kit includes a silicon
|
||||
implementation of the ARC Data Fusion IP Subsystem running at 144 MHz on
|
||||
SMIC's 55-nm ultra-low power process, and a rich set of peripherals commonly
|
||||
used in IoT designs such as USB, UART, SPI, I2C, PWM, SDIO, and ADCs.
|
||||
|
||||
.. image:: iotdk.jpg
|
||||
:align: center
|
||||
:alt: DesignWare(R) ARC(R)IoT Development Kit (synopsys.com)
|
||||
|
||||
For details about the board, see: `ARC IoT Development Kit
|
||||
(IoTDK) <https://www.synopsys.com/dw/ipdir.php?ds=arc_iot_development_kit>`__
|
||||
|
||||
|
||||
Hardware
|
||||
********
|
||||
|
||||
For hardware feature details, refer to : `ARC IoT Development Kit
|
||||
<https://embarc.org/project/arc-iot-development-kit/>`__
|
||||
|
||||
|
||||
Programming and Debugging
|
||||
*************************
|
||||
|
||||
Required Hardware and Software
|
||||
==============================
|
||||
|
||||
To use Zephyr RTOS applications on the IoT Development Kit board, a few
|
||||
additional pieces of hardware are required.
|
||||
|
||||
* A micro USB cable provides power to the board; however, if the
|
||||
board is to run standalone, the universal switching power adaptor (110-240V
|
||||
AC to 5V DC), provided in the package, can be used to power the board.
|
||||
|
||||
* :ref:`The Zephyr SDK <toolchain_zephyr_sdk>`
|
||||
|
||||
* Terminal emulator software for use with the USB-UART. Suggestion:
|
||||
`Putty Website`_.
|
||||
|
||||
* (optional) A collection of Pmods, Arduino modules, or Mikro modules.
|
||||
See `Digilent Pmod Modules`_ or develop your custom interfaces to attach
|
||||
to the Pmod connector.
|
||||
|
||||
Set up the ARC IoT Development Kit
|
||||
==================================
|
||||
|
||||
To run Zephyr application on IoT Development Kit, you need to
|
||||
setup the board correctly.
|
||||
|
||||
* Connect the digilent usb cable from your host to the board.
|
||||
|
||||
* Connect the 5V DC power supply to your board (optional).
|
||||
|
||||
Set up Zephyr Software
|
||||
======================
|
||||
|
||||
Building Sample Applications
|
||||
==============================
|
||||
|
||||
You can try many of the sample applications or tests, but let us discuss
|
||||
the one called :ref:`hello_world`.
|
||||
It is found in :zephyr_file:`samples/hello_world`.
|
||||
|
||||
Configuring
|
||||
-----------
|
||||
|
||||
You may need to write a prj_arc.conf file if the sample doesn't have one.
|
||||
Next, you can use the menuconfig rule to configure the target. By specifying
|
||||
``iotdk`` as the board configuration, you can select the ARC IoT Development
|
||||
Kit board support for Zephyr.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: iotdk
|
||||
:zephyr-app: samples/hello_world
|
||||
:goals: menuconfig
|
||||
|
||||
|
||||
Building
|
||||
--------
|
||||
|
||||
You can build an application in the usual way. Refer to
|
||||
:ref:`build_an_application` for more details. Here is an example for
|
||||
:ref:`hello_world`.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: iotdk
|
||||
:zephyr-app: samples/hello_world
|
||||
:maybe-skip-config:
|
||||
:goals: build
|
||||
|
||||
Connecting Serial Output
|
||||
=========================
|
||||
|
||||
In the default configuration, Zephyr's IoT Development Kit images support
|
||||
serial output via the USB-UART on the board. To enable serial output:
|
||||
|
||||
* Open a serial port emulator (i.e. on Linux minicom, putty, screen, etc)
|
||||
|
||||
* Specify the tty driver name, for example, on Linux this may be
|
||||
:file:`/dev/ttyUSB0`
|
||||
|
||||
* Set the communication settings to:
|
||||
|
||||
|
||||
========= =====
|
||||
Parameter Value
|
||||
========= =====
|
||||
Baud: 115200
|
||||
Data: 8 bits
|
||||
Parity: None
|
||||
Stopbits: 1
|
||||
========= =====
|
||||
|
||||
Debugging
|
||||
==========
|
||||
|
||||
Using the latest version of Zephyr SDK(>=0.9), you can debug and flash IoT
|
||||
Development Kit directly.
|
||||
|
||||
One option is to build and debug the application using the usual
|
||||
Zephyr build system commands.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: iotdk
|
||||
:app: <my app>
|
||||
:goals: debug
|
||||
|
||||
At this point you can do your normal debug session. Set breakpoints and then
|
||||
'c' to continue into the program.
|
||||
|
||||
The other option is to launch a debug server, as follows.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: iotdk
|
||||
:app: <my app>
|
||||
:goals: debugserver
|
||||
|
||||
Then connect to the debug server at the IoT Development Kit from a second
|
||||
console, from the build directory containing the output :file:`zephyr.elf`.
|
||||
|
||||
.. code-block:: console
|
||||
|
||||
$ cd <my app>
|
||||
$ $ZEPHYR_SDK_INSTALL_DIR/arc-zephyr-elf/bin/arc-zephyr-elf-gdb zephyr.elf
|
||||
(gdb) target remote localhost:3333
|
||||
(gdb) load
|
||||
(gdb) b main
|
||||
(gdb) c
|
||||
|
||||
Flashing
|
||||
========
|
||||
|
||||
If you just want to download the application to the IoT Development Kit's CCM
|
||||
and run, you can do so in the usual way.
|
||||
|
||||
.. zephyr-app-commands::
|
||||
:board: iotdk
|
||||
:app: <my app>
|
||||
:goals: flash
|
||||
|
||||
This command still uses openocd and gdb to load the application elf file to
|
||||
IoT Development Kit, but it will load the application and immediately run. If
|
||||
power is removed, the application will be lost since it wasn't written to flash.
|
||||
|
||||
Most of the time you will not be flashing your program but will instead debug
|
||||
it using openocd and gdb. The program can be download via the USB cable into
|
||||
the code and data memories.
|
||||
|
||||
When you are ready to deploy the program so that it boots up automatically on
|
||||
reset or power-up, you can follow the steps to place the program on SPI-FLASH
|
||||
or internal eFlash.
|
||||
|
||||
For instructions on how to write your program to FLASH, refer to the
|
||||
documentation on the IoT Development Kit at the `embARC website`_.
|
||||
|
||||
Release Notes
|
||||
*************
|
||||
|
||||
References
|
||||
**********
|
||||
|
||||
.. _embARC website: https://www.embarc.org
|
||||
|
||||
.. _Designware ARC IoT Development Kit website: <https://www.synopsys.com/dw/ipdir.php?ds=arc_iot_development_kit>`_
|
||||
|
||||
.. _Digilent Pmod Modules: http://store.digilentinc.com/pmod-modules
|
||||
|
||||
.. _Putty website: http://www.putty.org
|
||||
BIN
boards/snps/iotdk/doc/iotdk.jpg
Normal file
BIN
boards/snps/iotdk/doc/iotdk.jpg
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 48 KiB |
45
boards/snps/iotdk/iotdk.dts
Normal file
45
boards/snps/iotdk/iotdk.dts
Normal file
|
|
@ -0,0 +1,45 @@
|
|||
/*
|
||||
* Copyright (c) 2018, Synopsys, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <synopsys/arc_iot.dtsi>
|
||||
#include <mem.h>
|
||||
|
||||
/ {
|
||||
model = "iotdk";
|
||||
compatible = "snps,iotdk", "snps,iotdk";
|
||||
|
||||
aliases {
|
||||
uart-0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
zephyr,sram = &dccm0;
|
||||
zephyr,flash = &flash0;
|
||||
zephyr,console = &uart0;
|
||||
zephyr,shell-uart = &uart0;
|
||||
};
|
||||
|
||||
xccm@c0000000 {
|
||||
compatible = "arc,xccm";
|
||||
reg = <0xc0000000 DT_SIZE_K(32)>;
|
||||
};
|
||||
|
||||
yccm@e0000000 {
|
||||
compatible = "arc,yccm";
|
||||
reg = <0xe0000000 DT_SIZE_K(32)>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
clock-frequency = <144000000>;
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
14
boards/snps/iotdk/iotdk.yaml
Normal file
14
boards/snps/iotdk/iotdk.yaml
Normal file
|
|
@ -0,0 +1,14 @@
|
|||
identifier: iotdk
|
||||
name: IoT Development Kit
|
||||
type: mcu
|
||||
arch: arc
|
||||
toolchain:
|
||||
- zephyr
|
||||
- cross-compile
|
||||
- xtools
|
||||
ram: 128
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: snps
|
||||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Add table
Add a link
Reference in a new issue