drivers/sensor: iis2dlpc: use common stmemsc routine
This commit aligns iis2dlpc sensor driver to latest multi instance sensor driver model. In particular: 1. make use of some few DT helpers: - get bus devices with DEVICE_DT_GET - get SPI information with SPI_CONFIG_DT_INST - get drdy gpios with GPIO_DT_SPEC_GET 2. make use of the stmemsc common routines and move ctx handler inside struct config, so that the bus_init routines can be totally avoided. Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit is contained in:
parent
76494f8589
commit
f0332eb5d3
6 changed files with 120 additions and 380 deletions
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@ -7,6 +7,6 @@
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zephyr_library()
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zephyr_library_sources_ifdef(CONFIG_IIS2DLPC iis2dlpc)
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zephyr_library_sources_ifdef(CONFIG_IIS2DLPC iis2dlpc_i2c.c)
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zephyr_library_sources_ifdef(CONFIG_IIS2DLPC iis2dlpc_spi.c)
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zephyr_library_sources_ifdef(CONFIG_IIS2DLPC_TRIGGER iis2dlpc_trigger.c)
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zephyr_library_include_directories(../stmemsc)
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@ -35,10 +35,11 @@ static int iis2dlpc_set_range(const struct device *dev, uint8_t fs)
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{
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int err;
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struct iis2dlpc_data *iis2dlpc = dev->data;
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const struct iis2dlpc_dev_config *cfg = dev->config;
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const struct iis2dlpc_config *cfg = dev->config;
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stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
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uint8_t shift_gain = 0U;
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err = iis2dlpc_full_scale_set(iis2dlpc->ctx, fs);
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err = iis2dlpc_full_scale_set(ctx, fs);
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if (cfg->pm == IIS2DLPC_CONT_LOW_PWR_12bit) {
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shift_gain = IIS2DLPC_SHFT_GAIN_NOLP1;
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@ -46,8 +47,7 @@ static int iis2dlpc_set_range(const struct device *dev, uint8_t fs)
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if (!err) {
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/* save internally gain for optimization */
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iis2dlpc->gain =
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IIS2DLPC_FS_TO_GAIN(fs, shift_gain);
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iis2dlpc->gain = IIS2DLPC_FS_TO_GAIN(fs, shift_gain);
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}
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return err;
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@ -60,13 +60,13 @@ static int iis2dlpc_set_range(const struct device *dev, uint8_t fs)
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*/
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static int iis2dlpc_set_odr(const struct device *dev, uint16_t odr)
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{
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struct iis2dlpc_data *iis2dlpc = dev->data;
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const struct iis2dlpc_config *cfg = dev->config;
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stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
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uint8_t val;
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/* check if power off */
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if (odr == 0U) {
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return iis2dlpc_data_rate_set(iis2dlpc->ctx,
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IIS2DLPC_XL_ODR_OFF);
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return iis2dlpc_data_rate_set(ctx, IIS2DLPC_XL_ODR_OFF);
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}
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val = IIS2DLPC_ODR_TO_REG(odr);
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@ -75,7 +75,7 @@ static int iis2dlpc_set_odr(const struct device *dev, uint16_t odr)
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return -ENOTSUP;
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}
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return iis2dlpc_data_rate_set(iis2dlpc->ctx, val);
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return iis2dlpc_data_rate_set(ctx, val);
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}
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static inline void iis2dlpc_convert(struct sensor_value *val, int raw_val,
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@ -138,7 +138,8 @@ static int iis2dlpc_channel_get(const struct device *dev,
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return -ENOTSUP;
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}
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static int iis2dlpc_config(const struct device *dev, enum sensor_channel chan,
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static int iis2dlpc_dev_config(const struct device *dev,
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enum sensor_channel chan,
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enum sensor_attribute attr,
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const struct sensor_value *val)
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{
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@ -166,7 +167,7 @@ static int iis2dlpc_attr_set(const struct device *dev,
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case SENSOR_CHAN_ACCEL_Y:
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case SENSOR_CHAN_ACCEL_Z:
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case SENSOR_CHAN_ACCEL_XYZ:
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return iis2dlpc_config(dev, chan, attr, val);
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return iis2dlpc_dev_config(dev, chan, attr, val);
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default:
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LOG_DBG("Attr not supported on %d channel", chan);
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break;
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@ -179,12 +180,13 @@ static int iis2dlpc_sample_fetch(const struct device *dev,
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enum sensor_channel chan)
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{
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struct iis2dlpc_data *iis2dlpc = dev->data;
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const struct iis2dlpc_dev_config *cfg = dev->config;
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const struct iis2dlpc_config *cfg = dev->config;
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stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
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uint8_t shift;
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int16_t buf[3];
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/* fetch raw data sample */
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if (iis2dlpc_acceleration_raw_get(iis2dlpc->ctx, buf) < 0) {
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if (iis2dlpc_acceleration_raw_get(ctx, buf) < 0) {
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LOG_DBG("Failed to fetch raw data sample");
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return -EIO;
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}
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@ -212,23 +214,7 @@ static const struct sensor_driver_api iis2dlpc_driver_api = {
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.channel_get = iis2dlpc_channel_get,
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};
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static int iis2dlpc_init_interface(const struct device *dev)
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{
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struct iis2dlpc_data *iis2dlpc = dev->data;
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const struct iis2dlpc_dev_config *cfg = dev->config;
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LOG_INF("bus name %s", cfg->bus_name);
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iis2dlpc->bus = device_get_binding(cfg->bus_name);
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if (!iis2dlpc->bus) {
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LOG_DBG("master bus not found: %s", cfg->bus_name);
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return -EINVAL;
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}
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return cfg->bus_init(dev);
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}
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static int iis2dlpc_set_power_mode(struct iis2dlpc_data *iis2dlpc,
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iis2dlpc_mode_t pm)
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static int iis2dlpc_set_power_mode(stmdev_ctx_t *ctx, iis2dlpc_mode_t pm)
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{
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uint8_t regval = IIS2DLPC_CONT_LOW_PWR_12bit;
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@ -244,23 +230,20 @@ static int iis2dlpc_set_power_mode(struct iis2dlpc_data *iis2dlpc,
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break;
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}
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return iis2dlpc_write_reg(iis2dlpc->ctx, IIS2DLPC_CTRL1, ®val, 1);
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return iis2dlpc_write_reg(ctx, IIS2DLPC_CTRL1, ®val, 1);
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}
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static int iis2dlpc_init(const struct device *dev)
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{
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struct iis2dlpc_data *iis2dlpc = dev->data;
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const struct iis2dlpc_dev_config *cfg = dev->config;
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const struct iis2dlpc_config *cfg = dev->config;
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stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
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uint8_t wai;
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iis2dlpc->dev = dev;
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if (iis2dlpc_init_interface(dev)) {
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return -EINVAL;
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}
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/* check chip ID */
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if (iis2dlpc_device_id_get(iis2dlpc->ctx, &wai) < 0) {
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if (iis2dlpc_device_id_get(ctx, &wai) < 0) {
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return -EIO;
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}
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@ -270,20 +253,19 @@ static int iis2dlpc_init(const struct device *dev)
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}
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/* reset device */
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if (iis2dlpc_reset_set(iis2dlpc->ctx, PROPERTY_ENABLE) < 0) {
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if (iis2dlpc_reset_set(ctx, PROPERTY_ENABLE) < 0) {
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return -EIO;
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}
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k_busy_wait(100);
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if (iis2dlpc_block_data_update_set(iis2dlpc->ctx,
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PROPERTY_ENABLE) < 0) {
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if (iis2dlpc_block_data_update_set(ctx, PROPERTY_ENABLE) < 0) {
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return -EIO;
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}
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/* set power mode */
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LOG_INF("power-mode is %d", cfg->pm);
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if (iis2dlpc_set_power_mode(iis2dlpc, cfg->pm)) {
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if (iis2dlpc_set_power_mode(ctx, cfg->pm)) {
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return -EIO;
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}
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@ -307,35 +289,32 @@ static int iis2dlpc_init(const struct device *dev)
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#ifdef CONFIG_IIS2DLPC_TAP
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LOG_INF("TAP: tap mode is %d", cfg->tap_mode);
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if (iis2dlpc_tap_mode_set(iis2dlpc->ctx, cfg->tap_mode) < 0) {
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if (iis2dlpc_tap_mode_set(ctx, cfg->tap_mode) < 0) {
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LOG_ERR("Failed to select tap trigger mode");
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return -EIO;
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}
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LOG_INF("TAP: ths_x is %02x", cfg->tap_threshold[0]);
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if (iis2dlpc_tap_threshold_x_set(iis2dlpc->ctx,
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cfg->tap_threshold[0]) < 0) {
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if (iis2dlpc_tap_threshold_x_set(ctx, cfg->tap_threshold[0]) < 0) {
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LOG_ERR("Failed to set tap X axis threshold");
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return -EIO;
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}
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LOG_INF("TAP: ths_y is %02x", cfg->tap_threshold[1]);
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if (iis2dlpc_tap_threshold_y_set(iis2dlpc->ctx,
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cfg->tap_threshold[1]) < 0) {
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if (iis2dlpc_tap_threshold_y_set(ctx, cfg->tap_threshold[1]) < 0) {
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LOG_ERR("Failed to set tap Y axis threshold");
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return -EIO;
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}
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LOG_INF("TAP: ths_z is %02x", cfg->tap_threshold[2]);
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if (iis2dlpc_tap_threshold_z_set(iis2dlpc->ctx,
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cfg->tap_threshold[2]) < 0) {
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if (iis2dlpc_tap_threshold_z_set(ctx, cfg->tap_threshold[2]) < 0) {
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LOG_ERR("Failed to set tap Z axis threshold");
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return -EIO;
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}
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if (cfg->tap_threshold[0] > 0) {
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LOG_INF("TAP: tap_x enabled");
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if (iis2dlpc_tap_detection_on_x_set(iis2dlpc->ctx, 1) < 0) {
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if (iis2dlpc_tap_detection_on_x_set(ctx, 1) < 0) {
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LOG_ERR("Failed to set tap detection on X axis");
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return -EIO;
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}
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@ -343,7 +322,7 @@ static int iis2dlpc_init(const struct device *dev)
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if (cfg->tap_threshold[1] > 0) {
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LOG_INF("TAP: tap_y enabled");
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if (iis2dlpc_tap_detection_on_y_set(iis2dlpc->ctx, 1) < 0) {
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if (iis2dlpc_tap_detection_on_y_set(ctx, 1) < 0) {
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LOG_ERR("Failed to set tap detection on Y axis");
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return -EIO;
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}
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@ -351,26 +330,26 @@ static int iis2dlpc_init(const struct device *dev)
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if (cfg->tap_threshold[2] > 0) {
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LOG_INF("TAP: tap_z enabled");
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if (iis2dlpc_tap_detection_on_z_set(iis2dlpc->ctx, 1) < 0) {
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if (iis2dlpc_tap_detection_on_z_set(ctx, 1) < 0) {
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LOG_ERR("Failed to set tap detection on Z axis");
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return -EIO;
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}
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}
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LOG_INF("TAP: shock is %02x", cfg->tap_shock);
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if (iis2dlpc_tap_shock_set(iis2dlpc->ctx, cfg->tap_shock) < 0) {
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if (iis2dlpc_tap_shock_set(ctx, cfg->tap_shock) < 0) {
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LOG_ERR("Failed to set tap shock duration");
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return -EIO;
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}
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LOG_INF("TAP: latency is %02x", cfg->tap_latency);
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if (iis2dlpc_tap_dur_set(iis2dlpc->ctx, cfg->tap_latency) < 0) {
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if (iis2dlpc_tap_dur_set(ctx, cfg->tap_latency) < 0) {
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LOG_ERR("Failed to set tap latency");
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return -EIO;
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}
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LOG_INF("TAP: quiet time is %02x", cfg->tap_quiet);
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if (iis2dlpc_tap_quiet_set(iis2dlpc->ctx, cfg->tap_quiet) < 0) {
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if (iis2dlpc_tap_quiet_set(ctx, cfg->tap_quiet) < 0) {
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LOG_ERR("Failed to set tap quiet time");
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return -EIO;
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}
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@ -403,45 +382,6 @@ static int iis2dlpc_init(const struct device *dev)
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* Instantiation macros used when a device is on a SPI bus.
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*/
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#define IIS2DLPC_HAS_CS(inst) DT_INST_SPI_DEV_HAS_CS_GPIOS(inst)
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#define IIS2DLPC_DATA_SPI_CS(inst) \
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{ .cs_ctrl = { \
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.gpio_pin = DT_INST_SPI_DEV_CS_GPIOS_PIN(inst), \
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.gpio_dt_flags = DT_INST_SPI_DEV_CS_GPIOS_FLAGS(inst), \
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}, \
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}
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#define IIS2DLPC_DATA_SPI(inst) \
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COND_CODE_1(IIS2DLPC_HAS_CS(inst), \
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(IIS2DLPC_DATA_SPI_CS(inst)), \
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({}))
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#define IIS2DLPC_SPI_CS_PTR(inst) \
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COND_CODE_1(IIS2DLPC_HAS_CS(inst), \
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(&(iis2dlpc_data_##inst.cs_ctrl)), \
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(NULL))
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#define IIS2DLPC_SPI_CS_LABEL(inst) \
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COND_CODE_1(IIS2DLPC_HAS_CS(inst), \
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(DT_INST_SPI_DEV_CS_GPIOS_LABEL(inst)), (NULL))
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#define IIS2DLPC_SPI_CFG(inst) \
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(&(struct iis2dlpc_spi_cfg) { \
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.spi_conf = { \
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.frequency = \
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DT_INST_PROP(inst, spi_max_frequency), \
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.operation = (SPI_WORD_SET(8) | \
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SPI_OP_MODE_MASTER | \
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SPI_LINES_SINGLE | \
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SPI_MODE_CPOL | \
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SPI_MODE_CPHA), \
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.slave = DT_INST_REG_ADDR(inst), \
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.cs = IIS2DLPC_SPI_CS_PTR(inst), \
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}, \
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.cs_gpios_label = IIS2DLPC_SPI_CS_LABEL(inst), \
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})
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#ifdef CONFIG_IIS2DLPC_TAP
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#define IIS2DLPC_CONFIG_TAP(inst) \
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.tap_mode = DT_INST_PROP(inst, tap_mode), \
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@ -455,62 +395,76 @@ static int iis2dlpc_init(const struct device *dev)
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#ifdef CONFIG_IIS2DLPC_TRIGGER
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#define IIS2DLPC_CFG_IRQ(inst) \
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.irq_dev_name = DT_INST_GPIO_LABEL(inst, drdy_gpios), \
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.irq_pin = DT_INST_GPIO_PIN(inst, drdy_gpios), \
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.irq_flags = DT_INST_GPIO_FLAGS(inst, drdy_gpios), \
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.gpio_drdy = GPIO_DT_SPEC_INST_GET(inst, drdy_gpios), \
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.drdy_int = DT_INST_PROP(inst, drdy_int),
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#else
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#define IIS2DLPC_CFG_IRQ(inst)
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#endif /* CONFIG_IIS2DLPC_TRIGGER */
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#define IIS2DLPC_SPI_OPERATION (SPI_WORD_SET(8) | \
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SPI_OP_MODE_MASTER | \
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SPI_MODE_CPOL | \
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SPI_MODE_CPHA) \
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#define IIS2DLPC_CONFIG_SPI(inst) \
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{ \
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.ctx = { \
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.read_reg = \
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(stmdev_read_ptr) stmemsc_spi_read, \
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.write_reg = \
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(stmdev_write_ptr) stmemsc_spi_write, \
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.handle = \
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(void *)&iis2dlpc_config_##inst.stmemsc_cfg, \
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}, \
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.stmemsc_cfg.spi = { \
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.bus = DEVICE_DT_GET(DT_INST_BUS(inst)), \
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.spi_cfg = SPI_CONFIG_DT_INST(inst, \
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IIS2DLPC_SPI_OPERATION, \
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0), \
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}, \
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.pm = DT_INST_PROP(inst, power_mode), \
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.range = DT_INST_PROP(inst, range), \
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.bus_name = DT_INST_BUS_LABEL(inst), \
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.bus_init = iis2dlpc_spi_init, \
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.bus_cfg = { .spi_cfg = IIS2DLPC_SPI_CFG(inst) }, \
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IIS2DLPC_CONFIG_TAP(inst) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
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(IIS2DLPC_CFG_IRQ(inst)), ()) \
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}
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#define IIS2DLPC_DEFINE_SPI(inst) \
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static struct iis2dlpc_data iis2dlpc_data_##inst = \
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IIS2DLPC_DATA_SPI(inst); \
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static const struct iis2dlpc_dev_config iis2dlpc_config_##inst =\
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IIS2DLPC_CONFIG_SPI(inst); \
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IIS2DLPC_DEVICE_INIT(inst)
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/*
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* Instantiation macros used when a device is on an I2C bus.
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*/
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#define IIS2DLPC_CONFIG_I2C(inst) \
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{ \
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.ctx = { \
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.read_reg = \
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(stmdev_read_ptr) stmemsc_i2c_read, \
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.write_reg = \
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(stmdev_write_ptr) stmemsc_i2c_write, \
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.handle = \
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(void *)&iis2dlpc_config_##inst.stmemsc_cfg, \
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}, \
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.stmemsc_cfg.i2c = { \
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.bus = DEVICE_DT_GET(DT_INST_BUS(inst)), \
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.i2c_slv_addr = DT_INST_REG_ADDR(inst), \
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}, \
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.pm = DT_INST_PROP(inst, power_mode), \
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.range = DT_INST_PROP(inst, range), \
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.bus_name = DT_INST_BUS_LABEL(inst), \
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.bus_init = iis2dlpc_i2c_init, \
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.bus_cfg = { .i2c_slv_addr = DT_INST_REG_ADDR(inst), }, \
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IIS2DLPC_CONFIG_TAP(inst) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, drdy_gpios), \
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(IIS2DLPC_CFG_IRQ(inst)), ()) \
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}
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#define IIS2DLPC_DEFINE_I2C(inst) \
|
||||
static struct iis2dlpc_data iis2dlpc_data_##inst; \
|
||||
static const struct iis2dlpc_dev_config iis2dlpc_config_##inst =\
|
||||
IIS2DLPC_CONFIG_I2C(inst); \
|
||||
IIS2DLPC_DEVICE_INIT(inst)
|
||||
/*
|
||||
* Main instantiation macro. Use of COND_CODE_1() selects the right
|
||||
* bus-specific macro at preprocessor time.
|
||||
*/
|
||||
|
||||
#define IIS2DLPC_DEFINE(inst) \
|
||||
static struct iis2dlpc_data iis2dlpc_data_##inst; \
|
||||
static const struct iis2dlpc_config iis2dlpc_config_##inst = \
|
||||
COND_CODE_1(DT_INST_ON_BUS(inst, spi), \
|
||||
(IIS2DLPC_DEFINE_SPI(inst)), \
|
||||
(IIS2DLPC_DEFINE_I2C(inst)))
|
||||
(IIS2DLPC_CONFIG_SPI(inst)), \
|
||||
(IIS2DLPC_CONFIG_I2C(inst))); \
|
||||
IIS2DLPC_DEVICE_INIT(inst)
|
||||
|
||||
DT_INST_FOREACH_STATUS_OKAY(IIS2DLPC_DEFINE)
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <drivers/gpio.h>
|
||||
#include <sys/util.h>
|
||||
#include <drivers/sensor.h>
|
||||
#include <stmemsc.h>
|
||||
#include "iis2dlpc_reg.h"
|
||||
|
||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
|
||||
|
@ -24,11 +25,6 @@
|
|||
#include <drivers/i2c.h>
|
||||
#endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c) */
|
||||
|
||||
union axis3bit16_t {
|
||||
int16_t i16bit[3];
|
||||
uint8_t u8bit[6];
|
||||
};
|
||||
|
||||
/* Return ODR reg value based on data rate set */
|
||||
#define IIS2DLPC_ODR_TO_REG(_odr) \
|
||||
((_odr <= 1) ? IIS2DLPC_XL_ODR_1Hz6_LP_ONLY : \
|
||||
|
@ -53,23 +49,6 @@ union axis3bit16_t {
|
|||
#define IIS2DLPC_SHIFT_PM1 4
|
||||
#define IIS2DLPC_SHIFT_PMOTHER 2
|
||||
|
||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
|
||||
struct iis2dlpc_spi_cfg {
|
||||
struct spi_config spi_conf;
|
||||
const char *cs_gpios_label;
|
||||
};
|
||||
#endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) */
|
||||
|
||||
union iis2dlpc_bus_cfg {
|
||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
|
||||
uint16_t i2c_slv_addr;
|
||||
#endif
|
||||
|
||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
|
||||
const struct iis2dlpc_spi_cfg *spi_cfg;
|
||||
#endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) */
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iis2dlpc_dev_config - iis2dlpc hw configuration
|
||||
* @bus_name: Pointer to bus master identifier.
|
||||
|
@ -78,16 +57,20 @@ union iis2dlpc_bus_cfg {
|
|||
* @irq_pin: GPIO pin number connecter to sensor int pin.
|
||||
* @drdy_int: Sensor drdy int (int1/int2).
|
||||
*/
|
||||
struct iis2dlpc_dev_config {
|
||||
const char *bus_name;
|
||||
int (*bus_init)(const struct device *dev);
|
||||
const union iis2dlpc_bus_cfg bus_cfg;
|
||||
struct iis2dlpc_config {
|
||||
stmdev_ctx_t ctx;
|
||||
union {
|
||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
|
||||
const struct stmemsc_cfg_i2c i2c;
|
||||
#endif
|
||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
|
||||
const struct stmemsc_cfg_spi spi;
|
||||
#endif
|
||||
} stmemsc_cfg;
|
||||
iis2dlpc_mode_t pm;
|
||||
uint8_t range;
|
||||
#ifdef CONFIG_IIS2DLPC_TRIGGER
|
||||
const char *irq_dev_name;
|
||||
gpio_pin_t irq_pin;
|
||||
gpio_flags_t irq_flags;
|
||||
const struct gpio_dt_spec gpio_drdy;
|
||||
uint8_t drdy_int;
|
||||
#ifdef CONFIG_IIS2DLPC_TAP
|
||||
uint8_t tap_mode;
|
||||
|
@ -102,21 +85,11 @@ struct iis2dlpc_dev_config {
|
|||
/* sensor data */
|
||||
struct iis2dlpc_data {
|
||||
const struct device *dev;
|
||||
const struct device *bus;
|
||||
int16_t acc[3];
|
||||
|
||||
/* save sensitivity */
|
||||
uint16_t gain;
|
||||
|
||||
stmdev_ctx_t *ctx;
|
||||
|
||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
|
||||
stmdev_ctx_t ctx_i2c;
|
||||
#endif
|
||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
|
||||
stmdev_ctx_t ctx_spi;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_IIS2DLPC_TRIGGER
|
||||
const struct device *gpio;
|
||||
uint8_t gpio_pin;
|
||||
|
@ -134,14 +107,8 @@ struct iis2dlpc_data {
|
|||
struct k_work work;
|
||||
#endif /* CONFIG_IIS2DLPC_TRIGGER_GLOBAL_THREAD */
|
||||
#endif /* CONFIG_IIS2DLPC_TRIGGER */
|
||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
|
||||
struct spi_cs_control cs_ctrl;
|
||||
#endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) */
|
||||
};
|
||||
|
||||
int iis2dlpc_i2c_init(const struct device *dev);
|
||||
int iis2dlpc_spi_init(const struct device *dev);
|
||||
|
||||
#ifdef CONFIG_IIS2DLPC_TRIGGER
|
||||
int iis2dlpc_init_interrupt(const struct device *dev);
|
||||
int iis2dlpc_trigger_set(const struct device *dev,
|
||||
|
|
|
@ -1,54 +0,0 @@
|
|||
/* ST Microelectronics IIS2DLPC 3-axis accelerometer driver
|
||||
*
|
||||
* Copyright (c) 2020 STMicroelectronics
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Datasheet:
|
||||
* https://www.st.com/resource/en/datasheet/iis2dlpc.pdf
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT st_iis2dlpc
|
||||
|
||||
#include <string.h>
|
||||
#include <logging/log.h>
|
||||
|
||||
#include "iis2dlpc.h"
|
||||
|
||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
|
||||
|
||||
LOG_MODULE_DECLARE(IIS2DLPC, CONFIG_SENSOR_LOG_LEVEL);
|
||||
|
||||
static int iis2dlpc_i2c_read(struct iis2dlpc_data *data, uint8_t reg_addr,
|
||||
uint8_t *value, uint16_t len)
|
||||
{
|
||||
const struct device *dev = data->dev;
|
||||
const struct iis2dlpc_dev_config *cfg = dev->config;
|
||||
|
||||
return i2c_burst_read(data->bus, cfg->bus_cfg.i2c_slv_addr,
|
||||
reg_addr, value, len);
|
||||
}
|
||||
|
||||
static int iis2dlpc_i2c_write(struct iis2dlpc_data *data, uint8_t reg_addr,
|
||||
uint8_t *value, uint16_t len)
|
||||
{
|
||||
const struct device *dev = data->dev;
|
||||
const struct iis2dlpc_dev_config *cfg = dev->config;
|
||||
|
||||
return i2c_burst_write(data->bus, cfg->bus_cfg.i2c_slv_addr,
|
||||
reg_addr, value, len);
|
||||
}
|
||||
|
||||
int iis2dlpc_i2c_init(const struct device *dev)
|
||||
{
|
||||
struct iis2dlpc_data *data = dev->data;
|
||||
|
||||
data->ctx_i2c.read_reg = (stmdev_read_ptr) iis2dlpc_i2c_read,
|
||||
data->ctx_i2c.write_reg = (stmdev_write_ptr) iis2dlpc_i2c_write,
|
||||
|
||||
data->ctx = &data->ctx_i2c;
|
||||
data->ctx->handle = data;
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c) */
|
|
@ -1,122 +0,0 @@
|
|||
/* ST Microelectronics IIS2DLPC 3-axis accelerometer driver
|
||||
*
|
||||
* Copyright (c) 2020 STMicroelectronics
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Datasheet:
|
||||
* https://www.st.com/resource/en/datasheet/iis2dlpc.pdf
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT st_iis2dlpc
|
||||
|
||||
#include <string.h>
|
||||
#include "iis2dlpc.h"
|
||||
#include <logging/log.h>
|
||||
|
||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
|
||||
|
||||
#define IIS2DLPC_SPI_READ (1 << 7)
|
||||
|
||||
LOG_MODULE_DECLARE(IIS2DLPC, CONFIG_SENSOR_LOG_LEVEL);
|
||||
|
||||
static int iis2dlpc_spi_read(struct iis2dlpc_data *data, uint8_t reg,
|
||||
uint8_t *val, uint16_t len)
|
||||
{
|
||||
const struct device *dev = data->dev;
|
||||
const struct iis2dlpc_dev_config *cfg = dev->config;
|
||||
const struct spi_config *spi_cfg = &cfg->bus_cfg.spi_cfg->spi_conf;
|
||||
uint8_t buffer_tx[2] = { reg | IIS2DLPC_SPI_READ, 0 };
|
||||
const struct spi_buf tx_buf = {
|
||||
.buf = buffer_tx,
|
||||
.len = 2,
|
||||
};
|
||||
const struct spi_buf_set tx = {
|
||||
.buffers = &tx_buf,
|
||||
.count = 1
|
||||
};
|
||||
const struct spi_buf rx_buf[2] = {
|
||||
{
|
||||
.buf = NULL,
|
||||
.len = 1,
|
||||
},
|
||||
{
|
||||
.buf = val,
|
||||
.len = len,
|
||||
}
|
||||
};
|
||||
const struct spi_buf_set rx = {
|
||||
.buffers = rx_buf,
|
||||
.count = 2
|
||||
};
|
||||
|
||||
if (spi_transceive(data->bus, spi_cfg, &tx, &rx)) {
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int iis2dlpc_spi_write(struct iis2dlpc_data *data, uint8_t reg,
|
||||
uint8_t *val, uint16_t len)
|
||||
{
|
||||
const struct device *dev = data->dev;
|
||||
const struct iis2dlpc_dev_config *cfg = dev->config;
|
||||
const struct spi_config *spi_cfg = &cfg->bus_cfg.spi_cfg->spi_conf;
|
||||
uint8_t buffer_tx[1] = { reg & ~IIS2DLPC_SPI_READ };
|
||||
const struct spi_buf tx_buf[2] = {
|
||||
{
|
||||
.buf = buffer_tx,
|
||||
.len = 1,
|
||||
},
|
||||
{
|
||||
.buf = val,
|
||||
.len = len,
|
||||
}
|
||||
};
|
||||
const struct spi_buf_set tx = {
|
||||
.buffers = tx_buf,
|
||||
.count = 2
|
||||
};
|
||||
|
||||
|
||||
if (spi_write(data->bus, spi_cfg, &tx)) {
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
stmdev_ctx_t iis2dlpc_spi_ctx = {
|
||||
.read_reg = (stmdev_read_ptr) iis2dlpc_spi_read,
|
||||
.write_reg = (stmdev_write_ptr) iis2dlpc_spi_write,
|
||||
};
|
||||
|
||||
int iis2dlpc_spi_init(const struct device *dev)
|
||||
{
|
||||
struct iis2dlpc_data *data = dev->data;
|
||||
const struct iis2dlpc_dev_config *cfg = dev->config;
|
||||
const struct iis2dlpc_spi_cfg *spi_cfg = cfg->bus_cfg.spi_cfg;
|
||||
|
||||
data->ctx_spi.read_reg = (stmdev_read_ptr) iis2dlpc_spi_read;
|
||||
data->ctx_spi.write_reg = (stmdev_write_ptr) iis2dlpc_spi_write;
|
||||
|
||||
data->ctx = &data->ctx_spi;
|
||||
data->ctx->handle = data;
|
||||
|
||||
if (spi_cfg->cs_gpios_label != NULL) {
|
||||
/* handle SPI CS thru GPIO if it is the case */
|
||||
data->cs_ctrl.gpio_dev =
|
||||
device_get_binding(spi_cfg->cs_gpios_label);
|
||||
if (!data->cs_ctrl.gpio_dev) {
|
||||
LOG_ERR("Unable to get GPIO SPI CS device");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
LOG_DBG("SPI GPIO CS configured on %s:%u",
|
||||
spi_cfg->cs_gpios_label, data->cs_ctrl.gpio_pin);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) */
|
|
@ -25,46 +25,46 @@ LOG_MODULE_DECLARE(IIS2DLPC, CONFIG_SENSOR_LOG_LEVEL);
|
|||
static int iis2dlpc_enable_int(const struct device *dev,
|
||||
enum sensor_trigger_type type, int enable)
|
||||
{
|
||||
const struct iis2dlpc_dev_config *cfg = dev->config;
|
||||
struct iis2dlpc_data *iis2dlpc = dev->data;
|
||||
const struct iis2dlpc_config *cfg = dev->config;
|
||||
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||
iis2dlpc_reg_t int_route;
|
||||
|
||||
switch (type) {
|
||||
case SENSOR_TRIG_DATA_READY:
|
||||
if (cfg->drdy_int == 1) {
|
||||
/* set interrupt for pin INT1 */
|
||||
iis2dlpc_pin_int1_route_get(iis2dlpc->ctx,
|
||||
iis2dlpc_pin_int1_route_get(ctx,
|
||||
&int_route.ctrl4_int1_pad_ctrl);
|
||||
int_route.ctrl4_int1_pad_ctrl.int1_drdy = enable;
|
||||
|
||||
return iis2dlpc_pin_int1_route_set(iis2dlpc->ctx,
|
||||
return iis2dlpc_pin_int1_route_set(ctx,
|
||||
&int_route.ctrl4_int1_pad_ctrl);
|
||||
} else {
|
||||
/* set interrupt for pin INT2 */
|
||||
iis2dlpc_pin_int2_route_get(iis2dlpc->ctx,
|
||||
iis2dlpc_pin_int2_route_get(ctx,
|
||||
&int_route.ctrl5_int2_pad_ctrl);
|
||||
int_route.ctrl5_int2_pad_ctrl.int2_drdy = enable;
|
||||
|
||||
return iis2dlpc_pin_int2_route_set(iis2dlpc->ctx,
|
||||
return iis2dlpc_pin_int2_route_set(ctx,
|
||||
&int_route.ctrl5_int2_pad_ctrl);
|
||||
}
|
||||
break;
|
||||
#ifdef CONFIG_IIS2DLPC_TAP
|
||||
case SENSOR_TRIG_TAP:
|
||||
/* set interrupt for pin INT1 */
|
||||
iis2dlpc_pin_int1_route_get(iis2dlpc->ctx,
|
||||
iis2dlpc_pin_int1_route_get(ctx,
|
||||
&int_route.ctrl4_int1_pad_ctrl);
|
||||
int_route.ctrl4_int1_pad_ctrl.int1_single_tap = enable;
|
||||
|
||||
return iis2dlpc_pin_int1_route_set(iis2dlpc->ctx,
|
||||
return iis2dlpc_pin_int1_route_set(ctx,
|
||||
&int_route.ctrl4_int1_pad_ctrl);
|
||||
case SENSOR_TRIG_DOUBLE_TAP:
|
||||
/* set interrupt for pin INT1 */
|
||||
iis2dlpc_pin_int1_route_get(iis2dlpc->ctx,
|
||||
iis2dlpc_pin_int1_route_get(ctx,
|
||||
&int_route.ctrl4_int1_pad_ctrl);
|
||||
int_route.ctrl4_int1_pad_ctrl.int1_tap = enable;
|
||||
|
||||
return iis2dlpc_pin_int1_route_set(iis2dlpc->ctx,
|
||||
return iis2dlpc_pin_int1_route_set(ctx,
|
||||
&int_route.ctrl4_int1_pad_ctrl);
|
||||
#endif /* CONFIG_IIS2DLPC_TAP */
|
||||
default:
|
||||
|
@ -80,6 +80,8 @@ int iis2dlpc_trigger_set(const struct device *dev,
|
|||
const struct sensor_trigger *trig,
|
||||
sensor_trigger_handler_t handler)
|
||||
{
|
||||
const struct iis2dlpc_config *cfg = dev->config;
|
||||
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||
struct iis2dlpc_data *iis2dlpc = dev->data;
|
||||
int16_t raw[3];
|
||||
int state = (handler != NULL) ? PROPERTY_ENABLE : PROPERTY_DISABLE;
|
||||
|
@ -89,7 +91,7 @@ int iis2dlpc_trigger_set(const struct device *dev,
|
|||
iis2dlpc->drdy_handler = handler;
|
||||
if (state) {
|
||||
/* dummy read: re-trigger interrupt */
|
||||
iis2dlpc_acceleration_raw_get(iis2dlpc->ctx, raw);
|
||||
iis2dlpc_acceleration_raw_get(ctx, raw);
|
||||
}
|
||||
return iis2dlpc_enable_int(dev, SENSOR_TRIG_DATA_READY, state);
|
||||
#ifdef CONFIG_IIS2DLPC_TAP
|
||||
|
@ -164,11 +166,11 @@ static int iis2dlpc_handle_double_tap_int(const struct device *dev)
|
|||
*/
|
||||
static void iis2dlpc_handle_interrupt(const struct device *dev)
|
||||
{
|
||||
struct iis2dlpc_data *iis2dlpc = dev->data;
|
||||
const struct iis2dlpc_dev_config *cfg = dev->config;
|
||||
const struct iis2dlpc_config *cfg = dev->config;
|
||||
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||
iis2dlpc_all_sources_t sources;
|
||||
|
||||
iis2dlpc_all_sources_get(iis2dlpc->ctx, &sources);
|
||||
iis2dlpc_all_sources_get(ctx, &sources);
|
||||
|
||||
if (sources.status_dup.drdy) {
|
||||
iis2dlpc_handle_drdy_int(dev);
|
||||
|
@ -182,7 +184,7 @@ static void iis2dlpc_handle_interrupt(const struct device *dev)
|
|||
}
|
||||
#endif /* CONFIG_IIS2DLPC_TAP */
|
||||
|
||||
gpio_pin_interrupt_configure(iis2dlpc->gpio, cfg->irq_pin,
|
||||
gpio_pin_interrupt_configure_dt(&cfg->gpio_drdy,
|
||||
GPIO_INT_EDGE_TO_ACTIVE);
|
||||
}
|
||||
|
||||
|
@ -191,13 +193,11 @@ static void iis2dlpc_gpio_callback(const struct device *dev,
|
|||
{
|
||||
struct iis2dlpc_data *iis2dlpc =
|
||||
CONTAINER_OF(cb, struct iis2dlpc_data, gpio_cb);
|
||||
const struct iis2dlpc_config *cfg = iis2dlpc->dev->config;
|
||||
|
||||
if ((pins & BIT(iis2dlpc->gpio_pin)) == 0U) {
|
||||
return;
|
||||
}
|
||||
ARG_UNUSED(pins);
|
||||
|
||||
gpio_pin_interrupt_configure(dev, iis2dlpc->gpio_pin,
|
||||
GPIO_INT_DISABLE);
|
||||
gpio_pin_interrupt_configure_dt(&cfg->gpio_drdy, GPIO_INT_DISABLE);
|
||||
|
||||
#if defined(CONFIG_IIS2DLPC_TRIGGER_OWN_THREAD)
|
||||
k_sem_give(&iis2dlpc->gpio_sem);
|
||||
|
@ -229,19 +229,16 @@ static void iis2dlpc_work_cb(struct k_work *work)
|
|||
int iis2dlpc_init_interrupt(const struct device *dev)
|
||||
{
|
||||
struct iis2dlpc_data *iis2dlpc = dev->data;
|
||||
const struct iis2dlpc_dev_config *cfg = dev->config;
|
||||
const struct iis2dlpc_config *cfg = dev->config;
|
||||
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||
int ret;
|
||||
|
||||
/* setup data ready gpio interrupt (INT1 or INT2) */
|
||||
iis2dlpc->gpio = device_get_binding(cfg->irq_dev_name);
|
||||
if (iis2dlpc->gpio == NULL) {
|
||||
LOG_DBG("Cannot get pointer to %s device",
|
||||
cfg->irq_dev_name);
|
||||
if (!device_is_ready(cfg->gpio_drdy.port)) {
|
||||
LOG_ERR("Cannot get pointer to drdy_gpio device");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
iis2dlpc->dev = dev;
|
||||
|
||||
#if defined(CONFIG_IIS2DLPC_TRIGGER_OWN_THREAD)
|
||||
k_sem_init(&iis2dlpc->gpio_sem, 0, K_SEM_MAX_LIMIT);
|
||||
|
||||
|
@ -254,29 +251,27 @@ int iis2dlpc_init_interrupt(const struct device *dev)
|
|||
iis2dlpc->work.handler = iis2dlpc_work_cb;
|
||||
#endif /* CONFIG_IIS2DLPC_TRIGGER_OWN_THREAD */
|
||||
|
||||
iis2dlpc->gpio_pin = cfg->irq_pin;
|
||||
|
||||
ret = gpio_pin_configure(iis2dlpc->gpio, cfg->irq_pin,
|
||||
GPIO_INPUT | cfg->irq_flags);
|
||||
ret = gpio_pin_configure_dt(&cfg->gpio_drdy, GPIO_INPUT);
|
||||
if (ret < 0) {
|
||||
LOG_DBG("Could not configure gpio");
|
||||
LOG_ERR("Could not configure gpio");
|
||||
return ret;
|
||||
}
|
||||
|
||||
gpio_init_callback(&iis2dlpc->gpio_cb,
|
||||
iis2dlpc_gpio_callback,
|
||||
BIT(cfg->irq_pin));
|
||||
BIT(cfg->gpio_drdy.pin));
|
||||
|
||||
if (gpio_add_callback(iis2dlpc->gpio, &iis2dlpc->gpio_cb) < 0) {
|
||||
LOG_DBG("Could not set gpio callback");
|
||||
if (gpio_add_callback(cfg->gpio_drdy.port, &iis2dlpc->gpio_cb) < 0) {
|
||||
LOG_ERR("Could not set gpio callback");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
/* enable interrupt on int1/int2 in pulse mode */
|
||||
if (iis2dlpc_int_notification_set(iis2dlpc->ctx, IIS2DLPC_INT_PULSED)) {
|
||||
if (iis2dlpc_int_notification_set(ctx, IIS2DLPC_INT_PULSED)) {
|
||||
LOG_ERR("Could not set pulse mode");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
return gpio_pin_interrupt_configure(iis2dlpc->gpio, cfg->irq_pin,
|
||||
return gpio_pin_interrupt_configure_dt(&cfg->gpio_drdy,
|
||||
GPIO_INT_EDGE_TO_ACTIVE);
|
||||
}
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue