diff --git a/include/arch/arm/aarch32/cortex_r/cmsis.h b/include/arch/arm/aarch32/cortex_r/cmsis.h
new file mode 100644
index 00000000000..cf0ee31a6ca
--- /dev/null
+++ b/include/arch/arm/aarch32/cortex_r/cmsis.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2020 Stephanos Ioannidis <root@stephanos.io>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief CMSIS interface file
+ *
+ * This header contains the interface to the ARM CMSIS Core headers.
+ */
+
+#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_R_CMSIS_H_
+#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_R_CMSIS_H_
+
+#include <soc.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef __CR_REV
+#define __CR_REV                0U
+#endif
+
+#ifndef __FPU_PRESENT
+#define __FPU_PRESENT           CONFIG_CPU_HAS_FPU
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#if defined(CONFIG_CPU_CORTEX_R4)
+#include <core_cr4.h>
+#elif defined(CONFIG_CPU_CORTEX_R5)
+#include <core_cr5.h>
+#else
+#error "Unknown Cortex-R device"
+#endif
+
+#endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_R_CMSIS_H_ */
diff --git a/include/arch/arm/aarch32/cortex_r/cpu.h b/include/arch/arm/aarch32/cortex_r/cpu.h
index c17a24e4f06..984ec9d907b 100644
--- a/include/arch/arm/aarch32/cortex_r/cpu.h
+++ b/include/arch/arm/aarch32/cortex_r/cpu.h
@@ -31,7 +31,4 @@
 
 #define FPEXC_EN	(1 << 30)
 
-#define __ISB()	__asm__ volatile ("isb sy" : : : "memory")
-#define __DMB()	__asm__ volatile ("dmb sy" : : : "memory")
-
 #endif
diff --git a/include/arch/arm/aarch32/cortex_r/sys_io.h b/include/arch/arm/aarch32/cortex_r/sys_io.h
index 6c3040eda62..92a321251e0 100644
--- a/include/arch/arm/aarch32/cortex_r/sys_io.h
+++ b/include/arch/arm/aarch32/cortex_r/sys_io.h
@@ -16,6 +16,7 @@
 
 #include <zephyr/types.h>
 #include <sys/sys_io.h>
+#include <arch/arm/aarch32/cortex_r/cmsis.h>
 
 #ifdef __cplusplus
 extern "C" {