drivers: udc_dwc2: rework vendor quirks
Rework and rename vendor quirks to better reflect where they intended to be called. Number of quirks probably not final and will be trimmed later. Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This commit is contained in:
Johann Fischer
Fabio Baltieri
parent
67cdccc1c2
commit
efb286dfdf
3 changed files with 83 additions and 32 deletions
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@ -6,7 +6,6 @@
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#include "udc_common.h"
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#include "udc_dwc2.h"
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#include "udc_dwc2_vendor_quirks.h"
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#include <string.h>
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#include <stdio.h>
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@ -22,6 +21,7 @@
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(udc_dwc2, CONFIG_UDC_DRIVER_LOG_LEVEL);
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#include "udc_dwc2_vendor_quirks.h"
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enum dwc2_drv_event_type {
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/* Trigger next transfer, must not be used for control OUT */
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@ -904,9 +904,7 @@ static void udc_dwc2_isr_handler(const struct device *dev)
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}
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}
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if (config->quirks != NULL && config->quirks->irq_clear != NULL) {
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config->quirks->irq_clear(dev);
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}
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(void)dwc2_quirk_irq_clear(dev);
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}
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static int udc_dwc2_ep_enqueue(const struct device *dev,
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@ -1523,19 +1521,22 @@ static int udc_dwc2_enable(const struct device *dev)
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struct usb_dwc2_reg *const base = dwc2_get_base(dev);
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int err;
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err = dwc2_quirk_pre_enable(dev);
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if (err) {
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LOG_ERR("Quirk pre enable failed %d", err);
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return err;
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}
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err = udc_dwc2_init_controller(dev);
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if (err) {
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return err;
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}
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/* Call vendor-specific function to enable peripheral */
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if (config->quirks != NULL && config->quirks->pwr_on != NULL) {
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LOG_DBG("Enable vendor power");
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err = config->quirks->pwr_on(dev);
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err = dwc2_quirk_post_enable(dev);
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if (err) {
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LOG_ERR("Quirk post enable failed %d", err);
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return err;
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}
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}
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/* Enable global interrupt */
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sys_set_bits((mem_addr_t)&base->gahbcfg, USB_DWC2_GAHBCFG_GLBINTRMASK);
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@ -1553,6 +1554,7 @@ static int udc_dwc2_disable(const struct device *dev)
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const struct udc_dwc2_config *const config = dev->config;
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struct usb_dwc2_reg *const base = dwc2_get_base(dev);
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mem_addr_t dctl_reg = (mem_addr_t)&base->dctl;
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int err;
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/* Enable soft disconnect */
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sys_set_bits(dctl_reg, USB_DWC2_DCTL_SFTDISCON);
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@ -1571,27 +1573,38 @@ static int udc_dwc2_disable(const struct device *dev)
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return -EIO;
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}
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err = dwc2_quirk_disable(dev);
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if (err) {
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LOG_ERR("Quirk disable failed %d", err);
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return err;
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}
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return 0;
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}
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static int udc_dwc2_init(const struct device *dev)
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{
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const struct udc_dwc2_config *const config = dev->config;
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int ret;
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if (config->quirks != NULL && config->quirks->clk_enable != NULL) {
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LOG_DBG("Enable vendor clock");
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ret = config->quirks->clk_enable(dev);
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ret = dwc2_quirk_init(dev);
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if (ret) {
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LOG_ERR("Quirk init failed %d", ret);
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return ret;
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}
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}
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return dwc2_init_pinctrl(dev);
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}
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static int udc_dwc2_shutdown(const struct device *dev)
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{
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int ret;
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ret = dwc2_quirk_shutdown(dev);
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if (ret) {
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LOG_ERR("Quirk shutdown failed %d", ret);
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return ret;
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}
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return 0;
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}
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@ -14,10 +14,17 @@
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/* Vendor quirks per driver instance */
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struct dwc2_vendor_quirks {
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int (*clk_enable)(const struct device *dev);
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int (*clk_disable)(const struct device *dev);
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int (*pwr_on)(const struct device *dev);
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int (*pwr_off)(const struct device *dev);
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/* Called at the beginning of udc_dwc2_init() */
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int (*init)(const struct device *dev);
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/* Called on udc_dwc2_enable() before the controller is initialized */
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int (*pre_enable)(const struct device *dev);
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/* Called on udc_dwc2_enable() after the controller is initialized */
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int (*post_enable)(const struct device *dev);
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/* Called at the end of udc_dwc2_disable() */
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int (*disable)(const struct device *dev);
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/* Called at the end of udc_dwc2_shutdown() */
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int (*shutdown)(const struct device *dev);
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/* Called at the end of IRQ handling */
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int (*irq_clear)(const struct device *dev);
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};
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@ -37,4 +44,24 @@ struct udc_dwc2_config {
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void (*irq_disable_func)(const struct device *dev);
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};
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#define DWC2_QUIRK_FUNC_DEFINE(fname) \
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static inline int dwc2_quirk_##fname(const struct device *dev) \
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{ \
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const struct udc_dwc2_config *const config = dev->config; \
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struct dwc2_vendor_quirks *quirks = config->quirks; \
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\
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if (quirks != NULL && config->quirks->fname != NULL) { \
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return quirks->fname(dev); \
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} \
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\
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return 0; \
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}
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DWC2_QUIRK_FUNC_DEFINE(init)
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DWC2_QUIRK_FUNC_DEFINE(pre_enable)
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DWC2_QUIRK_FUNC_DEFINE(post_enable)
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DWC2_QUIRK_FUNC_DEFINE(disable)
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DWC2_QUIRK_FUNC_DEFINE(shutdown)
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DWC2_QUIRK_FUNC_DEFINE(irq_clear)
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#endif /* ZEPHYR_DRIVERS_USB_UDC_DWC2_H */
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@ -11,13 +11,13 @@
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#include <stdint.h>
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#include <zephyr/device.h>
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#include <zephyr/sys/sys_io.h>
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#include <zephyr/drivers/clock_control/stm32_clock_control.h>
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#include <usb_dwc2_hw.h>
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f4_fsotg)
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#include <zephyr/sys/sys_io.h>
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#include <zephyr/drivers/clock_control/stm32_clock_control.h>
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#include <usb_dwc2_hw.h>
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struct usb_dw_stm32_clk {
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const struct device *const dev;
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const struct stm32_pclken *const pclken;
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@ -26,7 +26,7 @@ struct usb_dw_stm32_clk {
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#define DT_DRV_COMPAT snps_dwc2
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static inline int clk_enable_stm32f4_fsotg(const struct usb_dw_stm32_clk *const clk)
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static inline int stm32f4_fsotg_enable_clk(const struct usb_dw_stm32_clk *const clk)
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{
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int ret;
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@ -59,7 +59,7 @@ static inline int clk_enable_stm32f4_fsotg(const struct usb_dw_stm32_clk *const
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return clock_control_on(clk->dev, (void *)&clk->pclken[0]);
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}
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static inline int pwr_on_stm32f4_fsotg(const struct device *dev)
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static inline int stm32f4_fsotg_enable_phy(const struct device *dev)
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{
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const struct udc_dwc2_config *const config = dev->config;
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mem_addr_t ggpio_reg = (mem_addr_t)&config->base->ggpio;
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@ -69,6 +69,16 @@ static inline int pwr_on_stm32f4_fsotg(const struct device *dev)
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return 0;
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}
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static inline int stm32f4_fsotg_disable_phy(const struct device *dev)
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{
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const struct udc_dwc2_config *const config = dev->config;
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mem_addr_t ggpio_reg = (mem_addr_t)&config->base->ggpio;
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sys_clear_bits(ggpio_reg, USB_DWC2_GGPIO_STM32_PWRDWN | USB_DWC2_GGPIO_STM32_VBDEN);
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return 0;
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}
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#define QUIRK_STM32F4_FSOTG_DEFINE(n) \
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static const struct stm32_pclken pclken_##n[] = STM32_DT_INST_CLOCKS(n);\
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\
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@ -78,14 +88,15 @@ static inline int pwr_on_stm32f4_fsotg(const struct device *dev)
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.pclken_len = DT_INST_NUM_CLOCKS(n), \
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}; \
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\
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static int clk_enable_stm32f4_fsotg_##n(const struct device *dev) \
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static int stm32f4_fsotg_enable_clk_##n(const struct device *dev) \
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{ \
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return clk_enable_stm32f4_fsotg(&stm32f4_clk_##n); \
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return stm32f4_fsotg_enable_clk(&stm32f4_clk_##n); \
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} \
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\
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struct dwc2_vendor_quirks dwc2_vendor_quirks_##n = { \
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.clk_enable = clk_enable_stm32f4_fsotg_##n, \
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.pwr_on = pwr_on_stm32f4_fsotg, \
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.pre_enable = stm32f4_fsotg_enable_clk_##n, \
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.post_enable = stm32f4_fsotg_enable_phy, \
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.disable = stm32f4_fsotg_disable_phy, \
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.irq_clear = NULL, \
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};
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