drivers: clock_control: nrf2: add support for global hfsll clock
Add device driver support for global hsfll clock. Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
This commit is contained in:
Bjarki Arge Andreasen
Benjamin Cabé
parent
777adf4231
commit
ef8bf34e61
4 changed files with 336 additions and 14 deletions
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@ -37,6 +37,7 @@ zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_RENESAS_RA_CGC clock_cont
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_AMBIQ clock_control_ambiq.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_PWM clock_control_pwm.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_RPI_PICO clock_control_rpi_pico.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF2_GLOBAL_HSFLL clock_control_nrf2_global_hsfll.c)
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if(CONFIG_CLOCK_CONTROL_NRF2)
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zephyr_library_sources(clock_control_nrf2_common.c)
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@ -193,4 +193,37 @@ config CLOCK_CONTROL_NRF2_NRFS_CLOCK_TIMEOUT_MS
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int "Timeout waiting for nrfs clock service callback in milliseconds"
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default 1000
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config CLOCK_CONTROL_NRF2_GLOBAL_HSFLL
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bool "Clock control for global HSFLL"
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depends on NRFS_GDFS_SERVICE_ENABLED
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default y
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if CLOCK_CONTROL_NRF2_GLOBAL_HSFLL
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config CLOCK_CONTROL_NRF2_GLOBAL_HSFLL_TIMEOUT_MS
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int "Frequency request timeout in milliseconds"
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default 10000
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config CLOCK_CONTROL_NRF2_GLOBAL_HSFLL_REQ_LOW_FREQ
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bool "Request LOW frequency on init"
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default y
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help
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The GDFS service will default to HIGH frequency until it receives
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a lower frequency request. The NRF2 clock controller drivers
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expect the clock to be initialized to their lowest frequency, so
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we need to send a request on init to align GDFS with the NRF2
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clock controller driver.
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This initial request can be disabled to prevent a potentially
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unnecessary HIGH -> LOW -> HIGH cycle given some module will
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request a HIGH frequency on init anyway.
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config CLOCK_CONTROL_NRF2_GLOBAL_HSFLL_INIT_PRIORITY
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int "Init priority of global HSFLL device driver"
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default 52
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help
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Must be higher than NRFS backend
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endif # CLOCK_CONTROL_NRF2_GLOBAL_HSFLL
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endif # CLOCK_CONTROL_NRF2
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302
drivers/clock_control/clock_control_nrf2_global_hsfll.c
Normal file
302
drivers/clock_control/clock_control_nrf2_global_hsfll.c
Normal file
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@ -0,0 +1,302 @@
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/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nordic_nrf_hsfll_global
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#include "clock_control_nrf2_common.h"
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#include <zephyr/devicetree.h>
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#include <zephyr/drivers/clock_control/nrf_clock_control.h>
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#include <nrfs_gdfs.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_DECLARE(clock_control_nrf2, CONFIG_CLOCK_CONTROL_LOG_LEVEL);
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#define GLOBAL_HSFLL_CLOCK_FREQUENCIES \
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DT_INST_PROP(0, supported_clock_frequencies)
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#define GLOBAL_HSFLL_CLOCK_FREQUENCIES_IDX(idx) \
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DT_INST_PROP_BY_IDX(0, supported_clock_frequencies, idx)
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#define GLOBAL_HSFLL_CLOCK_FREQUENCIES_SIZE \
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DT_INST_PROP_LEN(0, supported_clock_frequencies)
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#define GLOBAL_HSFLL_FREQ_REQ_TIMEOUT \
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K_MSEC(CONFIG_CLOCK_CONTROL_NRF2_GLOBAL_HSFLL_TIMEOUT_MS)
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#define GLOBAL_HSFLL_INIT_LOW_REQ \
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CONFIG_CLOCK_CONTROL_NRF2_GLOBAL_HSFLL_REQ_LOW_FREQ
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BUILD_ASSERT(GLOBAL_HSFLL_CLOCK_FREQUENCIES_SIZE == 4);
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BUILD_ASSERT(GLOBAL_HSFLL_CLOCK_FREQUENCIES_IDX(0) == 64000000);
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BUILD_ASSERT(GLOBAL_HSFLL_CLOCK_FREQUENCIES_IDX(1) == 128000000);
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BUILD_ASSERT(GLOBAL_HSFLL_CLOCK_FREQUENCIES_IDX(2) == 256000000);
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BUILD_ASSERT(GLOBAL_HSFLL_CLOCK_FREQUENCIES_IDX(3) == 320000000);
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BUILD_ASSERT(GDFS_FREQ_COUNT == 4);
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BUILD_ASSERT(GDFS_FREQ_HIGH == 0);
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BUILD_ASSERT(GDFS_FREQ_MEDHIGH == 1);
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BUILD_ASSERT(GDFS_FREQ_MEDLOW == 2);
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BUILD_ASSERT(GDFS_FREQ_LOW == 3);
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struct global_hsfll_dev_config {
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uint32_t clock_frequencies[GLOBAL_HSFLL_CLOCK_FREQUENCIES_SIZE];
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};
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struct global_hsfll_dev_data {
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STRUCT_CLOCK_CONFIG(global_hsfll, GLOBAL_HSFLL_CLOCK_FREQUENCIES_SIZE) clk_cfg;
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const struct device *dev;
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struct k_work evt_work;
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nrfs_gdfs_evt_type_t evt;
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struct k_work_delayable timeout_dwork;
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#if GLOBAL_HSFLL_INIT_LOW_REQ
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struct k_sem evt_sem;
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#endif /* GLOBAL_HSFLL_INIT_LOW_REQ */
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};
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static uint32_t global_hsfll_get_max_clock_frequency(const struct device *dev)
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{
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const struct global_hsfll_dev_config *dev_config = dev->config;
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return dev_config->clock_frequencies[ARRAY_SIZE(dev_config->clock_frequencies) - 1];
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}
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static struct onoff_manager *global_hsfll_find_mgr(const struct device *dev,
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const struct nrf_clock_spec *spec)
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{
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struct global_hsfll_dev_data *dev_data = dev->data;
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const struct global_hsfll_dev_config *dev_config = dev->config;
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uint32_t frequency;
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if (!spec) {
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return &dev_data->clk_cfg.onoff[0].mgr;
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}
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if (spec->accuracy || spec->precision) {
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LOG_ERR("invalid specification of accuracy or precision");
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return NULL;
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}
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frequency = spec->frequency == NRF_CLOCK_CONTROL_FREQUENCY_MAX
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? global_hsfll_get_max_clock_frequency(dev)
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: spec->frequency;
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for (uint8_t i = 0; i < ARRAY_SIZE(dev_config->clock_frequencies); i++) {
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if (dev_config->clock_frequencies[i] < frequency) {
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continue;
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}
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return &dev_data->clk_cfg.onoff[i].mgr;
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}
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LOG_ERR("invalid frequency");
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return NULL;
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}
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static int api_request_global_hsfll(const struct device *dev,
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const struct nrf_clock_spec *spec,
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struct onoff_client *cli)
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{
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struct onoff_manager *mgr = global_hsfll_find_mgr(dev, spec);
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if (mgr) {
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return onoff_request(mgr, cli);
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}
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return -EINVAL;
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}
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static int api_release_global_hsfll(const struct device *dev,
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const struct nrf_clock_spec *spec)
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{
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struct onoff_manager *mgr = global_hsfll_find_mgr(dev, spec);
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if (mgr) {
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return onoff_release(mgr);
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}
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return -EINVAL;
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}
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static int api_cancel_or_release_global_hsfll(const struct device *dev,
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const struct nrf_clock_spec *spec,
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struct onoff_client *cli)
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{
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struct onoff_manager *mgr = global_hsfll_find_mgr(dev, spec);
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if (mgr) {
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return onoff_cancel_or_release(mgr, cli);
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}
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return -EINVAL;
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}
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static struct nrf_clock_control_driver_api driver_api = {
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.std_api = {
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.on = api_nosys_on_off,
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.off = api_nosys_on_off,
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},
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.request = api_request_global_hsfll,
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.release = api_release_global_hsfll,
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.cancel_or_release = api_cancel_or_release_global_hsfll,
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};
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static enum gdfs_frequency_setting global_hsfll_freq_idx_to_nrfs_freq(const struct device *dev,
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uint8_t freq_idx)
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{
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const struct global_hsfll_dev_config *dev_config = dev->config;
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return ARRAY_SIZE(dev_config->clock_frequencies) - 1 - freq_idx;
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}
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static const char *global_hsfll_gdfs_freq_to_str(enum gdfs_frequency_setting freq)
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{
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switch (freq) {
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case GDFS_FREQ_HIGH:
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return "GDFS_FREQ_HIGH";
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case GDFS_FREQ_MEDHIGH:
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return "GDFS_FREQ_MEDHIGH";
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case GDFS_FREQ_MEDLOW:
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return "GDFS_FREQ_MEDLOW";
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case GDFS_FREQ_LOW:
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return "GDFS_FREQ_LOW";
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default:
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break;
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}
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return "UNKNOWN";
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}
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static void global_hsfll_work_handler(struct k_work *work)
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{
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struct global_hsfll_dev_data *dev_data =
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CONTAINER_OF(work, struct global_hsfll_dev_data, clk_cfg.work);
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const struct device *dev = dev_data->dev;
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uint8_t freq_idx;
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enum gdfs_frequency_setting target_freq;
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nrfs_err_t err;
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freq_idx = clock_config_update_begin(work);
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target_freq = global_hsfll_freq_idx_to_nrfs_freq(dev, freq_idx);
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LOG_DBG("requesting %s", global_hsfll_gdfs_freq_to_str(target_freq));
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err = nrfs_gdfs_request_freq(target_freq, dev_data);
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if (err != NRFS_SUCCESS) {
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clock_config_update_end(&dev_data->clk_cfg, -EIO);
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return;
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}
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k_work_schedule(&dev_data->timeout_dwork, GLOBAL_HSFLL_FREQ_REQ_TIMEOUT);
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}
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static void global_hsfll_evt_handler(struct k_work *work)
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{
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struct global_hsfll_dev_data *dev_data =
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CONTAINER_OF(work, struct global_hsfll_dev_data, evt_work);
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int rc;
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k_work_cancel_delayable(&dev_data->timeout_dwork);
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rc = dev_data->evt == NRFS_GDFS_EVT_FREQ_CONFIRMED ? 0 : -EIO;
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clock_config_update_end(&dev_data->clk_cfg, rc);
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}
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#if GLOBAL_HSFLL_INIT_LOW_REQ
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static void global_hfsll_nrfs_gdfs_init_evt_handler(nrfs_gdfs_evt_t const *p_evt, void *context)
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{
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struct global_hsfll_dev_data *dev_data = context;
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dev_data->evt = p_evt->type;
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k_sem_give(&dev_data->evt_sem);
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}
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#endif /* GLOBAL_HSFLL_INIT_LOW_REQ */
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static void global_hfsll_nrfs_gdfs_evt_handler(nrfs_gdfs_evt_t const *p_evt, void *context)
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{
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struct global_hsfll_dev_data *dev_data = context;
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if (k_work_is_pending(&dev_data->evt_work)) {
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return;
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}
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dev_data->evt = p_evt->type;
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k_work_submit(&dev_data->evt_work);
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}
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static void global_hsfll_timeout_handler(struct k_work *work)
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{
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struct k_work_delayable *dwork = k_work_delayable_from_work(work);
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struct global_hsfll_dev_data *dev_data =
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CONTAINER_OF(dwork, struct global_hsfll_dev_data, timeout_dwork);
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clock_config_update_end(&dev_data->clk_cfg, -ETIMEDOUT);
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}
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static int global_hfsll_init(const struct device *dev)
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{
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struct global_hsfll_dev_data *dev_data = dev->data;
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nrfs_err_t err;
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int rc;
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k_work_init_delayable(&dev_data->timeout_dwork, global_hsfll_timeout_handler);
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k_work_init(&dev_data->evt_work, global_hsfll_evt_handler);
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#if GLOBAL_HSFLL_INIT_LOW_REQ
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k_sem_init(&dev_data->evt_sem, 0, 1);
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err = nrfs_gdfs_init(global_hfsll_nrfs_gdfs_init_evt_handler);
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if (err != NRFS_SUCCESS) {
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return -EIO;
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}
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LOG_DBG("initial request %s", global_hsfll_gdfs_freq_to_str(GDFS_FREQ_LOW));
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err = nrfs_gdfs_request_freq(GDFS_FREQ_LOW, dev_data);
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if (err != NRFS_SUCCESS) {
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return -EIO;
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}
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rc = k_sem_take(&dev_data->evt_sem, GLOBAL_HSFLL_FREQ_REQ_TIMEOUT);
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if (rc) {
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return -EIO;
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}
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if (dev_data->evt != NRFS_GDFS_EVT_FREQ_CONFIRMED) {
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return -EIO;
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}
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nrfs_gdfs_uninit();
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#endif /* GLOBAL_HSFLL_INIT_LOW_REQ */
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rc = clock_config_init(&dev_data->clk_cfg,
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ARRAY_SIZE(dev_data->clk_cfg.onoff),
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global_hsfll_work_handler);
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if (rc < 0) {
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return rc;
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}
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err = nrfs_gdfs_init(global_hfsll_nrfs_gdfs_evt_handler);
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if (err != NRFS_SUCCESS) {
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return -EIO;
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}
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return 0;
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}
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static struct global_hsfll_dev_data driver_data = {
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.dev = DEVICE_DT_INST_GET(0),
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};
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static const struct global_hsfll_dev_config driver_config = {
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GLOBAL_HSFLL_CLOCK_FREQUENCIES
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};
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DEVICE_DT_INST_DEFINE(
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0,
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global_hfsll_init,
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NULL,
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&driver_data,
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&driver_config,
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POST_KERNEL,
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CONFIG_CLOCK_CONTROL_NRF2_GLOBAL_HSFLL_INIT_PRIORITY,
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&driver_api
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);
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@ -8,7 +8,6 @@
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#include "clock_control_nrf2_common.h"
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#include <zephyr/devicetree.h>
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#include <zephyr/drivers/clock_control/nrf_clock_control.h>
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#include <hal/nrf_hsfll.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_DECLARE(clock_control_nrf2, CONFIG_CLOCK_CONTROL_LOG_LEVEL);
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@ -183,18 +182,6 @@ static int api_cancel_or_release_hsfll(const struct device *dev,
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#endif
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}
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static int api_get_rate_hsfll(const struct device *dev,
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clock_control_subsys_t sys,
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uint32_t *rate)
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{
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ARG_UNUSED(dev);
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ARG_UNUSED(sys);
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*rate = nrf_hsfll_clkctrl_mult_get(NRF_HSFLL) * MHZ(16);
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return 0;
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}
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static int hsfll_init(const struct device *dev)
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{
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#ifdef CONFIG_NRFS_DVFS_LOCAL_DOMAIN
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@ -221,7 +208,6 @@ static DEVICE_API(nrf_clock_control, hsfll_drv_api) = {
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.std_api = {
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.on = api_nosys_on_off,
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.off = api_nosys_on_off,
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.get_rate = api_get_rate_hsfll,
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},
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.request = api_request_hsfll,
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.release = api_release_hsfll,
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