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arch: riscv32: follow-on tweaks

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A couple of follow-on patches suggested after previous RISCV32 arch
changes were merged.

Tweak some help in arch/riscv32/kconfig to better work with the RST
docs.

Take out all the CONFIG_PRINTK ifdeffery in fatal.c. The cause_str()
routine should get compiled out if PRINTK=n anyway.

Signed-off-by: Marti Bolivar <marti@foundries.io>
This commit is contained in:
Marti Bolivar 2018-12-07 09:29:14 -08:00 • committed by Anas Nashif
commit ef765b28cb
2 changed files with 1 additions and 5 deletions
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2
arch/riscv32/Kconfig
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@ -51,7 +51,7 @@ config RISCV_SOC_CONTEXT_SAVE
See gen_offset.h for more details.
The generic architecture IRQ wrapper will also call
__soc_save_context and __soc_restore_context routines at
\_\_soc_save_context and \_\_soc_restore_context routines at
ISR entry and exit, respectively. These should typically
be implemented in assembly. If they were C functions, they
would have these signatures:

4
arch/riscv32/core/fatal.c
View file

@ -166,7 +166,6 @@ hang_system:
}
#ifdef CONFIG_PRINTK
static char *cause_str(u32_t cause)
{
switch (cause) {
@ -186,7 +185,6 @@ static char *cause_str(u32_t cause)
return "unknown";
}
}
#endif
FUNC_NORETURN void _Fault(const NANO_ESF *esf)
@ -196,9 +194,7 @@ FUNC_NORETURN void _Fault(const NANO_ESF *esf)
__asm__ volatile("csrr %0, mcause" : "=r" (mcause));
mcause &= SOC_MCAUSE_EXP_MASK;
#ifdef CONFIG_PRINTK
printk("Exception cause %s (%d)\n", cause_str(mcause), (int)mcause);
#endif
_NanoFatalErrorHandler(_NANO_ERR_CPU_EXCEPTION, esf);
}