tests: drivers: add overlay/testcase for silabs xg29_rb4412a board

Add some overlay files for the silabs xg29_rb4412a board to enable tests
on the board. Also add the platform to some testcase.yaml files.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
This commit is contained in:
Martin Hoff 2025-03-18 11:54:06 +01:00 committed by Benjamin Cabé
commit eeb709927f
24 changed files with 324 additions and 1 deletions

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@ -14,5 +14,6 @@ tests:
- nrf52840dk/nrf52840 - nrf52840dk/nrf52840
- nrf9160dk/nrf9160 - nrf9160dk/nrf9160
- nrf51dk/nrf51822 - nrf51dk/nrf51822
- xg29_rb4412a
integration_platforms: integration_platforms:
- qemu_cortex_m0 - qemu_cortex_m0

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@ -0,0 +1,15 @@
/*
* Copyright (c) 2025 Silicon Laboratories, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
dma0 = &dma0;
};
};
&dma0 {
status = "okay";
};

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@ -6,4 +6,5 @@ tests:
- dma - dma
platform_allow: platform_allow:
- slwrb4180a - slwrb4180a
- xg29_rb4412a
filter: dt_alias_exists("dma0") filter: dt_alias_exists("dma0")

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@ -0,0 +1,30 @@
/*
* Copyright (c) 2025 Silicon Laboratories Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "dt-bindings/adc/silabs-adc.h"
/ {
zephyr,user {
io-channels = <&adc0 4>;
reference-mv = <(3300 / 4)>;
expected-accuracy = <32>;
};
};
&adc0{
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
channel@4 {
reg = <4>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
zephyr,input-positive = <IADC_INPUT_AVDD>;
};
};

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@ -40,5 +40,6 @@ tests:
- xg24_dk2601b - xg24_dk2601b
- xg24_rb4187c - xg24_rb4187c
- xg27_dk2602a - xg27_dk2602a
- xg29_rb4412a
integration_platforms: integration_platforms:
- frdm_kl25z - frdm_kl25z

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@ -0,0 +1,37 @@
/*
* Copyright (c) 2025 Silicon Laboratories Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "dt-bindings/adc/silabs-adc.h"
/ {
zephyr,user {
io-channels = <&adc0 0>, <&adc0 1>;
};
};
&adc0 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
zephyr,input-positive = <IADC_INPUT_IOVDD>;
};
channel@1 {
reg = <1>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
zephyr,input-positive = <IADC_INPUT_VBAT>;
};
};

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@ -33,6 +33,8 @@ tests:
platform_allow: same54_xpro platform_allow: same54_xpro
drivers.adc.sam.afec.build: drivers.adc.sam.afec.build:
platform_allow: sam_e70_xplained/same70q21 platform_allow: sam_e70_xplained/same70q21
drivers.adc.silabs.build:
platform_allow: xg29_rb4412a
drivers.adc.stm32.build: drivers.adc.stm32.build:
platform_allow: disco_l475_iot1 platform_allow: disco_l475_iot1
drivers.adc.xec.build: drivers.adc.xec.build:

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@ -0,0 +1,11 @@
/*
* Copyright (c) 2025 Silicon Laboratories, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
&dma0 {
status = "okay";
};
tst_dma0: &dma0 { };

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@ -0,0 +1,4 @@
# Copyright (c) 2025 Silicon Laboratories, Inc.
# SPDX-License-Identifier: Apache-2.0
CONFIG_DMA_LOOP_TRANSFER_SIZE=2048

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@ -0,0 +1,11 @@
/*
* Copyright (c) 2025 Silicon Laboratories, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
&dma0 {
status = "okay";
};
tst_dma0: &dma0 { };

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@ -0,0 +1,15 @@
/*
* Copyright (c) 2025 Silicon Laboratories, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
dma0 = &dma0;
};
};
&dma0 {
status = "okay";
};

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@ -0,0 +1,25 @@
/*
* Copyright (c) 2025 Silicon Laboratories Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
&dma0 {
status = "okay";
};
&msc {
dmas = <&dma0 DMA_REQSEL_MSCWDATA>;
};
/* Disable jedec spi nor flash to test internal flash */
/ {
aliases {
/delete-property/ spi-flash0;
};
};
/delete-node/ &mx25r80;

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@ -97,18 +97,21 @@ tests:
drivers.flash.common.silabs.dma: drivers.flash.common.silabs.dma:
platform_allow: platform_allow:
- xg24_rb4187c - xg24_rb4187c
- xg29_rb4412a
extra_configs: extra_configs:
- CONFIG_DMA=y - CONFIG_DMA=y
drivers.flash.common.silabs.dma.lpwrite: drivers.flash.common.silabs.dma.lpwrite:
platform_allow: platform_allow:
- xg24_rb4187c - xg24_rb4187c
- xg29_rb4412a
extra_configs: extra_configs:
- CONFIG_DMA=y - CONFIG_DMA=y
extra_args: extra_args:
- DTC_OVERLAY_FILE=boards/xg24_rb4187c_lpwrite.overlay - EXTRA_DTC_OVERLAY_FILE=boards/silabs_s2_lpwrite.overlay
drivers.flash.common.silabs.dma_read: drivers.flash.common.silabs.dma_read:
platform_allow: platform_allow:
- xg24_rb4187c - xg24_rb4187c
- xg29_rb4412a
extra_configs: extra_configs:
- CONFIG_DMA=y - CONFIG_DMA=y
- CONFIG_SOC_FLASH_SILABS_S2_DMA_READ=y - CONFIG_SOC_FLASH_SILABS_S2_DMA_READ=y

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@ -0,0 +1,17 @@
/*
* Copyright (c) 2025 Silicon Laboratories Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Connect EXP4 (PC0) and EXP6 (PC1) of the Expansion Pin header
*/
/ {
resources {
compatible = "test-gpio-basic-api";
out-gpios = <&gpioc 0 0>; /* WPK EXP4 (PC0) */
in-gpios = <&gpioc 1 0>; /* WPK EXP6 (PC1) */
};
};

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@ -0,0 +1,32 @@
/*
* Copyright (c) 2025 Silicon Laboratories Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
zephyr,user {
output-high-gpios = <&gpioc 1 GPIO_ACTIVE_LOW>;
output-low-gpios = <&gpioc 3 GPIO_ACTIVE_HIGH>;
input-gpios = <&gpioc 2 GPIO_ACTIVE_HIGH>;
};
};
&gpioc {
hog1 {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
output-high;
};
hog2 {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
input;
};
hog3 {
gpio-hog;
gpios = <3 GPIO_ACTIVE_HIGH>;
output-low;
};
};

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@ -19,6 +19,7 @@ tests:
- s32z2xxdc2/s32z270/rtu1 - s32z2xxdc2/s32z270/rtu1
- s32z2xxdc2@D/s32z270/rtu0 - s32z2xxdc2@D/s32z270/rtu0
- s32z2xxdc2@D/s32z270/rtu1 - s32z2xxdc2@D/s32z270/rtu1
- xg29_rb4412a
integration_platforms: integration_platforms:
- native_sim - native_sim
- native_sim/native/64 - native_sim/native/64

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@ -0,0 +1,2 @@
CONFIG_DMA_MAX_DESCRIPTOR=16
CONFIG_SPI_SILABS_EUSART_DMA_MAX_BLOCKS=10

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@ -0,0 +1,37 @@
/*
* Copyright (c) 2025 Silicon Laboratories Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/silabs/xg29-pinctrl.h>
/*
* Connect EXP4 (PC0) and EXP6 (PC1) of the Expansion Pin header
*/
&eusart1 {
dmas = <&dma0 DMA_REQSEL_EUSART1TXFL>,
<&dma0 DMA_REQSEL_EUSART1RXFL>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&eusart1_default>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&gpioc 0 GPIO_ACTIVE_LOW>;
slow@0 {
compatible = "test-spi-loopback-slow";
reg = <0>;
spi-max-frequency = <500000>;
};
fast@1 {
compatible = "test-spi-loopback-fast";
reg = <1>;
spi-max-frequency = <10000000>;
};
};
&dma0 {
status = "okay";
};

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@ -289,6 +289,7 @@ tests:
filter: CONFIG_SOC_FAMILY_SILABS_S2 filter: CONFIG_SOC_FAMILY_SILABS_S2
platform_allow: platform_allow:
- xg24_rb4187c - xg24_rb4187c
- xg29_rb4412a
extra_configs: extra_configs:
- CONFIG_SPI_SILABS_EUSART_DMA=n - CONFIG_SPI_SILABS_EUSART_DMA=n
- CONFIG_SPI_ASYNC=n - CONFIG_SPI_ASYNC=n
@ -296,6 +297,7 @@ tests:
filter: CONFIG_SOC_FAMILY_SILABS_S2 filter: CONFIG_SOC_FAMILY_SILABS_S2
platform_allow: platform_allow:
- xg24_rb4187c - xg24_rb4187c
- xg29_rb4412a
extra_configs: extra_configs:
- CONFIG_SPI_SILABS_EUSART_DMA=y - CONFIG_SPI_SILABS_EUSART_DMA=y
- CONFIG_SPI_ASYNC=n - CONFIG_SPI_ASYNC=n

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@ -0,0 +1,73 @@
/*
* Copyright (c) 2025, Silicon Laboratories Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Connect EXP4 (PC0) and EXP6 (PC1) of the Expansion Pin header
*/
/ {
chosen {
zephyr,console = &eusart0;
zephyr,shell-uart = &eusart0;
zephyr,uart-pipe = &eusart0;
};
};
&pinctrl{
usart0_default: usart0_default {
group0 {
pins = <USART0_TX_PC0>; /* WPK EXP4 (PC0) */
drive-push-pull;
output-high;
};
group1 {
pins = <USART0_RX_PC1>; /* WPK EXP6 (PC1) */
input-enable;
silabs,input-filter;
};
};
eusart0_default: eusart0_default {
group0 {
pins = <EUSART0_TX_PA5>;
drive-push-pull;
output-high;
};
group1 {
pins = <EUSART0_RX_PA6>;
input-enable;
silabs,input-filter;
};
};
};
dut: &usart0 {
dmas = <&dma0 DMA_REQSEL_USART0TXBL>,
<&dma0 DMA_REQSEL_USART0RXDATAV>;
dma-names = "tx", "rx";
pinctrl-0 = <&usart0_default>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&eusart0 {
compatible = "silabs,eusart-uart";
current-speed = <115200>;
pinctrl-0 = <&eusart0_default>;
pinctrl-names = "default";
status = "okay";
};
&dma0 {
status = "okay";
};
&eusart1 {
status = "disabled";
};
&usart1 {
status = "disabled";
};

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@ -26,6 +26,7 @@ tests:
- slwrb4180a - slwrb4180a
- mps3/corstone300/an547 - mps3/corstone300/an547
- nrf9160dk/nrf9160 - nrf9160dk/nrf9160
- xg29_rb4412a
integration_platforms: integration_platforms:
- mps3/corstone300/an547 - mps3/corstone300/an547
extra_args: CONFIG_MPU_GAP_FILLING=y extra_args: CONFIG_MPU_GAP_FILLING=y

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@ -10,6 +10,7 @@ tests:
- nrf52840dk/nrf52840 - nrf52840dk/nrf52840
- nrf9160dk/nrf9160 - nrf9160dk/nrf9160
- nrf51dk/nrf51822 - nrf51dk/nrf51822
- xg29_rb4412a
- nsim/nsim_em - nsim/nsim_em
- nsim/nsim_em7d_v22 - nsim/nsim_em7d_v22
- nsim/nsim_hs - nsim/nsim_hs

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@ -13,6 +13,7 @@ tests:
- rd_rw612_bga - rd_rw612_bga
- frdm_ke17z - frdm_ke17z
- frdm_ke17z512 - frdm_ke17z512
- xg29_rb4412a
tags: pm tags: pm
integration_platforms: integration_platforms:
- mec15xxevb_assy6853 - mec15xxevb_assy6853