From ee392915532171308c7ba0d53c21a60a26e376f1 Mon Sep 17 00:00:00 2001
From: Dino Li <Dino.Li@ite.com.tw>
Date: Mon, 22 Mar 2021 19:10:56 +0800
Subject: [PATCH] dts: it8xxx2: change flash size to 1M byte

Flash size of IT8xxx2 is 1M byte.

Change-Id: Ic1464b6e36f16291f14024a6fb49acbf3a243176
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
---
 dts/riscv/it8xxx2.dtsi                     | 10 +++++-----
 soc/riscv/riscv-ite/common/chip_chipregs.h |  4 ++++
 soc/riscv/riscv-ite/common/vector.S        | 11 +++++++++++
 3 files changed, 20 insertions(+), 5 deletions(-)

diff --git a/dts/riscv/it8xxx2.dtsi b/dts/riscv/it8xxx2.dtsi
index f855d0f33ae..15c6c58169a 100644
--- a/dts/riscv/it8xxx2.dtsi
+++ b/dts/riscv/it8xxx2.dtsi
@@ -37,18 +37,18 @@
 
 			flash0: flash@80000000 {
 				compatible = "soc-nv-flash";
-				reg = <0x80000000 DT_SIZE_K(512)>;
-				erase-block-size = <1024>;
-				write-block-size = <1>;
+				reg = <0x80000000 DT_SIZE_M(1)>;
+				erase-block-size = <4096>;
+				write-block-size = <4>;
 			};
 		};
 		pinmux: pinmux@f016f0 {
 			compatible = "ite,it8xxx2-pinmux";
 			reg = <0x00f016f0 0x0010>;
 		};
-		sram0: memory@80080000 {
+		sram0: memory@80100000 {
 			compatible = "mmio-sram";
-			reg = <0x80080000 DT_SIZE_K(60)>;
+			reg = <0x80100000 DT_SIZE_K(60)>;
 		};
 		intc: interrupt-controller@f03f00 {
 			#interrupt-cells = <2>;
diff --git a/soc/riscv/riscv-ite/common/chip_chipregs.h b/soc/riscv/riscv-ite/common/chip_chipregs.h
index 44d55c0afac..be50380624a 100644
--- a/soc/riscv/riscv-ite/common/chip_chipregs.h
+++ b/soc/riscv/riscv-ite/common/chip_chipregs.h
@@ -292,6 +292,10 @@
 #define SEMBARH			ECREG(EC_REG_BASE_ADDR + 0x109E)
 #define SCRATH_SRAM		0x08
 
+/* --- General Control (GCTRL) --- */
+#define IT8XXX2_GCTRL_BASE      0x00F02000
+#define IT8XXX2_GCTRL_EIDSR     ECREG(IT8XXX2_GCTRL_BASE + 0x31)
+
 /**
  *
  * (11xxh) Interrupt controller (INTC)
diff --git a/soc/riscv/riscv-ite/common/vector.S b/soc/riscv/riscv-ite/common/vector.S
index d24b7add360..748b3f7fc6a 100644
--- a/soc/riscv/riscv-ite/common/vector.S
+++ b/soc/riscv/riscv-ite/common/vector.S
@@ -5,6 +5,7 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
+#include "chip_chipregs.h"
 #include <toolchain.h>
 
 /* exports */
@@ -25,6 +26,16 @@ SECTION_FUNC(vectors, __start)
 	csrw mtvec, t0
 	csrwi mie, 0
 
+	/*
+	 * bit[3-0]@EIDSR=8: instruction local memory size is 1M byte
+	 * This operation must be done before accessing memory.
+	 */
+	la t0, IT8XXX2_GCTRL_EIDSR
+	lb t1, 0(t0)
+	andi t1, t1, 0xf0
+	ori  t1, t1, 0x8
+	sb t1, 0(t0)
+
 	/* Jump to __initialize */
 	tail __initialize