diff --git a/arch/x86/core/intel64/locore.S b/arch/x86/core/intel64/locore.S
index a8f8590b5cf..160f68bd666 100644
--- a/arch/x86/core/intel64/locore.S
+++ b/arch/x86/core/intel64/locore.S
@@ -63,17 +63,17 @@ __start:
 
 	lgdt gdt48
 	lidt idt48
-	jmpl $X86_KERNEL_CS_64, $1f
+	jmpl $X86_KERNEL_CS, $1f
 .code64
-1:	movl $X86_KERNEL_DS_64, %eax
+1:	movl $X86_KERNEL_DS, %eax
 	movw %ax, %ds
 	movw %ax, %es
 	movw %ax, %ss
 	movw %ax, %fs
 
-	movl $X86_KERNEL_TSS, %eax
+	movl $X86_KERNEL_CPU0_TR, %eax
 	ltr %ax
-	movl $X86_KERNEL_GS_64, %eax
+	movl $X86_KERNEL_CPU0_GS, %eax
 	movw %ax, %gs
 
 	movl $(_interrupt_stack + CONFIG_ISR_STACK_SIZE), %esp
@@ -158,10 +158,10 @@ z_arch_switch:
  */
 
 __resume:
-	pushq $X86_KERNEL_DS_64			/* SS */
+	pushq $X86_KERNEL_DS			/* SS */
 	pushq _thread_offset_to_rsp(%rdi)	/* RSP */
 	pushq _thread_offset_to_rflags(%rdi)	/* RFLAGS */
-	pushq $X86_KERNEL_CS_64			/* CS */
+	pushq $X86_KERNEL_CS			/* CS */
 	pushq _thread_offset_to_rip(%rdi)	/* RIP */
 
 	movq _thread_offset_to_rbx(%rdi), %rbx
@@ -231,7 +231,7 @@ gdt48:
 #define INTR 0x8e
 
 #define IDT(nr, type, ist) \
-	.word vector_ ## nr, X86_KERNEL_CS_64; \
+	.word vector_ ## nr, X86_KERNEL_CS; \
 	.byte ist, type; \
 	.word 0, 0, 0, 0, 0
 
diff --git a/arch/x86/include/intel64/kernel_arch_data.h b/arch/x86/include/intel64/kernel_arch_data.h
index 28760573620..794b28aba73 100644
--- a/arch/x86/include/intel64/kernel_arch_data.h
+++ b/arch/x86/include/intel64/kernel_arch_data.h
@@ -20,11 +20,11 @@
 
 #define X86_KERNEL_CS_32	0x08	/* 32-bit kernel code */
 #define X86_KERNEL_DS_32	0x10	/* 32-bit kernel data */
-#define X86_KERNEL_CS_64	0x18	/* 64-bit kernel code */
-#define X86_KERNEL_DS_64	0x20	/* 64-bit kernel data */
+#define X86_KERNEL_CS		0x18	/* 64-bit kernel code */
+#define X86_KERNEL_DS		0x20	/* 64-bit kernel data */
 
-#define X86_KERNEL_GS_64	0x30	/* data selector covering TSS */
-#define X86_KERNEL_TSS		0x40	/* 64-bit task state segment */
+#define X86_KERNEL_CPU0_GS	0x30	/* data selector covering TSS */
+#define X86_KERNEL_CPU0_TR	0x40	/* 64-bit task state segment */
 
 #ifndef _ASMLANGUAGE