soc: esp32s2: add initial soc support files for esp32s2
by adding specific soc files for esp32s2 bring-up, such as: - linker script - soc initialization code - initial device tree source files - esp32s2 saola board support. Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This commit is contained in:
Glauber Maroto Ferreira
Christopher Friedt
parent
bcdaaa055f
commit
ed63e2a562
19 changed files with 1417 additions and 3 deletions
395
soc/xtensa/esp32s2/linker.ld
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395
soc/xtensa/esp32s2/linker.ld
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@ -0,0 +1,395 @@
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/*
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* Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd.
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Linker command/script file
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*
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* Linker script for the esp32s2 platform.
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*/
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#include <devicetree.h>
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#include <autoconf.h>
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#include <linker/sections.h>
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#include <linker/linker-defs.h>
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#include <linker/linker-tool.h>
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#define RAM_IRAM_START 0x40020000
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#define RAM_DRAM_START 0x3ffb0000
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#define DATA_RAM_END 0x3ffe0000 /* 2nd stage bootloader iram_loader_seg starts at SRAM block 14 (reclaimed after app boots) */
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#define IRAM_ORG (RAM_IRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
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+ CONFIG_ESP32S2_DATA_CACHE_SIZE)
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#define DRAM_ORG (RAM_DRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
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+ CONFIG_ESP32S2_DATA_CACHE_SIZE)
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#define I_D_RAM_SIZE DATA_RAM_END - DRAM_ORG
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#define RAMABLE_REGION dram0_0_seg :dram0_0_phdr
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#define ROMABLE_REGION drom0_0_seg :drom0_0_phdr
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#define IRAM_REGION iram0_0_seg :iram0_0_phdr
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#define FLASH_CODE_REGION irom0_0_seg :irom0_0_phdr
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MEMORY
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{
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iram0_0_seg(RX): org = IRAM_ORG, len = I_D_RAM_SIZE
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irom0_0_seg(RX): org = 0x40080020, len = 0x780000-0x20
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dram0_0_seg(RW): org = DRAM_ORG, len = I_D_RAM_SIZE
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drom0_0_seg(R): org = 0x3f000020, len = 0x3f0000-0x20
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rtc_iram_seg(RWX): org = 0x40070000, len = 0x2000
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rtc_slow_seg(RW): org = 0x50000000, len = 0x2000
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#ifdef CONFIG_GEN_ISR_TABLES
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IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000
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#endif
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}
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PHDRS
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{
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drom0_0_phdr PT_LOAD;
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dram0_0_phdr PT_LOAD;
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iram0_0_phdr PT_LOAD;
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irom0_0_phdr PT_LOAD;
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}
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/* Default entry point: */
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ENTRY(CONFIG_KERNEL_ENTRY)
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_rom_store_table = 0;
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SECTIONS
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{
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#include <linker/rel-sections.ld>
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/* RTC fast memory holds RTC wake stub code,
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including from any source file named rtc_wake_stub*.c
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*/
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.rtc.text :
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{
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. = ALIGN(4);
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*(.rtc.literal .rtc.text)
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*rtc_wake_stub*.o(.literal .text .literal.* .text.*)
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} >rtc_iram_seg
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/* RTC slow memory holds RTC wake stub
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data/rodata, including from any source file
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named rtc_wake_stub*.c
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*/
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.rtc.data :
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{
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_rtc_data_start = ABSOLUTE(.);
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*(.rtc.data)
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*(.rtc.rodata)
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*rtc_wake_stub*.o(.data .rodata .data.* .rodata.* .bss .bss.*)
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_rtc_data_end = ABSOLUTE(.);
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} > rtc_slow_seg
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/* RTC bss, from any source file named rtc_wake_stub*.c */
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.rtc.bss (NOLOAD) :
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{
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_rtc_bss_start = ABSOLUTE(.);
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*rtc_wake_stub*.o(.bss .bss.*)
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*rtc_wake_stub*.o(COMMON)
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_rtc_bss_end = ABSOLUTE(.);
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} > rtc_slow_seg
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/* Send .iram0 code to iram */
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.iram0.vectors : ALIGN(4)
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{
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/* Vectors go to IRAM */
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_init_start = ABSOLUTE(.);
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_iram_start = ABSOLUTE(.);
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/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
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. = 0x0;
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KEEP(*(.WindowVectors.text));
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. = 0x180;
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KEEP(*(.Level2InterruptVector.text));
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. = 0x1c0;
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KEEP(*(.Level3InterruptVector.text));
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. = 0x200;
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KEEP(*(.Level4InterruptVector.text));
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. = 0x240;
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KEEP(*(.Level5InterruptVector.text));
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. = 0x280;
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KEEP(*(.DebugExceptionVector.text));
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. = 0x2c0;
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KEEP(*(.NMIExceptionVector.text));
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. = 0x300;
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KEEP(*(.KernelExceptionVector.text));
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. = 0x340;
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KEEP(*(.UserExceptionVector.text));
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. = 0x3C0;
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KEEP(*(.DoubleExceptionVector.text));
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. = 0x400;
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*(.*Vector.literal)
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*(.UserEnter.literal);
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*(.UserEnter.text);
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. = ALIGN (16);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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_init_end = ABSOLUTE(.);
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/* This goes here, not at top of linker script, so addr2line finds it last,
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and uses it in preference to the first symbol in IRAM */
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} GROUP_LINK_IN(IRAM_REGION)
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.dram0_reserved_for_iram (NOLOAD):
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{
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. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
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} > dram0_0_seg
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SECTION_DATA_PROLOGUE(k_objects,, ALIGN(4))
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{
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Z_LINK_ITERABLE_GC_ALLOWED(k_timer);
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. = ALIGN(4);
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Z_LINK_ITERABLE_GC_ALLOWED(k_mem_slab);
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. = ALIGN(4);
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Z_LINK_ITERABLE_GC_ALLOWED(k_mem_pool);
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. = ALIGN(4);
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Z_LINK_ITERABLE_GC_ALLOWED(k_heap);
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. = ALIGN(4);
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Z_LINK_ITERABLE_GC_ALLOWED(k_mutex);
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. = ALIGN(4);
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Z_LINK_ITERABLE_GC_ALLOWED(k_stack);
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. = ALIGN(4);
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Z_LINK_ITERABLE_GC_ALLOWED(k_msgq);
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. = ALIGN(4);
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Z_LINK_ITERABLE_GC_ALLOWED(k_mbox);
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. = ALIGN(4);
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Z_LINK_ITERABLE_GC_ALLOWED(k_pipe);
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. = ALIGN(4);
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Z_LINK_ITERABLE_GC_ALLOWED(k_sem);
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. = ALIGN(4);
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Z_LINK_ITERABLE_GC_ALLOWED(k_queue);
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. = ALIGN(4);
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Z_LINK_ITERABLE_GC_ALLOWED(k_condvar);
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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SECTION_DATA_PROLOGUE(net,, ALIGN(4))
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{
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_esp_net_buf_pool_list = .;
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KEEP(*(SORT_BY_NAME("._net_buf_pool.static.*")))
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#if defined(CONFIG_NETWORKING)
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Z_LINK_ITERABLE_ALIGNED(net_if, 4);
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Z_LINK_ITERABLE_ALIGNED(net_if_dev, 4);
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Z_LINK_ITERABLE_ALIGNED(net_l2, 4);
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#endif
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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Z_ITERABLE_SECTION_RAM(_static_thread_data, 4)
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#pragma push_macro("Z_ITERABLE_SECTION_RAM")
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#pragma push_macro("Z_ITERABLE_SECTION_RAM_GC_ALLOWED")
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#undef Z_ITERABLE_SECTION_RAM_GC_ALLOWED
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#define Z_ITERABLE_SECTION_RAM_GC_ALLOWED(x, y)
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#undef Z_ITERABLE_SECTION_RAM
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#define Z_ITERABLE_SECTION_RAM(x, y)
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#include <linker/common-ram.ld>
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/* Restore original value for symbols referenced by `common-ram.ld` */
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_net_buf_pool_list = _esp_net_buf_pool_list;
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#pragma pop_macro("Z_ITERABLE_SECTION_RAM_GC_ALLOWED")
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#pragma pop_macro("Z_ITERABLE_SECTION_RAM")
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#include <linker/common-ram.ld>
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.dram0.data :
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{
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_data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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/* rodata for panic handler(libarch__xtensa__core.a) and all
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* dependent functions should be placed in DRAM to avoid issue
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* when flash cache is disabled */
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*libarch__xtensa__core.a:(.rodata .rodata.*)
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*libkernel.a:fatal.*(.rodata .rodata.*)
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*libkernel.a:init.*(.rodata .rodata.*)
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*libzephyr.a:cbprintf_complete*(.rodata .rodata.*)
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*libzephyr.a:log_core.*(.rodata .rodata.*)
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*libzephyr.a:log_backend_uart.*(.rodata .rodata.*)
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*libzephyr.a:log_output.*(.rodata .rodata.*)
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. = ALIGN(4);
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__esp_log_const_start = .;
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KEEP(*(SORT(.log_const_*)));
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__esp_log_const_end = .;
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. = ALIGN(4);
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__esp_log_backends_start = .;
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KEEP(*("._log_backend.*"));
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__esp_log_backends_end = .;
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KEEP(*(.jcr))
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*(.dram1 .dram1.*)
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_data_end = ABSOLUTE(.);
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. = ALIGN(4);
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} GROUP_LINK_IN(RAMABLE_REGION)
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SECTION_PROLOGUE(_RODATA_SECTION_NAME,,ALIGN(20))
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{
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_rodata_start = ABSOLUTE(.);
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__esp_shell_root_cmds_start = .;
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KEEP(*(SORT(.shell_root_cmd_*)));
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__esp_shell_root_cmds_end = .;
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. = ALIGN(4);
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*(.rodata)
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*(.rodata.*)
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
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KEEP (*(.xt_except_table))
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KEEP (*(.gcc_except_table .gcc_except_table.*))
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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KEEP (*(.eh_frame))
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/* C++ constructor and destructor tables, properly ordered: */
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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. = ALIGN(4); /* this table MUST be 4-byte aligned */
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_rodata_end = ABSOLUTE(.);
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} GROUP_LINK_IN(ROMABLE_REGION)
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#pragma push_macro("ROMABLE_REGION")
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#undef ROMABLE_REGION
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/* This is to workaround limitation of `esptool` which needs single `FLASH` data segment
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* which is already defined above. In case, `common-rom.ld` creates additional segments
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* they will be placed in DRAM instead. */
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#define ROMABLE_REGION RAMABLE_REGION
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#include <linker/common-rom.ld>
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/* Restore original value for symbols referenced by `common-rom.ld` */
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__log_const_start = __esp_log_const_start;
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__log_const_end = __esp_log_const_end;
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__log_backends_start = __esp_log_backends_start;
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__log_backends_end = __esp_log_backends_end;
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__shell_root_cmds_start = __esp_shell_root_cmds_start;
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__shell_root_cmds_end = __esp_shell_root_cmds_end;
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#pragma pop_macro("ROMABLE_REGION")
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SECTION_PROLOGUE(_TEXT_SECTION_NAME, , ALIGN(4))
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{
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/* Code marked as running out of IRAM */
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_iram_text_start = ABSOLUTE(.);
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*(.iram1 .iram1.*)
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*(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
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*libesp32.a:panic.*(.literal .text .literal.* .text.*)
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*librtc.a:(.literal .text .literal.* .text.*)
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*libsubsys__net__l2__ethernet.a:(.literal .text .literal.* .text.*)
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*libsubsys__net__lib__config.a:(.literal .text .literal.* .text.*)
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*libsubsys__net__ip.a:(.literal .text .literal.* .text.*)
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*libsubsys__net.a:(.literal .text .literal.* .text.*)
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*libarch__xtensa__core.a:(.literal .text .literal.* .text.*)
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*libkernel.a:(.literal .text .literal.* .text.*)
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*libsoc.a:rtc_*.*(.literal .text .literal.* .text.*)
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*libsoc.a:cpu_util.*(.literal .text .literal.* .text.*)
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*libgcc.a:lib2funcs.*(.literal .text .literal.* .text.*)
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*libzephyr.a:windowspill_asm.*(.literal .text .literal.* .text.*)
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*libzephyr.a:log_noos.*(.literal .text .literal.* .text.*)
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*libzephyr.a:xtensa_sys_timer.*(.literal .text .literal.* .text.*)
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*libzephyr.a:log_core.*(.literal .text .literal.* .text.*)
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*libzephyr.a:cbprintf_complete.*(.literal .text .literal.* .text.*)
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*libzephyr.a:printk.*(.literal.printk .literal.vprintk .literal.char_out .text.printk .text.vprintk .text.char_out)
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*libzephyr.a:log_msg.*(.literal .text .literal.* .text.*)
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*libzephyr.a:log_list.*(.literal .text .literal.* .text.*)
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*libzephyr.a:log_output.*(.literal .text .literal.* .text.*)
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*libzephyr.a:log_backend_uart.*(.literal .text .literal.* .text.*)
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*liblib__libc__minimal.a:string.*(.literal .text .literal.* .text.*)
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*libgcov.a:(.literal .text .literal.* .text.*)
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_iram_text_end = ABSOLUTE(.);
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. = ALIGN(4);
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_iram_end = ABSOLUTE(.);
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} GROUP_LINK_IN(IRAM_REGION)
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.flash.text :
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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*(.literal .text .literal.* .text.*)
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_text_end = ABSOLUTE(.);
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_etext = .;
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/* Similar to _iram_start, this symbol goes here so it is
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resolved by addr2line in preference to the first symbol in
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the flash.text segment.
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*/
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_flash_cache_start = ABSOLUTE(0);
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} GROUP_LINK_IN(FLASH_CODE_REGION)
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/* Shared RAM */
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SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),)
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{
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. = ALIGN (8);
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__bss_start = ABSOLUTE(.);
|
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
|
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*(.scommon)
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*(.sbss2)
|
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
|
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.share.mem)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN (8);
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__bss_end = ABSOLUTE(.);
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} GROUP_LINK_IN(RAMABLE_REGION)
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ASSERT(((__bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
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"DRAM segment data does not fit.")
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SECTION_DATA_PROLOGUE(_NOINIT_SECTION_NAME, (NOLOAD),)
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{
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. = ALIGN (8);
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*(.noinit)
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*(".noinit.*")
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. = ALIGN (8);
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} GROUP_LINK_IN(RAMABLE_REGION)
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#ifdef CONFIG_GEN_ISR_TABLES
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#include <linker/intlist.ld>
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#endif
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#include <linker/debug-sections.ld>
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SECTION_PROLOGUE(.xtensa.info, 0,)
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{
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*(.xtensa.info)
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}
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}
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ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
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"IRAM0 segment data does not fit.")
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