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x86: Replace references to BSP with platform

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Removes references to obsolete BSP terminology.  Where appropriate, replaces it
with platform terminology.

Change-Id: I41fc099844d137dd0ea87cce0f675dc6f022ad40
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
This commit is contained in:
Peter Mitsis 2015-07-27 12:19:36 -04:00 • committed by Anas Nashif
commit ed610c5bd5
16 changed files with 32 additions and 33 deletions
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2
arch/x86/core/Kconfig
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@ -61,7 +61,7 @@ config NUM_GDT_SPARE_ENTRIES
config PHYS_LOAD_ADDR config PHYS_LOAD_ADDR
hex "Physical load address" hex "Physical load address"
# Default value must be supplied by BSP # Default value must be supplied by platform
help help
This option specifies the physical address where the kernel is loaded. This option specifies the physical address where the kernel is loaded.

2
arch/x86/core/atomic.S
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@ -32,7 +32,7 @@
/* /*
DESCRIPTION DESCRIPTION
This module provides the atomic operators for IA-32 architectures on BSPs This module provides the atomic operators for IA-32 architectures on platforms
that support the LOCK prefix instruction. that support the LOCK prefix instruction.
The atomic operations are guaranteed to be atomic with respect to interrupt The atomic operations are guaranteed to be atomic with respect to interrupt

2
arch/x86/core/atomic_nolock.c
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@ -32,7 +32,7 @@
/* /*
DESCRIPTION DESCRIPTION
This module provides the atomic operators for IA-32 architectures on BSPs This module provides the atomic operators for IA-32 architectures on platforms
that do not support the LOCK prefix instruction. that do not support the LOCK prefix instruction.
The atomic operations are guaranteed to be atomic with respect to interrupt The atomic operations are guaranteed to be atomic with respect to interrupt

2
arch/x86/core/cpuhalt.S
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@ -35,7 +35,7 @@ DESCRIPTION
This module provides an implementation of the architecture-specific This module provides an implementation of the architecture-specific
nano_cpu_idle() primitive required by the nanokernel idle loop component. nano_cpu_idle() primitive required by the nanokernel idle loop component.
It can be called within an implementation of _sys_power_save_idle(), It can be called within an implementation of _sys_power_save_idle(),
which is provided for the microkernel by the BSP. which is provided for the microkernel by the platform.
The module also provides an implementation of nano_cpu_atomic_idle(), which The module also provides an implementation of nano_cpu_atomic_idle(), which
atomically re-enables interrupts and enters low power mode. atomically re-enables interrupts and enters low power mode.

4
arch/x86/core/crt0.S
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@ -109,7 +109,7 @@ __start:
/* /*
* BSPs that need to enable the A20 line to boot properly wil enable this * Platforms that need to enable the A20 line to boot properly wil enable this
* option. * option.
*/ */
#ifdef CONFIG_BOOT_A20_ENABLE #ifdef CONFIG_BOOT_A20_ENABLE
@ -276,7 +276,7 @@ SECTION_FUNC(TEXT_START, __start)
* *
* This is a special case for the ia32 platform, which must work for * This is a special case for the ia32 platform, which must work for
* multiple platforms (QEMU, generic PC board, etc.). With other * multiple platforms (QEMU, generic PC board, etc.). With other
* BSPs the bootloader is well known so assumptions can be made. * platforms the bootloader is well known so assumptions can be made.
*/ */
movw $0x10, %ax /* data segment selector (entry = 3) */ movw $0x10, %ax /* data segment selector (entry = 3) */
movw %ax, %ds /* set DS */ movw %ax, %ds /* set DS */

6
arch/x86/core/driver_static_irq_stubs.S
View file

@ -33,7 +33,7 @@
/* /*
DESCRIPTION DESCRIPTION
This module contains the static interrupt stubs for the various drivers employed This module contains the static interrupt stubs for the various drivers employed
by x86 BSPs. by x86 platforms.
*/ */
#define _ASMLANGUAGE #define _ASMLANGUAGE
@ -94,7 +94,7 @@ by x86 BSPs.
SECTION_FUNC(TEXT, _pic_master__i8259_boi_master_stub) SECTION_FUNC(TEXT, _pic_master__i8259_boi_master_stub)
/* /*
* Handle possible spurious (stray) interrupts on IRQ 7. Since on this * Handle possible spurious (stray) interrupts on IRQ 7. Since on this
* particular BSP, no device is hooked up to IRQ 7, a C level ISR is * particular platform, no device is hooked up to IRQ 7, a C level ISR is
* not called as the call to the BOI routine will not return. * not called as the call to the BOI routine will not return.
*/ */
call _IntEnt /* Inform kernel interrupt has begun */ call _IntEnt /* Inform kernel interrupt has begun */
@ -114,7 +114,7 @@ SECTION_FUNC(TEXT, _pic_master__i8259_boi_master_stub)
SECTION_FUNC(TEXT, _pic_slave__i8259_boi_slave_stub) SECTION_FUNC(TEXT, _pic_slave__i8259_boi_slave_stub)
/* /*
* Handle possible spurious (stray) interrupts on IRQ 15 (slave PIC * Handle possible spurious (stray) interrupts on IRQ 15 (slave PIC
* IRQ 7). Since on this particular BSP, no device is hooked up to * IRQ 7). Since on this particular platform, no device is hooked up to
* IRQ 15, a C level ISR is not called as the call the BOI routine * IRQ 15, a C level ISR is not called as the call the BOI routine
* will not return. * will not return.
*/ */

2
arch/x86/core/excstub.S
View file

@ -246,7 +246,7 @@ SECTION_FUNC(TEXT, _ExcExit)
/* /*
* Must lock interrupts to prevent outside interference. * Must lock interrupts to prevent outside interference.
* (Using "lock" prefix would be nicer, but this won't work * (Using "lock" prefix would be nicer, but this won't work
* on BSPs that don't respect the CPU's bus lock signal.) * on platforms that don't respect the CPU's bus lock signal.)
*/ */
cli cli

4
arch/x86/core/fatal.c
View file

@ -126,8 +126,8 @@ FUNC_NORETURN void _NanoFatalErrorHandler(
/* /*
* Error was fatal to a kernel task or a fiber, * Error was fatal to a kernel task or a fiber; invoke the system
* so invoke the system fatal error handling policy defined for the BSP * fatal error handling policy defined for the platform.
*/ */
_SysFatalErrorHandler(reason, pEsf); _SysFatalErrorHandler(reason, pEsf);

18
arch/x86/core/intconnect.c
View file

@ -36,7 +36,7 @@ This module provides routines to manage asynchronous interrupts
on the IA-32 architecture. on the IA-32 architecture.
This module provides the public routine irq_connect(), the private This module provides the public routine irq_connect(), the private
routine _IntVecSet(), and the BSP support routines _IntVecAlloc(), routine _IntVecSet(), and the support routines _IntVecAlloc(),
_IntVecMarkAllocated() and _IntVecMarkFree(). _IntVecMarkAllocated() and _IntVecMarkFree().
INTERNAL INTERNAL
@ -245,10 +245,10 @@ void _IntVecSet(
* *
* The specified <irq> represents a virtualized IRQ, i.e. it does not * The specified <irq> represents a virtualized IRQ, i.e. it does not
* necessarily represent a specific IRQ line on a given interrupt controller * necessarily represent a specific IRQ line on a given interrupt controller
* device. The BSP presents a virtualized set of IRQs from 0 to N, where N * device. The platform presents a virtualized set of IRQs from 0 to N, where
* is the total number of IRQs supported by all the interrupt controller devices * N is the total number of IRQs supported by all the interrupt controller
* on the board. See the BSP's documentation for the mapping of virtualized * devices on the board. See the platform's documentation for the mapping of
* IRQ to physical IRQ. * virtualized IRQ to physical IRQ.
* *
* When the device asserts an interrupt on the specified <irq>, a switch to * When the device asserts an interrupt on the specified <irq>, a switch to
* the interrupt stack is performed (if not already executing on the interrupt * the interrupt stack is performed (if not already executing on the interrupt
@ -304,7 +304,7 @@ int irq_connect(
int stub_idx; int stub_idx;
/* /*
* Invoke the BSP provided routine _SysIntVecAlloc() which will: * Invoke the interrupt controller routine _SysIntVecAlloc() which will:
* a) allocate a vector satisfying the requested priority, * a) allocate a vector satisfying the requested priority,
* b) return EOI and BOI related information for stub code synthesis, * b) return EOI and BOI related information for stub code synthesis,
*and *and
@ -482,9 +482,9 @@ int irq_connect(
* *
* @brief Allocate a free interrupt vector given <priority> * @brief Allocate a free interrupt vector given <priority>
* *
* This routine scans the interrupt_vectors_allocated[] array for a free vector that * This routine scans the interrupt_vectors_allocated[] array for a free vector
* satisfies the specified <priority>. It is a utility function for use only * that satisfies the specified <priority>. It is a utility function for use
* by a BSP's _SysIntVecAlloc() routine. * only by the interrupt controller's _SysIntVecAlloc() routine.
* *
* This routine assumes that the relationship between interrupt priority and * This routine assumes that the relationship between interrupt priority and
* interrupt vector is : * interrupt vector is :

7
arch/x86/core/intstub.S
View file

@ -400,10 +400,9 @@ BRANCH_LABEL(nestedInterrupt)
* records. * records.
* *
* A spurious interrupt is considered a fatal condition, thus this routine * A spurious interrupt is considered a fatal condition, thus this routine
* merely sets up the 'reason' and 'pEsf' parameters to the BSP provided * merely sets up the 'reason' and 'pEsf' parameters to the routine
* routine: _SysFatalHwErrorHandler(). In other words, there is no provision * _SysFatalHwErrorHandler(). In other words, there is no provision to return
* to return to the interrupted context and thus the volatile registers * to the interrupted context and thus the volatile registers are not saved.
* are not saved.
* *
* @return Never returns * @return Never returns
* *

2
arch/x86/core/sys_fatal_error_handler.c
View file

@ -33,7 +33,7 @@
/* /*
DESCRIPTION DESCRIPTION
This module provides the _SysFatalErrorHandler() routine which is common to This module provides the _SysFatalErrorHandler() routine which is common to
supported BSPs. supported platforms.
*/ */
#include <nanokernel.h> #include <nanokernel.h>

4
arch/x86/core/unaligned.S
View file

@ -62,7 +62,7 @@ performed byte-by-byte.
* lines from the IA-32 processor, this function shall be utilized to write out * lines from the IA-32 processor, this function shall be utilized to write out
* the data byte-by-byte. * the data byte-by-byte.
* *
* The BSP specific configuration option CONFIG_UNALIGNED_WRITE_UNSUPPORTED * The platform specific configuration option CONFIG_UNALIGNED_WRITE_UNSUPPORTED
* shall be defined when the kernel is built for target hardware that cannot * shall be defined when the kernel is built for target hardware that cannot
* support unaligned double word (32-bit) write operations. * support unaligned double word (32-bit) write operations.
* *
@ -99,7 +99,7 @@ SECTION_FUNC(TEXT, _Unaligned32Write)
* lines from the IA-32 processor, this function shall be utilized to read * lines from the IA-32 processor, this function shall be utilized to read
* the data byte-by-byte. * the data byte-by-byte.
* *
* The BSP specific configuration option CONFIG_UNALIGNED_WRITE_UNSUPPORTED * The platform specific configuration option CONFIG_UNALIGNED_WRITE_UNSUPPORTED
* shall be defined when the kernel is built for target hardware that cannot * shall be defined when the kernel is built for target hardware that cannot
* support unaligned double word (32-bit) write operations. * support unaligned double word (32-bit) write operations.
* *

2
arch/x86/platforms/ia32/linker.cmd
View file

@ -67,7 +67,7 @@ MEMORY
#include <arch/x86/linker-common-sections.h> #include <arch/x86/linker-common-sections.h>
/* start adding bsp specific linker sections here */ /* start adding platform specific linker sections here */
/* no sections should appear after linker-epilog.h */ /* no sections should appear after linker-epilog.h */
#include <arch/x86/linker-epilog.h> #include <arch/x86/linker-epilog.h>

2
arch/x86/platforms/ia32_pci/board.h
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@ -1,4 +1,4 @@
/* board.h - board configuration macros for the 'Quark' BSP */ /* board.h - board configuration macros for the ia32_pci platform */
/* /*
* Copyright (c) 2013-2015, Wind River Systems, Inc. * Copyright (c) 2013-2015, Wind River Systems, Inc.

2
arch/x86/platforms/ia32_pci/linker.cmd
View file

@ -67,7 +67,7 @@ MEMORY
#include <arch/x86/linker-common-sections.h> #include <arch/x86/linker-common-sections.h>
/* start adding bsp specific linker sections here */ /* start adding platform specific linker sections here */
/* no sections should appear after linker-epilog.h */ /* no sections should appear after linker-epilog.h */
#include <arch/x86/linker-epilog.h> #include <arch/x86/linker-epilog.h>

4
arch/x86/platforms/ia32_pci/system.c
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@ -1,4 +1,4 @@
/* system.c - system/hardware module for the Quark BSP */ /* system.c - system/hardware module for the ia32_pci platform */
/* /*
* Copyright (c) 2013-2015, Wind River Systems, Inc. * Copyright (c) 2013-2015, Wind River Systems, Inc.
@ -33,7 +33,7 @@
/* /*
DESCRIPTION DESCRIPTION
This module provides routines to initialize and support board-level hardware This module provides routines to initialize and support board-level hardware
for the Quark BSP. for the ia32_pci platform.
Implementation Remarks: Implementation Remarks:
Handlers for the secondary serial port have not been added. Handlers for the secondary serial port have not been added.