arc: RGF_NUM_BANKS is another configurable option for ARCs

In order to add the EM7D SOC, I will be implementing a version of the FIRQ
interrupt handler that saves and restores registers on the stack when
RGF_NUM_BANKS==1. All other ARC SOCs at this time have RGF_NUM_BANKS==2,
allowing for a faster handler that can use the registers in the 2nd register bank.
But EM7D doesn't have this 2nd bank, hence the need for this new configurable choice.
(See ZEP-966)

Change-Id: Ie089f1f079902552cf279c2cda23ee0805b01eed
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>

arch/arc/Kconfig

@@ -112,6 +112,20 @@ config	NUM_IRQS
 	  The BSP must provide a valid default. This drives the size of the
 	  vector table.
 
+config	RGF_NUM_BANKS
+	int
+	prompt "Number of General Purpose Register Banks"
+	depends on CPU_ARCV2
+	range 1 2
+	default 2
+	help
+	The ARC CPU can be configured to have more than one register
+	bank. If fast interrupts are supported (FIRQ), the 2nd
+	register bank, in the set, will be used by FIRQ interrupts.
+	If fast interrupts are supported but there is only 1
+	register bank, the fast interrupt handler must save
+	and restore general purpose regsiters.
+
 config	FIRQ_STACK_SIZE
 	int
 	prompt "Size of stack for FIRQs (in bytes)"

arch/arc/soc/em11d/Kconfig.defconfig

@@ -36,6 +36,9 @@ config NUM_IRQS
 	# must be > the highest interrupt number used
 	default 36
 
+config RGF_NUM_BANKS
+	default 2
+
 config SYS_CLOCK_HW_CYCLES_PER_SEC
 	default 20000000
 

arch/arc/soc/em9d/Kconfig.defconfig

@@ -36,6 +36,9 @@ config NUM_IRQS
 	# must be > the highest interrupt number used
 	default 36
 
+config RGF_NUM_BANKS
+	default 2
+
 config SYS_CLOCK_HW_CYCLES_PER_SEC
 	default 20000000
 

arch/arc/soc/quark_se_c1000_ss/Kconfig.defconfig

@@ -33,6 +33,9 @@ config NUM_IRQS
 	# must be > the highest interrupt number used
 	default 68
 
+config RGF_NUM_BANKS
+	default 2
+
 config SYS_CLOCK_HW_CYCLES_PER_SEC
 	default 32000000