From ec9c2ec2d8c90c16aa678233e530232d2f5b922f Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Thu, 7 Apr 2022 15:44:42 -0400 Subject: [PATCH] riscv: pmp: rename CONFIG_PMP_SLOT The plural form is clearer. Signed-off-by: Nicolas Pitre --- arch/riscv/Kconfig | 6 +++--- arch/riscv/core/pmp.S | 8 ++++---- arch/riscv/core/pmp.c | 18 +++++++++--------- include/zephyr/arch/riscv/thread.h | 8 ++++---- .../virt/Kconfig.defconfig.series | 2 +- 5 files changed, 21 insertions(+), 21 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 228155daa24..630ddea2923 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -153,7 +153,7 @@ menuconfig RISCV_PMP if RISCV_PMP -config PMP_SLOT +config PMP_SLOTS int "Number of PMP slots" default 8 help @@ -175,9 +175,9 @@ config PMP_STACK_GUARD_MIN_SIZE accommodate the stack overflow exception stack usage. config PMP_POWER_OF_TWO_ALIGNMENT - bool "Power-of-two alignment for PMP memory areas" + bool "Enforce power-of-two alignment on PMP memory areas" default y if TEST_USERSPACE - default y if (PMP_SLOT = 8) + default y if (PMP_SLOTS = 8) select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT select GEN_PRIV_STACKS help diff --git a/arch/riscv/core/pmp.S b/arch/riscv/core/pmp.S index 313fa5ca2f5..3f5fcff858f 100644 --- a/arch/riscv/core/pmp.S +++ b/arch/riscv/core/pmp.S @@ -30,7 +30,7 @@ * we disallow compressed instructions so the update block sizes are easily * known (luckily they're all power-of-2's simplifying the code further). * - * start < end && end <= CONFIG_PMP_SLOT must be true. + * start < end && end <= CONFIG_PMP_SLOTS must be true. */ GTEXT(z_riscv_write_pmp_entries) @@ -46,7 +46,7 @@ pmpaddr_store: .option push .option norvc .set _index, 0 - .rept CONFIG_PMP_SLOT + .rept CONFIG_PMP_SLOTS lr t0, (RV_REGSIZE * _index)(a3) li t1, _index + 1 csrw (CSR_PMPADDR_BASE + _index), t0 @@ -75,7 +75,7 @@ pmpcfg_store: .option push .option norvc .set _index, 0 - .rept (CONFIG_PMP_SLOT / RV_REGSIZE) + .rept (CONFIG_PMP_SLOTS / RV_REGSIZE) lr t0, (RV_REGSIZE * _index)(a4) addi a0, a0, 1 csrw (CSR_PMPCFG_BASE + RV_REGSIZE/4 * _index), t0 @@ -98,7 +98,7 @@ pmpcfg_zerotail: .option push .option norvc .set _index, 0 - .rept (CONFIG_PMP_SLOT / RV_REGSIZE) + .rept (CONFIG_PMP_SLOTS / RV_REGSIZE) csrw (CSR_PMPCFG_BASE + RV_REGSIZE/4 * _index), zero .set _index, _index + 1 .endr diff --git a/arch/riscv/core/pmp.c b/arch/riscv/core/pmp.c index 18080a0be95..4af0a541537 100644 --- a/arch/riscv/core/pmp.c +++ b/arch/riscv/core/pmp.c @@ -69,13 +69,13 @@ static void print_pmp_entries(unsigned int start, unsigned int end, static void dump_pmp_regs(const char *banner) { - ulong_t pmp_addr[CONFIG_PMP_SLOT]; - ulong_t pmp_cfg[CONFIG_PMP_SLOT / PMPCFG_STRIDE]; + ulong_t pmp_addr[CONFIG_PMP_SLOTS]; + ulong_t pmp_cfg[CONFIG_PMP_SLOTS / PMPCFG_STRIDE]; #define PMPADDR_READ(x) pmp_addr[x] = csr_read(pmpaddr##x) FOR_EACH(PMPADDR_READ, (;), 0, 1, 2, 3, 4, 5, 6, 7); -#if CONFIG_PMP_SLOT > 8 +#if CONFIG_PMP_SLOTS > 8 FOR_EACH(PMPADDR_READ, (;), 8, 9, 10, 11, 12, 13, 14, 15); #endif @@ -83,19 +83,19 @@ static void dump_pmp_regs(const char *banner) #ifdef CONFIG_64BIT pmp_cfg[0] = csr_read(pmpcfg0); -#if CONFIG_PMP_SLOT > 8 +#if CONFIG_PMP_SLOTS > 8 pmp_cfg[1] = csr_read(pmpcfg2); #endif #else pmp_cfg[0] = csr_read(pmpcfg0); pmp_cfg[1] = csr_read(pmpcfg1); -#if CONFIG_PMP_SLOT > 8 +#if CONFIG_PMP_SLOTS > 8 pmp_cfg[2] = csr_read(pmpcfg2); pmp_cfg[3] = csr_read(pmpcfg3); #endif #endif - print_pmp_entries(0, CONFIG_PMP_SLOT, pmp_addr, pmp_cfg, banner); + print_pmp_entries(0, CONFIG_PMP_SLOTS, pmp_addr, pmp_cfg, banner); } /** @@ -164,7 +164,7 @@ static bool set_pmp_entry(unsigned int *index_p, uint8_t perm, * immediate value as the actual register. This is performed more efficiently * in assembly code (pmp.S) than what is possible with C code. * - * Requirement: start < end && end <= CONFIG_PMP_SLOT + * Requirement: start < end && end <= CONFIG_PMP_SLOTS * * @param start Start of the PMP range to be written * @param end End (exclusive) of the PMP range to be written @@ -194,7 +194,7 @@ static void write_pmp_entries(unsigned int start, unsigned int end, unsigned int index_limit) { __ASSERT(start < end && end <= index_limit && - index_limit <= CONFIG_PMP_SLOT, + index_limit <= CONFIG_PMP_SLOTS, "bad PMP range (start=%u end=%u)", start, end); /* Be extra paranoid in case assertions are disabled */ @@ -487,7 +487,7 @@ void z_riscv_pmp_usermode_enable(struct k_thread *thread) int arch_mem_domain_max_partitions_get(void) { - int available_pmp_slots = CONFIG_PMP_SLOT; + int available_pmp_slots = CONFIG_PMP_SLOTS; /* remove those slots dedicated to global entries */ available_pmp_slots -= global_pmp_end_index; diff --git a/include/zephyr/arch/riscv/thread.h b/include/zephyr/arch/riscv/thread.h index 13238c891d5..864affba342 100644 --- a/include/zephyr/arch/riscv/thread.h +++ b/include/zephyr/arch/riscv/thread.h @@ -32,9 +32,9 @@ #ifdef CONFIG_RISCV_PMP #ifdef CONFIG_64BIT -#define RISCV_PMP_CFG_NUM (CONFIG_PMP_SLOT >> 3) +#define RISCV_PMP_CFG_NUM (CONFIG_PMP_SLOTS >> 3) #else -#define RISCV_PMP_CFG_NUM (CONFIG_PMP_SLOT >> 2) +#define RISCV_PMP_CFG_NUM (CONFIG_PMP_SLOTS >> 2) #endif #endif @@ -95,8 +95,8 @@ typedef struct _callee_saved _callee_saved_t; struct _thread_arch { #ifdef CONFIG_USERSPACE ulong_t priv_stack_start; - ulong_t u_mode_pmpaddr_regs[CONFIG_PMP_SLOT]; - ulong_t u_mode_pmpcfg_regs[CONFIG_PMP_SLOT / sizeof(ulong_t)]; + ulong_t u_mode_pmpaddr_regs[CONFIG_PMP_SLOTS]; + ulong_t u_mode_pmpcfg_regs[CONFIG_PMP_SLOTS / sizeof(ulong_t)]; unsigned int u_mode_pmp_domain_offset; unsigned int u_mode_pmp_end_index; unsigned int u_mode_pmp_update_nr; diff --git a/soc/riscv/riscv-privilege/virt/Kconfig.defconfig.series b/soc/riscv/riscv-privilege/virt/Kconfig.defconfig.series index 6c6168952c7..77481104e3b 100644 --- a/soc/riscv/riscv-privilege/virt/Kconfig.defconfig.series +++ b/soc/riscv/riscv-privilege/virt/Kconfig.defconfig.series @@ -33,7 +33,7 @@ config MAX_IRQ_PER_AGGREGATOR config NUM_IRQS default 64 -config PMP_SLOT +config PMP_SLOTS default 16 endif